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R600 doesn't support IRQs yet, so don't try to use them.
MFC after: 1 week
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parent
e34135013b
commit
0b6c99683c
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=197603
@ -194,6 +194,9 @@ irqreturn_t radeon_driver_irq_handler(DRM_IRQ_ARGS)
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u32 r500_disp_int;
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u32 tmp;
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if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
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return IRQ_NONE;
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/* Only consider the bits we're interested in - others could be used
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* outside the DRM
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*/
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@ -323,6 +326,9 @@ int radeon_irq_emit(struct drm_device *dev, void *data, struct drm_file *file_pr
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drm_radeon_irq_emit_t *emit = data;
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int result;
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if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
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return -EINVAL;
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LOCK_TEST_WITH_RETURN(dev, file_priv);
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if (!dev_priv) {
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@ -363,6 +369,9 @@ void radeon_driver_irq_preinstall(struct drm_device * dev)
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(drm_radeon_private_t *) dev->dev_private;
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u32 dummy;
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if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
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return;
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/* Disable *all* interrupts */
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if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
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RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
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@ -380,6 +389,9 @@ int radeon_driver_irq_postinstall(struct drm_device * dev)
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atomic_set(&dev_priv->swi_emitted, 0);
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DRM_INIT_WAITQUEUE(&dev_priv->swi_queue);
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if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
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return 0;
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radeon_irq_set_state(dev, RADEON_SW_INT_ENABLE, 1);
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return 0;
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@ -394,6 +406,9 @@ void radeon_driver_irq_uninstall(struct drm_device * dev)
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dev_priv->irq_enabled = 0;
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if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
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return;
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if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
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RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
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/* Disable *all* interrupts */
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@ -3024,7 +3024,10 @@ static int radeon_cp_getparam(struct drm_device *dev, void *data, struct drm_fil
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value = GET_SCRATCH(dev_priv, 2);
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break;
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case RADEON_PARAM_IRQ_NR:
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value = dev->irq;
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if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
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value = 0;
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else
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value = dev->irq;
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break;
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case RADEON_PARAM_GART_BASE:
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value = dev_priv->gart_vm_start;
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