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Another file needed for ACPI,I forgot to commit.
Noticed by:iwasaki
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parent
040864ac7a
commit
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=65065
309
sys/i386/include/acpica_osd.h
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309
sys/i386/include/acpica_osd.h
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/*-
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* Copyright (c) 2000 Mitsuru IWASAKI <iwasaki@FreeBSD.org>
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* Copyright (c) 2000 Munehiro Matsuda <haro@tk.kubota.co.jp>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id: acpica_osd.h,v 1.3 2000/08/09 14:47:48 iwasaki Exp $
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* $FreeBSD$
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <machine/bus.h>
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#include <machine/vmparam.h>
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#include <sys/acpi.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <pci/pcivar.h>
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/*
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* ACPICA compatibility
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*/
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static UINT32 OsdInX(ACPI_IO_ADDRESS, int);
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static void OsdOutX(ACPI_IO_ADDRESS, UINT32, int);
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/*
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* Platform/Hardware independent I/O interfaces
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*/
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static __inline UINT32
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OsdInX(ACPI_IO_ADDRESS InPort, int bytes)
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{
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bus_space_tag_t bst;
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bus_space_handle_t bsh;
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UINT32 retval;
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bst = I386_BUS_SPACE_IO;
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bsh = InPort;
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switch (bytes) {
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case 1:
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retval = bus_space_read_1(bst, bsh, 0);
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break;
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case 2:
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retval = bus_space_read_2(bst, bsh, 0);
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break;
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case 4:
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retval = bus_space_read_4(bst, bsh, 0);
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break;
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default:
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printf("OsdInX: wrong length to read\n");
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retval = 0;
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}
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return (retval);
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}
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#ifndef ACPI_NO_OSDFUNC_INLINE
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static __inline
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#endif
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UINT8
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OsdIn8(ACPI_IO_ADDRESS InPort)
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{
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return (OsdInX(InPort, 1) & 0xff);
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}
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#ifndef ACPI_NO_OSDFUNC_INLINE
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static __inline
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#endif
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UINT16
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OsdIn16(ACPI_IO_ADDRESS InPort)
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{
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return (OsdInX(InPort, 2) & 0xffff);
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}
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#ifndef ACPI_NO_OSDFUNC_INLINE
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static __inline
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#endif
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UINT32
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OsdIn32(ACPI_IO_ADDRESS InPort)
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{
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return (OsdInX(InPort, 4));
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}
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static __inline void
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OsdOutX(ACPI_IO_ADDRESS OutPort, UINT32 Value, int bytes)
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{
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bus_space_tag_t bst;
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bus_space_handle_t bsh;
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bst = I386_BUS_SPACE_IO;
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bsh = OutPort;
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switch (bytes) {
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case 1:
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bus_space_write_1(bst, bsh, 0, Value & 0xff);
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break;
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case 2:
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bus_space_write_2(bst, bsh, 0, Value & 0xffff);
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break;
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case 4:
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bus_space_write_4(bst, bsh, 0, Value);
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break;
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default:
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printf("OsdOutX: wrong length to write\n");
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}
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}
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#ifndef ACPI_NO_OSDFUNC_INLINE
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static __inline
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#endif
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void
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OsdOut8(ACPI_IO_ADDRESS OutPort, UINT8 Value)
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{
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OsdOutX(OutPort, Value, 1);
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}
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#ifndef ACPI_NO_OSDFUNC_INLINE
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static __inline
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#endif
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void
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OsdOut16(ACPI_IO_ADDRESS OutPort, UINT16 Value)
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{
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OsdOutX(OutPort, Value, 2);
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}
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#ifndef ACPI_NO_OSDFUNC_INLINE
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static __inline
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#endif
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void
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OsdOut32(ACPI_IO_ADDRESS OutPort, UINT32 Value)
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{
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OsdOutX(OutPort, Value, 4);
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}
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#ifndef ACPI_NO_OSDFUNC_INLINE
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static __inline
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#endif
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ACPI_STATUS
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OsdMapMemory(void *PhysicalAddress, UINT32 Length, void **LogicalAddress)
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{
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vm_offset_t PhysicalEnd;
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vm_offset_t PhysicalOffs;
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PhysicalEnd = (vm_offset_t)PhysicalAddress + Length;
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if (PhysicalEnd < 1024 * 1024) {
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/*
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* The first 1Mb is mapped at KERNBASE.
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*/
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*LogicalAddress = (void *)(uintptr_t)
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(KERNBASE + (vm_offset_t)PhysicalAddress);
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} else {
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PhysicalOffs = (vm_offset_t)PhysicalAddress -
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trunc_page((vm_offset_t)PhysicalAddress);
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*LogicalAddress = (caddr_t)
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pmap_mapdev((vm_offset_t)PhysicalAddress - PhysicalOffs,
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Length + PhysicalOffs) +
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PhysicalOffs;
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}
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return (AE_OK);
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}
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#ifndef ACPI_NO_OSDFUNC_INLINE
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static __inline
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#endif
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void
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OsdUnMapMemory(void *LogicalAddress, UINT32 Length)
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{
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if ((vm_offset_t)LogicalAddress + Length - KERNBASE >= 1024 * 1024) {
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pmap_unmapdev((vm_offset_t)LogicalAddress, Length);
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}
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}
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/*
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* Standard access to PCI configuration space
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*/
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static __inline ACPI_STATUS
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OsdReadPciCfg(UINT32 Bus, UINT32 DeviceFunction, UINT32 Register, UINT32 *Value, int bytes)
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{
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pcicfgregs pcicfg;
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/*
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* XXX Hack for Alpha(tsunami) systems.
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* pcicfg.hose is set to -1 in the hope that,
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* tsunami_cfgreadX() will set it up right.
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* Other Alpha systems (and i386's) don't seem to use hose.
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*/
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pcicfg.hose = -1;
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pcicfg.bus = Bus;
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pcicfg.slot = (DeviceFunction >> 16) & 0xff;
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pcicfg.func = DeviceFunction & 0xff;
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*Value = pci_cfgread(&pcicfg, Register, bytes);
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return (AE_OK);
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}
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#ifndef ACPI_NO_OSDFUNC_INLINE
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static __inline
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#endif
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ACPI_STATUS
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OsdReadPciCfgByte(UINT32 Bus, UINT32 DeviceFunction, UINT32 Register, UINT8 *Value)
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{
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ACPI_STATUS status;
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UINT32 tmp;
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status = OsdReadPciCfg(Bus, DeviceFunction, Register, &tmp, 1);
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*Value = tmp & 0xff;
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return (status);
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}
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#ifndef ACPI_NO_OSDFUNC_INLINE
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static __inline
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#endif
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ACPI_STATUS
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OsdReadPciCfgWord(UINT32 Bus, UINT32 DeviceFunction, UINT32 Register, UINT16 *Value)
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{
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ACPI_STATUS status;
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UINT32 tmp;
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status = OsdReadPciCfg(Bus, DeviceFunction, Register, &tmp, 2);
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*Value = tmp & 0xffff;
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return (status);
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}
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#ifndef ACPI_NO_OSDFUNC_INLINE
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static __inline
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#endif
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ACPI_STATUS
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OsdReadPciCfgDword(UINT32 Bus, UINT32 DeviceFunction, UINT32 Register, UINT32 *Value)
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{
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ACPI_STATUS status;
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UINT32 tmp;
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status = OsdReadPciCfg(Bus, DeviceFunction, Register, &tmp, 2);
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*Value = tmp;
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return (status);
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}
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static __inline ACPI_STATUS
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OsdWritePciCfg(UINT32 Bus, UINT32 DeviceFunction, UINT32 Register, UINT32 Value, int bytes)
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{
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pcicfgregs pcicfg;
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/*
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* XXX Hack for Alpha(tsunami) systems.
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* pcicfg.hose is set to -1 in the hope that,
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* tsunami_cfgreadX() will set it up right.
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* Other Alpha systems (and i386's) don't seem to use hose.
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*/
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pcicfg.hose = -1;
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pcicfg.bus = Bus;
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pcicfg.slot = (DeviceFunction >> 16) & 0xff;
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pcicfg.func = DeviceFunction & 0xff;
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pci_cfgwrite(&pcicfg, Register, Value, bytes);
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return (AE_OK);
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}
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#ifndef ACPI_NO_OSDFUNC_INLINE
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static __inline
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#endif
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ACPI_STATUS
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OsdWritePciCfgByte(UINT32 Bus, UINT32 DeviceFunction, UINT32 Register, UINT8 Value)
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{
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return (OsdWritePciCfg(Bus, DeviceFunction, Register, (UINT32) Value, 1));
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}
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#ifndef ACPI_NO_OSDFUNC_INLINE
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static __inline
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#endif
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ACPI_STATUS
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OsdWritePciCfgWord(UINT32 Bus, UINT32 DeviceFunction, UINT32 Register, UINT16 Value)
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{
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return (OsdWritePciCfg(Bus, DeviceFunction, Register, (UINT32) Value, 2));
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}
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#ifndef ACPI_NO_OSDFUNC_INLINE
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static __inline
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#endif
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ACPI_STATUS
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OsdWritePciCfgDword(UINT32 Bus, UINT32 DeviceFunction, UINT32 Register, UINT32 Value)
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{
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return (OsdWritePciCfg(Bus, DeviceFunction, Register, Value, 4));
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}
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