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Code Issues Releases Activity

Fix two misindents.

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Spotted by:	FlexeLint
This commit is contained in:
Poul-Henning Kamp 2002-10-01 22:27:03 +00:00
parent f72e17e233
commit 1878960dc9
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=104324
2 changed files with 2 additions and 2 deletions
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2
sys/pci/if_rl.c
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@ -1010,7 +1010,7 @@ rl_attach(dev)
* Allocate the parent bus DMA tag appropriate for PCI.
*/
#define RL_NSEG_NEW 32
error = bus_dma_tag_create(NULL, /* parent */
error = bus_dma_tag_create(NULL, /* parent */
1, 0, /* alignment, boundary */
BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
BUS_SPACE_MAXADDR, /* highaddr */

2
sys/pci/if_xl.c
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@ -2718,7 +2718,7 @@ xl_init(xsc)
CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_COAX_STOP);
/* increase packet size to allow reception of 802.1q or ISL packets */
if (sc->xl_type == XL_TYPE_905B)
if (sc->xl_type == XL_TYPE_905B)
CSR_WRITE_2(sc, XL_W3_MAXPKTSIZE, XL_PACKET_SIZE);
/* Clear out the stats counters. */
CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_STATS_DISABLE);