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add some definition and driver changes in preparation for
two upcoming features: semi-transparent mode: when a device is opened in this mode, the user program will be able to mark slots that must be forwarded to the "other" side (i.e. from NIC to host stack, or viceversa), and the forwarding will occur automatically at the next netmap syscall. This saves the need to open another file descriptor and do the forwarding manually. direct-forwarding mode: when operating with a VALE port, the user can specify in the slot the actual destination port, overriding the forwarding decision made by a lookup of the destination MAC. This can be useful to implement packet dispatchers. No API changes will be introduced. No new functionality in this patch yet.
This commit is contained in:
parent
f876ffeae3
commit
1dce924d25
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=245579
@ -292,6 +292,8 @@ em_netmap_rxsync(struct ifnet *ifp, u_int ring_nr, int do_lock)
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l = rxr->next_to_check;
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l = rxr->next_to_check;
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j = netmap_idx_n2k(kring, l);
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j = netmap_idx_n2k(kring, l);
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if (netmap_no_pendintr || force_update) {
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if (netmap_no_pendintr || force_update) {
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uint16_t slot_flags = kring->nkr_slot_flags;
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for (n = 0; ; n++) {
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for (n = 0; ; n++) {
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struct e1000_rx_desc *curr = &rxr->rx_base[l];
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struct e1000_rx_desc *curr = &rxr->rx_base[l];
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uint32_t staterr = le32toh(curr->status);
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uint32_t staterr = le32toh(curr->status);
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@ -299,6 +301,7 @@ em_netmap_rxsync(struct ifnet *ifp, u_int ring_nr, int do_lock)
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if ((staterr & E1000_RXD_STAT_DD) == 0)
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if ((staterr & E1000_RXD_STAT_DD) == 0)
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break;
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break;
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ring->slot[j].len = le16toh(curr->length);
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ring->slot[j].len = le16toh(curr->length);
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ring->slot[j].flags = slot_flags;
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bus_dmamap_sync(rxr->rxtag, rxr->rx_buffers[l].map,
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bus_dmamap_sync(rxr->rxtag, rxr->rx_buffers[l].map,
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BUS_DMASYNC_POSTREAD);
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BUS_DMASYNC_POSTREAD);
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j = (j == lim) ? 0 : j + 1;
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j = (j == lim) ? 0 : j + 1;
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@ -263,6 +263,8 @@ igb_netmap_rxsync(struct ifnet *ifp, u_int ring_nr, int do_lock)
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l = rxr->next_to_check;
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l = rxr->next_to_check;
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j = netmap_idx_n2k(kring, l);
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j = netmap_idx_n2k(kring, l);
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if (netmap_no_pendintr || force_update) {
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if (netmap_no_pendintr || force_update) {
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uint16_t slot_flags = kring->nkr_slot_flags;
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for (n = 0; ; n++) {
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for (n = 0; ; n++) {
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union e1000_adv_rx_desc *curr = &rxr->rx_base[l];
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union e1000_adv_rx_desc *curr = &rxr->rx_base[l];
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uint32_t staterr = le32toh(curr->wb.upper.status_error);
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uint32_t staterr = le32toh(curr->wb.upper.status_error);
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@ -270,6 +272,7 @@ igb_netmap_rxsync(struct ifnet *ifp, u_int ring_nr, int do_lock)
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if ((staterr & E1000_RXD_STAT_DD) == 0)
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if ((staterr & E1000_RXD_STAT_DD) == 0)
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break;
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break;
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ring->slot[j].len = le16toh(curr->wb.upper.length);
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ring->slot[j].len = le16toh(curr->wb.upper.length);
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ring->slot[j].flags = slot_flags;
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bus_dmamap_sync(rxr->ptag,
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bus_dmamap_sync(rxr->ptag,
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rxr->rx_buffers[l].pmap, BUS_DMASYNC_POSTREAD);
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rxr->rx_buffers[l].pmap, BUS_DMASYNC_POSTREAD);
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j = (j == lim) ? 0 : j + 1;
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j = (j == lim) ? 0 : j + 1;
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@ -253,6 +253,8 @@ lem_netmap_rxsync(struct ifnet *ifp, u_int ring_nr, int do_lock)
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l = adapter->next_rx_desc_to_check;
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l = adapter->next_rx_desc_to_check;
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j = netmap_idx_n2k(kring, l);
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j = netmap_idx_n2k(kring, l);
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if (netmap_no_pendintr || force_update) {
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if (netmap_no_pendintr || force_update) {
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uint16_t slot_flags = kring->nkr_slot_flags;
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for (n = 0; ; n++) {
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for (n = 0; ; n++) {
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struct e1000_rx_desc *curr = &adapter->rx_desc_base[l];
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struct e1000_rx_desc *curr = &adapter->rx_desc_base[l];
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uint32_t staterr = le32toh(curr->status);
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uint32_t staterr = le32toh(curr->status);
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@ -266,6 +268,7 @@ lem_netmap_rxsync(struct ifnet *ifp, u_int ring_nr, int do_lock)
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len = 0;
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len = 0;
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}
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}
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ring->slot[j].len = len;
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ring->slot[j].len = len;
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ring->slot[j].flags = slot_flags;
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bus_dmamap_sync(adapter->rxtag,
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bus_dmamap_sync(adapter->rxtag,
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adapter->rx_buffer_area[l].map,
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adapter->rx_buffer_area[l].map,
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BUS_DMASYNC_POSTREAD);
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BUS_DMASYNC_POSTREAD);
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@ -245,6 +245,8 @@ re_netmap_rxsync(struct ifnet *ifp, u_int ring_nr, int do_lock)
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l = sc->rl_ldata.rl_rx_prodidx; /* next pkt to check */
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l = sc->rl_ldata.rl_rx_prodidx; /* next pkt to check */
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j = netmap_idx_n2k(kring, l); /* the kring index */
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j = netmap_idx_n2k(kring, l); /* the kring index */
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if (netmap_no_pendintr || force_update) {
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if (netmap_no_pendintr || force_update) {
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uint16_t slot_flags = kring->nkr_slot_flags;
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for (n = kring->nr_hwavail; n < lim ; n++) {
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for (n = kring->nr_hwavail; n < lim ; n++) {
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struct rl_desc *cur_rx = &sc->rl_ldata.rl_rx_list[l];
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struct rl_desc *cur_rx = &sc->rl_ldata.rl_rx_list[l];
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uint32_t rxstat = le32toh(cur_rx->rl_cmdstat);
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uint32_t rxstat = le32toh(cur_rx->rl_cmdstat);
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@ -256,6 +258,7 @@ re_netmap_rxsync(struct ifnet *ifp, u_int ring_nr, int do_lock)
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/* XXX subtract crc */
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/* XXX subtract crc */
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total_len = (total_len < 4) ? 0 : total_len - 4;
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total_len = (total_len < 4) ? 0 : total_len - 4;
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kring->ring->slot[j].len = total_len;
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kring->ring->slot[j].len = total_len;
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kring->ring->slot[j].flags = slot_flags;
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/* sync was in re_newbuf() */
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/* sync was in re_newbuf() */
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bus_dmamap_sync(sc->rl_ldata.rl_rx_mtag,
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bus_dmamap_sync(sc->rl_ldata.rl_rx_mtag,
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rxd[l].rx_dmamap, BUS_DMASYNC_POSTREAD);
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rxd[l].rx_dmamap, BUS_DMASYNC_POSTREAD);
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@ -483,6 +483,7 @@ ixgbe_netmap_rxsync(struct ifnet *ifp, u_int ring_nr, int do_lock)
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*/
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*/
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if (netmap_no_pendintr || force_update) {
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if (netmap_no_pendintr || force_update) {
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int crclen = ix_crcstrip ? 0 : 4;
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int crclen = ix_crcstrip ? 0 : 4;
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uint16_t slot_flags = kring->nkr_slot_flags;
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l = rxr->next_to_check;
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l = rxr->next_to_check;
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j = netmap_idx_n2k(kring, l);
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j = netmap_idx_n2k(kring, l);
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@ -494,6 +495,7 @@ ixgbe_netmap_rxsync(struct ifnet *ifp, u_int ring_nr, int do_lock)
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if ((staterr & IXGBE_RXD_STAT_DD) == 0)
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if ((staterr & IXGBE_RXD_STAT_DD) == 0)
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break;
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break;
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ring->slot[j].len = le16toh(curr->wb.upper.length) - crclen;
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ring->slot[j].len = le16toh(curr->wb.upper.length) - crclen;
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ring->slot[j].flags = slot_flags;
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bus_dmamap_sync(rxr->ptag,
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bus_dmamap_sync(rxr->ptag,
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rxr->rx_buffers[l].pmap, BUS_DMASYNC_POSTREAD);
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rxr->rx_buffers[l].pmap, BUS_DMASYNC_POSTREAD);
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j = (j == lim) ? 0 : j + 1;
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j = (j == lim) ? 0 : j + 1;
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@ -119,6 +119,10 @@ struct netmap_adapter;
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* RX rings: the next empty buffer (hwcur + hwavail + hwofs) coincides with
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* RX rings: the next empty buffer (hwcur + hwavail + hwofs) coincides with
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* the next empty buffer as known by the hardware (next_to_check or so).
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* the next empty buffer as known by the hardware (next_to_check or so).
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* TX rings: hwcur + hwofs coincides with next_to_send
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* TX rings: hwcur + hwofs coincides with next_to_send
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*
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* For received packets, slot->flags is set to nkr_slot_flags
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* so we can provide a proper initial value (e.g. set NS_FORWARD
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* when operating in 'transparent' mode).
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*/
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*/
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struct netmap_kring {
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struct netmap_kring {
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struct netmap_ring *ring;
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struct netmap_ring *ring;
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@ -128,6 +132,7 @@ struct netmap_kring {
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#define NKR_PENDINTR 0x1 // Pending interrupt.
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#define NKR_PENDINTR 0x1 // Pending interrupt.
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u_int nkr_num_slots;
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u_int nkr_num_slots;
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uint16_t nkr_slot_flags; /* initial value for flags */
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int nkr_hwofs; /* offset between NIC and netmap ring */
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int nkr_hwofs; /* offset between NIC and netmap ring */
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struct netmap_adapter *na;
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struct netmap_adapter *na;
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NM_SELINFO_T si; /* poll/select wait queue */
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NM_SELINFO_T si; /* poll/select wait queue */
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