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Code Issues Releases Activity

Delete obsolete and unused PJ4B CPU functions

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Since PJ4Bv7 uses armv7_ CPU functions only pj4b_config
function is necessary. Remove obsolete routines.
This commit is contained in:
Zbigniew Bodek 2014-05-25 19:19:41 +00:00
parent fd31d8bb75
commit 1e17cf74b6
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=266673
2 changed files with 0 additions and 41 deletions
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32
sys/arm/arm/cpufunc_asm_pj4b.S
View File

@ -37,38 +37,6 @@ __FBSDID("$FreeBSD$");
.Lpj4b_sf_ctrl_reg:
.word 0xf1021820
ENTRY(pj4b_setttb)
/* Cache synchronization is not required as this core has PIPT caches */
mcr p15, 0, r1, c7, c10, 4 /* drain the write buffer */
#ifdef SMP
orr r0, r0, #2 /* Set TTB shared memory flag */
#endif
mcr p15, 0, r0, c2, c0, 0 /* load new TTB */
mcr p15, 0, r0, c8, c7, 0 /* invalidate I+D TLBs */
RET
END(pj4b_setttb)
ENTRY(pj4b_drain_readbuf)
mcr p15, 0, r0, c7, c5, 4 /* flush prefetch buffers */
RET
END(pj4b_drain_readbuf)
ENTRY(pj4b_flush_brnchtgt_all)
mcr p15, 0, r0, c7, c5, 6 /* flush entrie branch target cache */
RET
END(pj4b_flush_brnchtgt_all)
ENTRY(pj4b_flush_brnchtgt_va)
mcr p15, 0, r0, c7, c5, 7 /* flush branch target cache by VA */
RET
END(pj4b_flush_brnchtgt_va)
ENTRY(get_core_id)
mrc p15, 0, r0, c0, c0, 5
RET
END(get_core_id)
ENTRY(pj4b_config)
/* Set Auxiliary Debug Modes Control 0 register */

9
sys/arm/include/cpufunc.h
View File

@ -391,13 +391,6 @@ void arm11_tlb_flushD_SE (u_int va);
void arm11_drain_writebuf (void);
void pj4b_setttb (u_int);
void pj4b_drain_readbuf (void);
void pj4b_flush_brnchtgt_all (void);
void pj4b_flush_brnchtgt_va (u_int);
void pj4b_sleep (int);
void armv6_icache_sync_all (void);
void armv6_icache_sync_range (vm_offset_t, vm_size_t);
@ -432,8 +425,6 @@ u_int armv7_auxctrl (u_int, u_int);
void pj4bv7_setup (char *string);
void pj4b_config (void);
int get_core_id (void);
void armadaxp_idcache_wbinv_all (void);
void cortexa_setup (char *);