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Code Issues Releases Activity

o Minor tweaks to the AX88x90 probe routine, mostly related to comments.

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o Don't run through the register initialization in the read mac routine
  for the AX88x90.  It duplicates other stuff that we do.
o Eliminate the 10ms delay after we reset the AX88x90.  We already wait for
  the appropriate bits to indicate reset is done.
This commit is contained in:
Warner Losh 2009-03-31 18:25:09 +00:00
parent 0351ecf9e4
commit 2365a961b1
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=190596
1 changed files with 17 additions and 48 deletions
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65
sys/dev/ed/if_ed_pccard.c
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@ -730,10 +730,10 @@ ed_pccard_ax88x90_reset(struct ed_softc *sc)
ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STP | ED_CR_PAGE_0);
ed_asic_outb(sc, ED_NOVELL_RESET, ed_asic_inb(sc, ED_NOVELL_RESET));
/* Wait for the interrupt to fire */
for (i = 10000; i > 0; i--)
if (ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RST)
break;
/* Wait for the RST bit to assert, but cap it at 10ms */
for (i = 10000; !(ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RST) && i > 0;
i--)
continue;
ed_nic_outb(sc, ED_P0_ISR, ED_ISR_RST); /* ACK INTR */
if (i == 0)
device_printf(sc->dev, "Reset didn't finish\n");
@ -751,7 +751,6 @@ ed_probe_ax88x90_generic(device_t dev, int flags)
char test_buffer[32];
ed_pccard_ax88x90_reset(sc);
DELAY(10 * 1000);
/* Make sure that we really have an 8390 based board */
if (!ed_probe_generic8390(sc))
@ -761,43 +760,36 @@ ed_probe_ax88x90_generic(device_t dev, int flags)
sc->mem_shared = 0;
sc->cr_proto = ED_CR_RD2;
/*
* Test the ability to read and write to the NIC memory.
*/
/*
* This prevents packets from being stored in the NIC memory when the
* readmem routine turns on the start bit in the CR.
* readmem routine turns on the start bit in the CR. We write some
* bytes in word mode and verify we can read them back. If we can't
* then we don't have an AX88x90 chip here.
*/
ed_nic_outb(sc, ED_P0_RCR, ED_RCR_MON);
/* Temporarily initialize DCR for byte operations */
ed_nic_outb(sc, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS);
sc->isa16bit = 1;
ed_nic_outb(sc, ED_P0_DCR, ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS);
ed_nic_outb(sc, ED_P0_PSTART, 16384 / ED_PAGE_SIZE);
ed_nic_outb(sc, ED_P0_PSTOP, 32768 / ED_PAGE_SIZE);
/*
* Write a test pattern in word mode. If this also fails, then
* we don't know what this board is.
*/
ed_pio_writemem(sc, test_pattern, 16384, sizeof(test_pattern));
ed_pio_readmem(sc, 16384, test_buffer, sizeof(test_pattern));
if (bcmp(test_pattern, test_buffer, sizeof(test_pattern)) != 0)
return (ENXIO);
/*
* Hard code values based on the datasheet. We're NE-2000 compatible
* NIC with 16kb of packet memory starting at 16k offset. We assume
* that the writes to ED_P0_START and ED_P0_STOP reflect the values
* below.
*/
sc->type = ED_TYPE_NE2000;
if (ed_asic_inb(sc, ED_AX88X90_TEST) != 0)
sc->chip_type = ED_CHIP_TYPE_AX88790;
else
sc->chip_type = ED_CHIP_TYPE_AX88190;
/* 8k of memory plus an additional 8k if 16bit */
memsize = 8192 + sc->isa16bit * 8192;
memsize = 16 * 1024;
sc->mem_size = memsize;
/* NIC memory doesn't start at zero on an NE board */
/* The start address is tied to the bus width */
sc->mem_start = 8192 + sc->isa16bit * 8192;
sc->mem_start = 16 * 1024;
sc->mem_end = sc->mem_start + memsize;
sc->tx_page_start = memsize / ED_PAGE_SIZE;
sc->txb_cnt = 2;
@ -815,30 +807,7 @@ static int
ed_pccard_ax88x90_enaddr(struct ed_softc *sc)
{
int i, j;
struct {
unsigned char offset, value;
} pg_seq[] = {
/* Select Page0 */
{ED_P0_CR, ED_CR_RD2 | ED_CR_STP | ED_CR_PAGE_0},
{ED_P0_DCR, 0x01},
{ED_P0_RBCR0, 0x00}, /* Clear the count regs. */
{ED_P0_RBCR1, 0x00},
{ED_P0_IMR, 0x00}, /* Mask completion irq. */
{ED_P0_ISR, 0xff},
{ED_P0_RCR, ED_RCR_MON | ED_RCR_INTT}, /* Set To Monitor */
{ED_P0_TCR, ED_TCR_LB0}, /* loopback mode. */
{ED_P0_RBCR0, 0x20},
{ED_P0_RBCR1, 0x00},
{ED_P0_RSAR0, 0x00},
{ED_P0_RSAR1, 0x04},
{ED_P0_CR, ED_CR_RD0 | ED_CR_STA | ED_CR_PAGE_0},
};
/* Card Settings */
for (i = 0; i < sizeof(pg_seq) / sizeof(pg_seq[0]); i++)
ed_nic_outb(sc, pg_seq[i].offset, pg_seq[i].value);
/* Get Data */
/* Get MAC address */
for (i = 0; i < ETHER_ADDR_LEN; i += 2) {
j = ed_asic_inw(sc, 0);
sc->enaddr[i] = j & 0xff;