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Code Issues Releases Activity

- Add macros for newly added CPUID bits in the corresponding header files.

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- Use correct capticalization in xTPR as Intel uses in their documents.
- Use proper description instead of vendor code name in comment.
This commit is contained in:
Jung-uk Kim 2007-03-20 20:22:45 +00:00
parent ce533e82a2
commit 2498f259d4
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=167744
4 changed files with 8 additions and 4 deletions
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4
sys/amd64/amd64/identcpu.c
View File

@ -225,7 +225,7 @@ printcpuinfo(void)
"\004MON" /* MONITOR/MWAIT Instructions */
"\005DS_CPL" /* CPL Qualified Debug Store */
"\006VMX" /* Virtual Machine Extensions */
"\007SMX" /* LaGrange Technology */
"\007SMX" /* Safer Mode Extensions */
"\010EST" /* Enhanced SpeedStep */
"\011TM2" /* Thermal Monitor 2 */
"\012SSSE3" /* SSSE3 */
@ -233,7 +233,7 @@ printcpuinfo(void)
"\014<b11>"
"\015<b12>"
"\016CX16" /* CMPXCHG16B Instruction */
"\017XTPR" /* Send Task Priority Messages*/
"\017xTPR" /* Send Task Priority Messages*/
"\020<b15>"
"\021<b16>"
"\022<b17>"

2
sys/amd64/include/specialreg.h
View File

@ -116,12 +116,14 @@
#define CPUID2_MON 0x00000008
#define CPUID2_DS_CPL 0x00000010
#define CPUID2_VMX 0x00000020
#define CPUID2_SMX 0x00000040
#define CPUID2_EST 0x00000080
#define CPUID2_TM2 0x00000100
#define CPUID2_SSSE3 0x00000200
#define CPUID2_CNXTID 0x00000400
#define CPUID2_CX16 0x00002000
#define CPUID2_XTPR 0x00004000
#define CPUID2_DCA 0x00040000
/*
* Important bits in the AMD extended cpuid flags

4
sys/i386/i386/identcpu.c
View File

@ -745,7 +745,7 @@ printcpuinfo(void)
"\004MON" /* MONITOR/MWAIT Instructions */
"\005DS_CPL" /* CPL Qualified Debug Store */
"\006VMX" /* Virtual Machine Extensions */
"\007SMX" /* LaGrange Technology */
"\007SMX" /* Safer Mode Extensions */
"\010EST" /* Enhanced SpeedStep */
"\011TM2" /* Thermal Monitor 2 */
"\012SSSE3" /* SSSE3 */
@ -753,7 +753,7 @@ printcpuinfo(void)
"\014<b11>"
"\015<b12>"
"\016CX16" /* CMPXCHG16B Instruction */
"\017XTPR" /* Send Task Priority Messages*/
"\017xTPR" /* Send Task Priority Messages*/
"\020<b15>"
"\021<b16>"
"\022<b17>"

2
sys/i386/include/specialreg.h
View File

@ -108,12 +108,14 @@
#define CPUID2_MON 0x00000008
#define CPUID2_DS_CPL 0x00000010
#define CPUID2_VMX 0x00000020
#define CPUID2_SMX 0x00000040
#define CPUID2_EST 0x00000080
#define CPUID2_TM2 0x00000100
#define CPUID2_SSSE3 0x00000200
#define CPUID2_CNXTID 0x00000400
#define CPUID2_CX16 0x00002000
#define CPUID2_XTPR 0x00004000
#define CPUID2_DCA 0x00040000
/*
* Important bits in the AMD extended cpuid flags