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powerpc64: Align frequently used/exclusive data on cacheline boundaries

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This is effectively a merge from amd64 of r312888, r323235, and r333486.

I've been running this on my POWER9 Talos for some time now with no ill
effects.

Suggested by:	mjg
This commit is contained in:
Justin Hibbits 2018-08-19 19:00:44 +00:00
parent 65aee3a872
commit 290646564b
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=338071
1 changed files with 14 additions and 0 deletions
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14
sys/conf/ldscript.powerpc64
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@ -69,6 +69,20 @@ SECTIONS
.sbss2 : { *(.sbss2) }
/* Adjust the address for the data segment to the next page up. */
. = ALIGN(4096);
.data.read_frequently :
{
*(SORT_BY_ALIGNMENT(.data.read_frequently))
}
.data.read_mostly :
{
*(.data.read_mostly)
}
. = ALIGN(128);
.data.exclusive_cache_line :
{
*(.data.exclusive_cache_line)
}
. = ALIGN(128);
.data :
{
*(.data)