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1) Fix mii_phy_tick():
Current code does not report link loss correctly - when link goes down, mii_phy_tick() will notice that with up to mii_anegticks delay. If link goes up during this delay then link flapping will be unnoticed by driver. 2) mii_phy_add_media(): initialize sc->mii_anegticks for 10/100 media 3) Use MII_ANEGTICKS/MII_ANEGTICKS_GIGE defines instead of hardcoded values. Approved by: glebius (mentor) MFC after: 1 month
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parent
1c47c79eb3
commit
29aea9ec7d
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=158649
@ -219,20 +219,21 @@ mii_phy_tick(struct mii_softc *sc)
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/* Read the status register twice; BMSR_LINK is latch-low. */
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reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
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if (reg & BMSR_LINK) {
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/*
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* See above.
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*/
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sc->mii_ticks = 0; /* reset autonegotiation timer. */
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/* See above. */
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return (0);
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}
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/*
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* Only retry autonegotiation every N seconds.
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*/
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if (sc->mii_anegticks == 0) {
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sc->mii_anegticks = 17;
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/* Announce link loss right after it happens */
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if (sc->mii_ticks++ == 0)
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return (0);
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}
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if (++sc->mii_ticks <= sc->mii_anegticks)
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/* XXX: use default value if phy driver did not set mii_anegticks */
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if (sc->mii_anegticks == 0)
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sc->mii_anegticks = MII_ANEGTICKS_GIGE;
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/* Only retry autonegotiation every mii_anegticks ticks. */
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if (sc->mii_ticks <= sc->mii_anegticks)
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return (EJUSTRETURN);
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sc->mii_ticks = 0;
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@ -409,6 +410,9 @@ mii_phy_add_media(struct mii_softc *sc)
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struct mii_data *mii = sc->mii_pdata;
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const char *sep = "";
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/* Set aneg timer for 10/100 media. Gigabit media handled below. */
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sc->mii_anegticks = MII_ANEGTICKS;
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#define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL)
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#define PRINT(s) printf("%s%s", sep, s); sep = ", "
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@ -461,20 +465,16 @@ mii_phy_add_media(struct mii_softc *sc)
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/*
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* XXX Right now only handle 1000SX and 1000TX. Need
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* XXX to handle 1000LX and 1000CX some how.
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*
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* Note since it can take 5 seconds to auto-negotiate
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* a gigabit link, we make anegticks 10 seconds for
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* all the gigabit media types.
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*/
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if (sc->mii_extcapabilities & EXTSR_1000XHDX) {
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sc->mii_anegticks = 17;
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sc->mii_anegticks = MII_ANEGTICKS_GIGE;
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sc->mii_flags |= MIIF_IS_1000X;
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ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, 0,
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sc->mii_inst), MII_MEDIA_1000_X);
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PRINT("1000baseSX");
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}
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if (sc->mii_extcapabilities & EXTSR_1000XFDX) {
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sc->mii_anegticks = 17;
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sc->mii_anegticks = MII_ANEGTICKS_GIGE;
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sc->mii_flags |= MIIF_IS_1000X;
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ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, IFM_FDX,
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sc->mii_inst), MII_MEDIA_1000_X_FDX);
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@ -490,7 +490,7 @@ mii_phy_add_media(struct mii_softc *sc)
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* All 1000baseT PHYs have a 1000baseT control register.
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*/
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if (sc->mii_extcapabilities & EXTSR_1000THDX) {
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sc->mii_anegticks = 17;
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sc->mii_anegticks = MII_ANEGTICKS_GIGE;
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sc->mii_flags |= MIIF_HAVE_GTCR;
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mii->mii_media.ifm_mask |= IFM_ETH_MASTER;
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ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 0,
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@ -498,7 +498,7 @@ mii_phy_add_media(struct mii_softc *sc)
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PRINT("1000baseT");
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}
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if (sc->mii_extcapabilities & EXTSR_1000TFDX) {
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sc->mii_anegticks = 17;
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sc->mii_anegticks = MII_ANEGTICKS_GIGE;
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sc->mii_flags |= MIIF_HAVE_GTCR;
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mii->mii_media.ifm_mask |= IFM_ETH_MASTER;
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ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, IFM_FDX,
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