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Code Issues Releases Activity

o) Add NPDEPG, like NPTEPG but for PDEs.

Browse Source 
o) Remove NBPG, PGOFSET and PGSHIFT.  Use the standard names.
o) Remove some unused macros and move things from param.h to vmparam.h that
   belong in the latter.  (Actually, all of the kernel segment values, virtual
   addresses, etc., belong in one place, but this is a step in the right
   direction.)
This commit is contained in:
Juli Mallett 2010-04-17 07:20:01 +00:00
parent b6777295a6
commit 2ab78e3ca5
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=206746
12 changed files with 53 additions and 77 deletions
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40
sys/mips/include/param.h
View File

@ -100,28 +100,14 @@
#define CACHE_LINE_SHIFT 6
#define CACHE_LINE_SIZE (1 << CACHE_LINE_SHIFT)
#define NBPG 4096 /* bytes/page */
#define PGOFSET (NBPG-1) /* byte offset into page */
#define PGSHIFT 12 /* LOG2(NBPG) */
#define PAGE_SHIFT 12 /* LOG2(PAGE_SIZE) */
#define PAGE_SIZE (1<<PAGE_SHIFT) /* bytes/page */
#define PAGE_MASK (PAGE_SIZE-1)
#define NPTEPG (PAGE_SIZE/(sizeof (pt_entry_t)))
#define NBSEG 0x400000 /* bytes/segment */
#define SEGOFSET (NBSEG-1) /* byte offset into segment */
#define SEGSHIFT 22 /* LOG2(NBSEG) */
#define NPDEPG (PAGE_SIZE/(sizeof (pd_entry_t)))
#define MAXPAGESIZES 1 /* maximum number of supported page sizes */
/* XXXimp: This has moved to vmparam.h */
/* Also, this differs from the mips2 definition, but likely is better */
/* since this means the kernel won't chew up TLBs when it is executing */
/* code */
#define KERNBASE 0x80000000 /* start of kernel virtual */
#define BTOPKERNBASE ((u_long)KERNBASE >> PGSHIFT)
#define BLKDEV_IOSIZE 2048 /* xxx: Why is this 1/2 page? */
#define MAXDUMPPGS 1 /* xxx: why is this only one? */
@ -137,8 +123,8 @@
#define UPAGES 2
/* pages ("clicks") (4096 bytes) to disk blocks */
#define ctod(x) ((x) << (PGSHIFT - DEV_BSHIFT))
#define dtoc(x) ((x) >> (PGSHIFT - DEV_BSHIFT))
#define ctod(x) ((x) << (PAGE_SHIFT - DEV_BSHIFT))
#define dtoc(x) ((x) >> (PAGE_SHIFT - DEV_BSHIFT))
/*
* Map a ``block device block'' to a file system block.
@ -149,18 +135,18 @@
#define bdbtofsb(bn) ((bn) / (BLKDEV_IOSIZE/DEV_BSIZE))
/*
* Conversion macros
* Mach derived conversion macros
*/
#define mips_round_page(x) ((((unsigned long)(x)) + NBPG - 1) & ~(NBPG-1))
#define mips_trunc_page(x) ((unsigned long)(x) & ~(NBPG-1))
#define mips_btop(x) ((unsigned long)(x) >> PGSHIFT)
#define mips_ptob(x) ((unsigned long)(x) << PGSHIFT)
#define round_page mips_round_page
#define trunc_page mips_trunc_page
#define atop(x) ((unsigned long)(x) >> PAGE_SHIFT)
#define ptoa(x) ((unsigned long)(x) << PAGE_SHIFT)
#define round_page(x) (((unsigned long)(x) + PAGE_MASK) & ~PAGE_MASK)
#define trunc_page(x) ((unsigned long)(x) & ~PAGE_MASK)
#define pgtok(x) ((x) * (PAGE_SIZE / 1024))
#define atop(x) ((unsigned long)(x) >> PAGE_SHIFT)
#define ptoa(x) ((unsigned long)(x) << PAGE_SHIFT)
#define mips_btop(x) ((unsigned long)(x) >> PAGE_SHIFT)
#define mips_ptob(x) ((unsigned long)(x) << PAGE_SHIFT)
#define pgtok(x) ((unsigned long)(x) * (PAGE_SIZE / 1024))
#ifndef _KERNEL
#define DELAY(n) { register int N = (n); while (--N > 0); }

2
sys/mips/include/pte.h
View File

@ -126,7 +126,7 @@ typedef pt_entry_t *pd_entry_t;
#define pfn_to_vad(x) (((x) & PTE_FRAME) << PTE_SHIFT)
/* User virtual to pte offset in page table */
#define vad_to_pte_offset(adr) (((adr) >> PGSHIFT) & (NPTEPG -1))
#define vad_to_pte_offset(adr) (((adr) >> PAGE_SHIFT) & (NPTEPG -1))
#define mips_pg_v(entry) ((entry) & PTE_V)
#define mips_pg_wired(entry) ((entry) & PTE_WIRED)

31
sys/mips/include/vmparam.h
View File

@ -97,13 +97,19 @@
/* user/kernel map constants */
#define VM_MIN_ADDRESS ((vm_offset_t)0x00000000)
#define VM_MAX_ADDRESS ((vm_offset_t)(intptr_t)(int32_t)0xffffffff)
#define VM_MINUSER_ADDRESS ((vm_offset_t)0x00000000)
#define VM_MAXUSER_ADDRESS ((vm_offset_t)0x80000000)
#define VM_MAX_MMAP_ADDR VM_MAXUSER_ADDRESS
#define VM_MAX_ADDRESS ((vm_offset_t)0x80000000)
#define VM_MIN_KERNEL_ADDRESS ((vm_offset_t)0xC0000000)
#define VM_KERNEL_WIRED_ADDR_END (VM_MIN_KERNEL_ADDRESS)
#define VM_MAX_KERNEL_ADDRESS ((vm_offset_t)0xFFFFC000)
#define VM_MAX_KERNEL_ADDRESS ((vm_offset_t)0xFFFFC000)
#if 0
#define KERNBASE (VM_MIN_KERNEL_ADDRESS)
#else
#define KERNBASE ((vm_offset_t)(intptr_t)(int32_t)0x80000000)
#endif
/*
* Disable superpage reservations. (not sure if this is right
@ -175,23 +181,8 @@
*/
#define VM_NFREEORDER 9
/*
* XXXMIPS: This values need to be changed!!!
*/
#if 0
#define VM_MIN_ADDRESS ((vm_offset_t)0x0000000000010000)
#define VM_MAXUSER_ADDRESS ((vm_offset_t)MIPS_KSEG0_START-1)
#define VM_MAX_ADDRESS ((vm_offset_t)0x0000000100000000)
#define VM_MIN_KERNEL_ADDRESS ((vm_offset_t)MIPS_KSEG3_START)
#define VM_MAX_KERNEL_ADDRESS ((vm_offset_t)MIPS_KSEG3_END)
#define KERNBASE (VM_MIN_KERNEL_ADDRESS)
/* virtual sizes (bytes) for various kernel submaps */
#define VM_KMEM_SIZE (16*1024*1024) /* XXX ??? */
#endif
#define NBSEG 0x400000 /* bytes/segment */
#define SEGOFSET (NBSEG-1) /* byte offset into segment */
#define SEGSHIFT 22 /* LOG2(NBSEG) */
#define NBSEG (1 << SEGSHIFT) /* bytes/segment */
#define SEGOFSET (NBSEG-1) /* byte offset into segment */
#endif /* !_MACHINE_VMPARAM_H_ */

6
sys/mips/mips/exception.S
View File

@ -158,7 +158,7 @@ MipsDoTLBMiss:
lw k1, 0(k1) #08: k1=seg entry
mfc0 k0, COP_0_BAD_VADDR #09: k0=bad address (again)
beq k1, zero, 2f #0a: ==0 -- no page table
srl k0, PGSHIFT - 2 #0b: k0=VPN (aka va>>10)
srl k0, PAGE_SHIFT - 2 #0b: k0=VPN (aka va>>10)
andi k0, k0, ((NPTEPG/2) - 1) << 3 #0c: k0=page tab offset
#xxx mips64 unsafe?
@ -860,7 +860,7 @@ NLEAF(MipsTLBInvalidException)
nop
mfc0 k0, COP_0_BAD_VADDR
srl k0, PGSHIFT - 2
srl k0, PAGE_SHIFT - 2
andi k0, 0xffc
addu k1, k1, k0
@ -944,7 +944,7 @@ tlb_insert_random:
sll k1, k1, PAGE_SHIFT + 1
PTR_LA k0, _C_LABEL(pcpu_space)
addiu k0, (NBPG * 2)
addiu k0, (PAGE_SIZE * 2)
addu k0, k0, k1
/*

3
sys/mips/mips/genassym.c
View File

@ -90,8 +90,7 @@ ASSYM(VM_MAXUSER_ADDRESS, VM_MAXUSER_ADDRESS);
ASSYM(SIGF_UC, offsetof(struct sigframe, sf_uc));
ASSYM(SIGFPE, SIGFPE);
ASSYM(PAGE_SHIFT, PAGE_SHIFT);
ASSYM(PGSHIFT, PGSHIFT);
ASSYM(NBPG, NBPG);
ASSYM(PAGE_SIZE, PAGE_SIZE);
ASSYM(SEGSHIFT, SEGSHIFT);
ASSYM(NPTEPG, NPTEPG);
ASSYM(TDF_NEEDRESCHED, TDF_NEEDRESCHED);

2
sys/mips/mips/locore.S
View File

@ -178,7 +178,7 @@ VECTOR(_locore, unknown)
* Initialize stack and call machine startup.
*/
PTR_LA sp, _C_LABEL(pcpu_space)
addiu sp, (NBPG * 2) - CALLFRAME_SIZ
addiu sp, (PAGE_SIZE * 2) - CALLFRAME_SIZ
sw zero, CALLFRAME_SIZ - 4(sp) # Zero out old ra for debugger
sw zero, CALLFRAME_SIZ - 8(sp) # Zero out old fp for debugger

2
sys/mips/mips/mpboot.S
View File

@ -66,7 +66,7 @@ GLOBAL(mpentry)
* Initialize stack and call machine startup
*/
PTR_LA sp, _C_LABEL(pcpu_space)
addiu sp, (NBPG * 2) - CALLFRAME_SIZ
addiu sp, (PAGE_SIZE * 2) - CALLFRAME_SIZ
sll t0, s0, PAGE_SHIFT + 1
addu sp, sp, t0

18
sys/mips/mips/pmap.c
View File

@ -609,7 +609,7 @@ pmap_invalidate_page_action(void *arg)
pmap->pm_asid[PCPU_GET(cpuid)].gen = 0;
return;
}
va = pmap_va_asid(pmap, (va & ~PGOFSET));
va = pmap_va_asid(pmap, (va & ~PAGE_MASK));
mips_TBIS(va);
}
@ -765,7 +765,7 @@ pmap_kremove(vm_offset_t va)
/*
* Write back all caches from the page being destroyed
*/
mips_dcache_wbinv_range_index(va, NBPG);
mips_dcache_wbinv_range_index(va, PAGE_SIZE);
pte = pmap_pte(kernel_pmap, va);
*pte = PTE_G;
@ -1516,7 +1516,7 @@ pmap_remove_page(struct pmap *pmap, vm_offset_t va)
/*
* Write back all caches from the page being destroyed
*/
mips_dcache_wbinv_range_index(va, NBPG);
mips_dcache_wbinv_range_index(va, PAGE_SIZE);
/*
* get a local va for mappings for this pmap.
@ -1603,7 +1603,7 @@ pmap_remove_all(vm_page_t m)
* the page being destroyed
*/
if (m->md.pv_list_count == 1)
mips_dcache_wbinv_range_index(pv->pv_va, NBPG);
mips_dcache_wbinv_range_index(pv->pv_va, PAGE_SIZE);
pv->pv_pmap->pm_stats.resident_count--;
@ -1902,8 +1902,8 @@ pmap_enter(pmap_t pmap, vm_offset_t va, vm_prot_t access, vm_page_t m,
*/
if (!is_kernel_pmap(pmap) && (pmap == &curproc->p_vmspace->vm_pmap) &&
(prot & VM_PROT_EXECUTE)) {
mips_icache_sync_range(va, NBPG);
mips_dcache_wbinv_range(va, NBPG);
mips_icache_sync_range(va, PAGE_SIZE);
mips_dcache_wbinv_range(va, PAGE_SIZE);
}
vm_page_unlock_queues();
PMAP_UNLOCK(pmap);
@ -2032,8 +2032,8 @@ pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
* unresolvable TLB miss may occur. */
if (pmap == &curproc->p_vmspace->vm_pmap) {
va &= ~PAGE_MASK;
mips_icache_sync_range(va, NBPG);
mips_dcache_wbinv_range(va, NBPG);
mips_icache_sync_range(va, PAGE_SIZE);
mips_dcache_wbinv_range(va, PAGE_SIZE);
}
}
return (mpte);
@ -3078,7 +3078,7 @@ pmap_flush_pvcache(vm_page_t m)
if (m != NULL) {
for (pv = TAILQ_FIRST(&m->md.pv_list); pv;
pv = TAILQ_NEXT(pv, pv_list)) {
mips_dcache_wbinv_range_index(pv->pv_va, NBPG);
mips_dcache_wbinv_range_index(pv->pv_va, PAGE_SIZE);
}
}
}

2
sys/mips/mips/support.S
View File

@ -210,7 +210,7 @@ END(fillw)
* mem_zero_page(addr);
*/
LEAF(mem_zero_page)
li v0, NBPG
li v0, PAGE_SIZE
1:
subu v0, 8
sd zero, 0(a0)

8
sys/mips/mips/tlb.S
View File

@ -240,7 +240,7 @@ LEAF(Mips_TLBFlush)
# MIPS_KSEG0_START + 2 * i * PAGE_SIZE;
# One bogus value for every TLB entry might cause MCHECK exception
#
sll t3, t1, PGSHIFT + 1
sll t3, t1, PAGE_SHIFT + 1
li v0, MIPS_KSEG0_START # invalid address
addu v0, t3
/*
@ -299,7 +299,7 @@ LEAF(Mips_TLBFlushAddr)
# address calculated by following expression:
# MIPS_KSEG0_START + 2 * i * PAGE_SIZE;
# One bogus value for every TLB entry might cause MCHECK exception
sll v0, PGSHIFT + 1
sll v0, PAGE_SHIFT + 1
addu t1, v0
_MTC0 t1, COP_0_TLB_HI # Mark entry high as invalid
@ -482,7 +482,7 @@ LEAF(mips_TBIAP)
# MIPS_KSEG0_START + 2 * i * PAGE_SIZE;
# One bogus value for every TLB entry might cause MCHECK exception
#
sll t3, t1, PGSHIFT + 1
sll t3, t1, PAGE_SHIFT + 1
li v0, MIPS_KSEG0_START # invalid address
addu v0, t3
@ -507,7 +507,7 @@ LEAF(mips_TBIAP)
tlbwi # invalidate the TLB entry
2:
addu t1, t1, 1
addu v0, 1 << (PGSHIFT + 1)
addu v0, 1 << (PAGE_SHIFT + 1)
bne t1, t2, 1b
nop

12
sys/mips/mips/trap.c
View File

@ -378,12 +378,12 @@ trap(struct trapframe *trapframe)
if (!(pte = pmap_segmap(kernel_pmap,
trapframe->badvaddr)))
panic("trap: ktlbmod: invalid segmap");
pte += (trapframe->badvaddr >> PGSHIFT) & (NPTEPG - 1);
pte += (trapframe->badvaddr >> PAGE_SHIFT) & (NPTEPG - 1);
entry = *pte;
#ifdef SMP
/* It is possible that some other CPU changed m-bit */
if (!mips_pg_v(entry) || (entry & mips_pg_m_bit())) {
trapframe->badvaddr &= ~PGOFSET;
trapframe->badvaddr &= ~PAGE_MASK;
pmap_update_page(kernel_pmap,
trapframe->badvaddr, entry);
PMAP_UNLOCK(kernel_pmap);
@ -401,7 +401,7 @@ trap(struct trapframe *trapframe)
}
entry |= mips_pg_m_bit();
*pte = entry;
trapframe->badvaddr &= ~PGOFSET;
trapframe->badvaddr &= ~PAGE_MASK;
pmap_update_page(kernel_pmap, trapframe->badvaddr, entry);
pa = mips_tlbpfn_to_paddr(entry);
if (!page_is_managed(pa))
@ -421,12 +421,12 @@ trap(struct trapframe *trapframe)
PMAP_LOCK(pmap);
if (!(pte = pmap_segmap(pmap, trapframe->badvaddr)))
panic("trap: utlbmod: invalid segmap");
pte += (trapframe->badvaddr >> PGSHIFT) & (NPTEPG - 1);
pte += (trapframe->badvaddr >> PAGE_SHIFT) & (NPTEPG - 1);
entry = *pte;
#ifdef SMP
/* It is possible that some other CPU changed m-bit */
if (!mips_pg_v(entry) || (entry & mips_pg_m_bit())) {
trapframe->badvaddr = (trapframe->badvaddr & ~PGOFSET);
trapframe->badvaddr = (trapframe->badvaddr & ~PAGE_MASK);
pmap_update_page(pmap, trapframe->badvaddr, entry);
PMAP_UNLOCK(pmap);
goto out;
@ -445,7 +445,7 @@ trap(struct trapframe *trapframe)
}
entry |= mips_pg_m_bit();
*pte = entry;
trapframe->badvaddr = (trapframe->badvaddr & ~PGOFSET);
trapframe->badvaddr = (trapframe->badvaddr & ~PAGE_MASK);
pmap_update_page(pmap, trapframe->badvaddr, entry);
trapframe->badvaddr |= (pmap->pm_asid[PCPU_GET(cpuid)].asid << VMTLB_PID_SHIFT);
pa = mips_tlbpfn_to_paddr(entry);

4
sys/mips/mips/vm_machdep.c
View File

@ -219,7 +219,7 @@ cpu_thread_swapin(struct thread *td)
*/
if (!(pte = pmap_segmap(kernel_pmap, td->td_md.md_realstack)))
panic("cpu_thread_swapin: invalid segmap");
pte += ((vm_offset_t)td->td_md.md_realstack >> PGSHIFT) & (NPTEPG - 1);
pte += ((vm_offset_t)td->td_md.md_realstack >> PAGE_SHIFT) & (NPTEPG - 1);
for (i = 0; i < KSTACK_PAGES - 1; i++) {
td->td_md.md_upte[i] = *pte & ~(PTE_RO|PTE_WIRED);
@ -249,7 +249,7 @@ cpu_thread_alloc(struct thread *td)
if (!(pte = pmap_segmap(kernel_pmap, td->td_md.md_realstack)))
panic("cpu_thread_alloc: invalid segmap");
pte += ((vm_offset_t)td->td_md.md_realstack >> PGSHIFT) & (NPTEPG - 1);
pte += ((vm_offset_t)td->td_md.md_realstack >> PAGE_SHIFT) & (NPTEPG - 1);
for (i = 0; i < KSTACK_PAGES - 1; i++) {
td->td_md.md_upte[i] = *pte & ~(PTE_RO|PTE_WIRED);