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Add a definition for the load store unit control register.
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svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=82002
@ -62,6 +62,8 @@
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#define AA_IMMU_TSB 0x28
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#define AA_IMMU_TAR 0x30
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#define ASI_LSU_CTL_REG 0x45
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#define ASI_INTR_DISPATCH_STATUS 0x48
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#define ASI_INTR_RECEIVE 0x49
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