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There's a small set of events on Nehalem, that are not supported in

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processors with CPUID signature 06_1AH, 06_1EH, and 06_1FH.

Refuse to allocate them on unsupported model.

Submitted by:	Davide Italiano <davide.italiano@gmail.com>
MFC after:	1 month
This commit is contained in:
Fabien Thomas 2011-12-12 13:12:55 +00:00
parent 4d9a3537ff
commit 2dde521a9a
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=228438
1 changed files with 12 additions and 1 deletions
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13
sys/dev/hwpmc/hwpmc_core.c
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@ -41,6 +41,7 @@ __FBSDID("$FreeBSD$");
#include <machine/apicvar.h>
#include <machine/cpu.h>
#include <machine/cpufunc.h>
#include <machine/md_var.h>
#include <machine/specialreg.h>
#define CORE_CPUID_REQUEST 0xA
@ -1553,7 +1554,7 @@ static int
iap_allocate_pmc(int cpu, int ri, struct pmc *pm,
const struct pmc_op_pmcallocate *a)
{
int n;
int n, model;
enum pmc_event ev;
struct iap_event_descr *ie;
uint32_t c, caps, config, cpuflag, evsel, mask;
@ -1573,6 +1574,16 @@ iap_allocate_pmc(int cpu, int ri, struct pmc *pm,
if (iap_architectural_event_is_unsupported(ev))
return (EOPNOTSUPP);
/*
* A small number of events are not supported in all the
* processors based on a given microarchitecture.
*/
if (ev == PMC_EV_IAP_EVENT_0FH_01H || ev == PMC_EV_IAP_EVENT_0FH_80H) {
model = ((cpu_id & 0xF0000) >> 12) | ((cpu_id & 0xF0) >> 4);
if (core_cputype == PMC_CPU_INTEL_COREI7 && model != 0x2E)
return (EINVAL);
}
switch (core_cputype) {
case PMC_CPU_INTEL_COREI7:
if (iap_event_corei7_ok_on_counter(ev, ri) == 0)