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ntb_hw: Add tunable to disable write-combining
The tunable 'hw.ntb.enable_writecombine' may be set to zero to administratively disable write combining the mapped NTB region. Sponsored by: EMC / Isilon Storage Division
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3062870897
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=291030
@ -326,6 +326,10 @@ SYSCTL_UINT(_hw_ntb, OID_AUTO, debug_level, CTLFLAG_RWTUN,
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} \
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} while (0)
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static unsigned g_ntb_enable_wc = 1;
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SYSCTL_UINT(_hw_ntb, OID_AUTO, enable_writecombine, CTLFLAG_RDTUN,
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&g_ntb_enable_wc, 0, "Set to 1 to map memory windows write combining");
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static struct ntb_hw_info pci_ids[] = {
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/* XXX: PS/SS IDs left out until they are supported. */
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{ 0x0C4E8086, "BWD Atom Processor S1200 Non-Transparent Bridge B2B",
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@ -766,10 +770,13 @@ map_memory_window_bar(struct ntb_softc *ntb, struct ntb_pci_bar_info *bar)
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save_bar_parameters(bar);
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}
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print_map_success(ntb, bar, "mw");
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if (g_ntb_enable_wc == 0)
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return (0);
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/* Mark bar region as write combining to improve performance. */
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rc = pmap_change_attr((vm_offset_t)bar->vbase, bar->size,
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VM_MEMATTR_WRITE_COMBINING);
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print_map_success(ntb, bar, "mw");
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if (rc == 0)
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device_printf(ntb->device,
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"Marked BAR%d v:[%p-%p] p:[%p-%p] as "
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