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ntb_hw: Add tunable to disable write-combining

The tunable 'hw.ntb.enable_writecombine' may be set to zero to
administratively disable write combining the mapped NTB region.

Sponsored by:	EMC / Isilon Storage Division
This commit is contained in:
Conrad Meyer 2015-11-18 22:20:13 +00:00
parent 552573e11c
commit 3062870897
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=291030

View File

@ -326,6 +326,10 @@ SYSCTL_UINT(_hw_ntb, OID_AUTO, debug_level, CTLFLAG_RWTUN,
} \
} while (0)
static unsigned g_ntb_enable_wc = 1;
SYSCTL_UINT(_hw_ntb, OID_AUTO, enable_writecombine, CTLFLAG_RDTUN,
&g_ntb_enable_wc, 0, "Set to 1 to map memory windows write combining");
static struct ntb_hw_info pci_ids[] = {
/* XXX: PS/SS IDs left out until they are supported. */
{ 0x0C4E8086, "BWD Atom Processor S1200 Non-Transparent Bridge B2B",
@ -766,10 +770,13 @@ map_memory_window_bar(struct ntb_softc *ntb, struct ntb_pci_bar_info *bar)
save_bar_parameters(bar);
}
print_map_success(ntb, bar, "mw");
if (g_ntb_enable_wc == 0)
return (0);
/* Mark bar region as write combining to improve performance. */
rc = pmap_change_attr((vm_offset_t)bar->vbase, bar->size,
VM_MEMATTR_WRITE_COMBINING);
print_map_success(ntb, bar, "mw");
if (rc == 0)
device_printf(ntb->device,
"Marked BAR%d v:[%p-%p] p:[%p-%p] as "