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Update this file so that BIND on ARM can actually work. I quote:
The problem was, isc_atomic_cmpxchg() is almost like our atomic_cmpset_32(), except it expects the old value to be returned, whereas our atomic_cmpset_32 returns 1 on success, or 0 on failure. So I re-implemented something suitable. Submitted by: cognet Reviewed by: bsdimp
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svn2git
2020-12-20 02:59:44 +00:00
svn path=/vendor/bind9/dist/; revision=174206 svn path=/vendor/bind9/9.4.2/; revision=174208; tag=vendor/bind9/9.4.2
@ -49,7 +49,29 @@ isc_atomic_store(isc_int32_t *p, isc_int32_t val)
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static inline isc_int32_t
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isc_atomic_cmpxchg(isc_int32_t *p, isc_int32_t cmpval, isc_int32_t val)
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{
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return atomic_cmpset_int(p, cmpval, val);
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register int done, ras_start;
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__asm __volatile("1:\n"
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"adr %1, 1b\n"
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"mov %0, #0xe0000004\n"
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"str %1, [%0]\n"
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"mov %0, #0xe0000008\n"
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"adr %1, 2f\n"
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"str %1, [%0]\n"
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"ldr %1, [%2]\n"
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"cmp %1, %3\n"
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"streq %4, [%2]\n"
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"2:\n"
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"mov %3, #0\n"
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"mov %0, #0xe0000004\n"
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"str %3, [%0]\n"
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"mov %3, #0xffffffff\n"
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"mov %0, #0xe0000008\n"
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"str %3, [%0]\n"
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: "=r" (ras_start), "=r" (done)
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,"+r" (p), "+r" (cmpval), "+r" (val) : : "memory");
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return (done);
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}
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#else /* !FreeBSD */
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