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libvmmapi: Move more amd64-specific ioctl wrappers to vmmapi_machdep.c
No functional change intended. Reviewed by: corvink, jhb MFC after: 2 weeks Sponsored by: Innovate UK Differential Revision: https://reviews.freebsd.org/D41002
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@ -275,6 +275,130 @@ vm_inject_nmi(struct vcpu *vcpu)
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return (vcpu_ioctl(vcpu, VM_INJECT_NMI, &vmnmi));
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}
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int
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vm_inject_exception(struct vcpu *vcpu, int vector, int errcode_valid,
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uint32_t errcode, int restart_instruction)
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{
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struct vm_exception exc;
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exc.vector = vector;
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exc.error_code = errcode;
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exc.error_code_valid = errcode_valid;
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exc.restart_instruction = restart_instruction;
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return (vcpu_ioctl(vcpu, VM_INJECT_EXCEPTION, &exc));
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}
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int
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vm_readwrite_kernemu_device(struct vcpu *vcpu, vm_paddr_t gpa,
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bool write, int size, uint64_t *value)
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{
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struct vm_readwrite_kernemu_device irp = {
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.access_width = fls(size) - 1,
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.gpa = gpa,
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.value = write ? *value : ~0ul,
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};
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long cmd = (write ? VM_SET_KERNEMU_DEV : VM_GET_KERNEMU_DEV);
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int rc;
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rc = vcpu_ioctl(vcpu, cmd, &irp);
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if (rc == 0 && !write)
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*value = irp.value;
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return (rc);
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}
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int
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vm_get_x2apic_state(struct vcpu *vcpu, enum x2apic_state *state)
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{
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int error;
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struct vm_x2apic x2apic;
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bzero(&x2apic, sizeof(x2apic));
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error = vcpu_ioctl(vcpu, VM_GET_X2APIC_STATE, &x2apic);
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*state = x2apic.state;
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return (error);
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}
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int
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vm_set_x2apic_state(struct vcpu *vcpu, enum x2apic_state state)
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{
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int error;
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struct vm_x2apic x2apic;
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bzero(&x2apic, sizeof(x2apic));
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x2apic.state = state;
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error = vcpu_ioctl(vcpu, VM_SET_X2APIC_STATE, &x2apic);
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return (error);
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}
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int
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vm_get_hpet_capabilities(struct vmctx *ctx, uint32_t *capabilities)
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{
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int error;
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struct vm_hpet_cap cap;
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bzero(&cap, sizeof(struct vm_hpet_cap));
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error = ioctl(ctx->fd, VM_GET_HPET_CAPABILITIES, &cap);
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if (capabilities != NULL)
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*capabilities = cap.capabilities;
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return (error);
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}
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int
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vm_rtc_write(struct vmctx *ctx, int offset, uint8_t value)
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{
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struct vm_rtc_data rtcdata;
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int error;
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bzero(&rtcdata, sizeof(struct vm_rtc_data));
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rtcdata.offset = offset;
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rtcdata.value = value;
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error = ioctl(ctx->fd, VM_RTC_WRITE, &rtcdata);
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return (error);
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}
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int
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vm_rtc_read(struct vmctx *ctx, int offset, uint8_t *retval)
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{
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struct vm_rtc_data rtcdata;
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int error;
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bzero(&rtcdata, sizeof(struct vm_rtc_data));
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rtcdata.offset = offset;
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error = ioctl(ctx->fd, VM_RTC_READ, &rtcdata);
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if (error == 0)
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*retval = rtcdata.value;
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return (error);
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}
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int
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vm_rtc_settime(struct vmctx *ctx, time_t secs)
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{
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struct vm_rtc_time rtctime;
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int error;
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bzero(&rtctime, sizeof(struct vm_rtc_time));
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rtctime.secs = secs;
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error = ioctl(ctx->fd, VM_RTC_SETTIME, &rtctime);
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return (error);
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}
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int
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vm_rtc_gettime(struct vmctx *ctx, time_t *secs)
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{
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struct vm_rtc_time rtctime;
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int error;
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bzero(&rtctime, sizeof(struct vm_rtc_time));
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error = ioctl(ctx->fd, VM_RTC_GETTIME, &rtctime);
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if (error == 0)
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*secs = rtctime.secs;
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return (error);
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}
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/*
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* From Intel Vol 3a:
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* Table 9-1. IA-32 Processor States Following Power-up, Reset or INIT
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@ -679,38 +679,6 @@ vm_reinit(struct vmctx *ctx)
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return (ioctl(ctx->fd, VM_REINIT, 0));
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}
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int
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vm_inject_exception(struct vcpu *vcpu, int vector, int errcode_valid,
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uint32_t errcode, int restart_instruction)
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{
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struct vm_exception exc;
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exc.vector = vector;
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exc.error_code = errcode;
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exc.error_code_valid = errcode_valid;
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exc.restart_instruction = restart_instruction;
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return (vcpu_ioctl(vcpu, VM_INJECT_EXCEPTION, &exc));
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}
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int
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vm_readwrite_kernemu_device(struct vcpu *vcpu, vm_paddr_t gpa,
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bool write, int size, uint64_t *value)
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{
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struct vm_readwrite_kernemu_device irp = {
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.access_width = fls(size) - 1,
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.gpa = gpa,
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.value = write ? *value : ~0ul,
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};
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long cmd = (write ? VM_SET_KERNEMU_DEV : VM_GET_KERNEMU_DEV);
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int rc;
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rc = vcpu_ioctl(vcpu, cmd, &irp);
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if (rc == 0 && !write)
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*value = irp.value;
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return (rc);
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}
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int
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vm_capability_name2type(const char *capname)
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{
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@ -924,33 +892,6 @@ vm_get_stat_desc(struct vmctx *ctx, int index)
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return (NULL);
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}
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int
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vm_get_x2apic_state(struct vcpu *vcpu, enum x2apic_state *state)
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{
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int error;
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struct vm_x2apic x2apic;
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bzero(&x2apic, sizeof(x2apic));
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error = vcpu_ioctl(vcpu, VM_GET_X2APIC_STATE, &x2apic);
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*state = x2apic.state;
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return (error);
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}
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int
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vm_set_x2apic_state(struct vcpu *vcpu, enum x2apic_state state)
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{
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int error;
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struct vm_x2apic x2apic;
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bzero(&x2apic, sizeof(x2apic));
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x2apic.state = state;
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error = vcpu_ioctl(vcpu, VM_SET_X2APIC_STATE, &x2apic);
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return (error);
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}
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int
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vm_get_gpa_pmap(struct vmctx *ctx, uint64_t gpa, uint64_t *pte, int *num)
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{
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@ -971,19 +912,6 @@ vm_get_gpa_pmap(struct vmctx *ctx, uint64_t gpa, uint64_t *pte, int *num)
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return (error);
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}
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int
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vm_get_hpet_capabilities(struct vmctx *ctx, uint32_t *capabilities)
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{
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int error;
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struct vm_hpet_cap cap;
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bzero(&cap, sizeof(struct vm_hpet_cap));
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error = ioctl(ctx->fd, VM_GET_HPET_CAPABILITIES, &cap);
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if (capabilities != NULL)
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*capabilities = cap.capabilities;
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return (error);
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}
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int
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vm_gla2gpa(struct vcpu *vcpu, struct vm_guest_paging *paging,
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uint64_t gla, int prot, uint64_t *gpa, int *fault)
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@ -1236,58 +1164,6 @@ vm_set_intinfo(struct vcpu *vcpu, uint64_t info1)
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return (error);
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}
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int
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vm_rtc_write(struct vmctx *ctx, int offset, uint8_t value)
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{
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struct vm_rtc_data rtcdata;
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int error;
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bzero(&rtcdata, sizeof(struct vm_rtc_data));
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rtcdata.offset = offset;
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rtcdata.value = value;
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error = ioctl(ctx->fd, VM_RTC_WRITE, &rtcdata);
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return (error);
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}
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int
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vm_rtc_read(struct vmctx *ctx, int offset, uint8_t *retval)
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{
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struct vm_rtc_data rtcdata;
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int error;
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bzero(&rtcdata, sizeof(struct vm_rtc_data));
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rtcdata.offset = offset;
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error = ioctl(ctx->fd, VM_RTC_READ, &rtcdata);
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if (error == 0)
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*retval = rtcdata.value;
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return (error);
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}
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int
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vm_rtc_settime(struct vmctx *ctx, time_t secs)
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{
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struct vm_rtc_time rtctime;
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int error;
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bzero(&rtctime, sizeof(struct vm_rtc_time));
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rtctime.secs = secs;
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error = ioctl(ctx->fd, VM_RTC_SETTIME, &rtctime);
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return (error);
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}
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int
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vm_rtc_gettime(struct vmctx *ctx, time_t *secs)
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{
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struct vm_rtc_time rtctime;
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int error;
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bzero(&rtctime, sizeof(struct vm_rtc_time));
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error = ioctl(ctx->fd, VM_RTC_GETTIME, &rtctime);
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if (error == 0)
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*secs = rtctime.secs;
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return (error);
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}
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int
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vm_restart_instruction(struct vcpu *vcpu)
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{
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@ -158,9 +158,9 @@ int vm_run(struct vcpu *vcpu, struct vm_run *vmrun);
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int vm_suspend(struct vmctx *ctx, enum vm_suspend_how how);
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int vm_reinit(struct vmctx *ctx);
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int vm_apicid2vcpu(struct vmctx *ctx, int apicid);
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#ifdef __amd64__
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int vm_inject_exception(struct vcpu *vcpu, int vector,
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int errcode_valid, uint32_t errcode, int restart_instruction);
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#ifdef __amd64__
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int vm_lapic_irq(struct vcpu *vcpu, int vector);
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int vm_lapic_local_irq(struct vcpu *vcpu, int vector);
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int vm_lapic_msi(struct vmctx *ctx, uint64_t addr, uint64_t msg);
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@ -174,9 +174,9 @@ int vm_isa_pulse_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq);
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int vm_isa_set_irq_trigger(struct vmctx *ctx, int atpic_irq,
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enum vm_intr_trigger trigger);
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int vm_inject_nmi(struct vcpu *vcpu);
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#endif
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int vm_readwrite_kernemu_device(struct vcpu *vcpu,
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vm_paddr_t gpa, bool write, int size, uint64_t *value);
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#endif
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int vm_capability_name2type(const char *capname);
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const char *vm_capability_type2name(int type);
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int vm_get_capability(struct vcpu *vcpu, enum vm_cap_type cap,
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@ -206,10 +206,12 @@ uint64_t *vm_get_stats(struct vcpu *vcpu, struct timeval *ret_tv,
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int *ret_entries);
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const char *vm_get_stat_desc(struct vmctx *ctx, int index);
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#ifdef __amd64__
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int vm_get_x2apic_state(struct vcpu *vcpu, enum x2apic_state *s);
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int vm_set_x2apic_state(struct vcpu *vcpu, enum x2apic_state s);
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int vm_get_hpet_capabilities(struct vmctx *ctx, uint32_t *capabilities);
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#endif
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/*
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* Translate the GLA range [gla,gla+len) into GPA segments in 'iov'.
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@ -227,11 +229,13 @@ void vm_copyin(struct iovec *guest_iov, void *host_dst, size_t len);
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void vm_copyout(const void *host_src, struct iovec *guest_iov, size_t len);
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void vm_copy_teardown(struct iovec *iov, int iovcnt);
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#ifdef __amd64__
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/* RTC */
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int vm_rtc_write(struct vmctx *ctx, int offset, uint8_t value);
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int vm_rtc_read(struct vmctx *ctx, int offset, uint8_t *retval);
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int vm_rtc_settime(struct vmctx *ctx, time_t secs);
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int vm_rtc_gettime(struct vmctx *ctx, time_t *secs);
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#endif
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/* Reset vcpu register state */
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int vcpu_reset(struct vcpu *vcpu);
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