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Style(9) changes.
This commit is contained in:
parent
3eb9ab5255
commit
34415ac907
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=228450
@ -52,9 +52,7 @@ __FBSDID("$FreeBSD$");
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#include <machine/vmparam.h>
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#include <machine/vmparam.h>
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#include <mips/atheros/ar71xxreg.h>
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#include <mips/atheros/ar71xxreg.h>
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#include <mips/atheros/ar71xx_chip.h>
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#include <mips/atheros/ar71xx_chip.h>
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#include <mips/atheros/ar71xx_cpudef.h>
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#include <mips/atheros/ar71xx_cpudef.h>
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#include <mips/sentry5/s5reg.h>
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#include <mips/sentry5/s5reg.h>
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@ -180,6 +178,7 @@ ar71xx_chip_set_pll_ge(int unit, int speed)
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static void
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static void
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ar71xx_chip_ddr_flush_ge(int unit)
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ar71xx_chip_ddr_flush_ge(int unit)
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{
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{
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switch (unit) {
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switch (unit) {
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case 0:
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case 0:
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ar71xx_ddr_flush(AR71XX_WB_FLUSH_GE0);
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ar71xx_ddr_flush(AR71XX_WB_FLUSH_GE0);
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@ -209,18 +208,24 @@ ar71xx_chip_get_eth_pll(unsigned int mac, int speed)
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static void
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static void
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ar71xx_chip_init_usb_peripheral(void)
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ar71xx_chip_init_usb_peripheral(void)
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{
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{
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ar71xx_device_stop(RST_RESET_USB_OHCI_DLL | RST_RESET_USB_HOST | RST_RESET_USB_PHY);
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ar71xx_device_stop(RST_RESET_USB_OHCI_DLL |
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RST_RESET_USB_HOST | RST_RESET_USB_PHY);
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DELAY(1000);
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DELAY(1000);
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ar71xx_device_start(RST_RESET_USB_OHCI_DLL | RST_RESET_USB_HOST | RST_RESET_USB_PHY);
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ar71xx_device_start(RST_RESET_USB_OHCI_DLL |
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RST_RESET_USB_HOST | RST_RESET_USB_PHY);
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DELAY(1000);
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DELAY(1000);
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ATH_WRITE_REG(AR71XX_USB_CTRL_CONFIG,
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ATH_WRITE_REG(AR71XX_USB_CTRL_CONFIG,
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USB_CTRL_CONFIG_OHCI_DES_SWAP | USB_CTRL_CONFIG_OHCI_BUF_SWAP |
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USB_CTRL_CONFIG_OHCI_DES_SWAP |
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USB_CTRL_CONFIG_EHCI_DES_SWAP | USB_CTRL_CONFIG_EHCI_BUF_SWAP);
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USB_CTRL_CONFIG_OHCI_BUF_SWAP |
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USB_CTRL_CONFIG_EHCI_DES_SWAP |
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USB_CTRL_CONFIG_EHCI_BUF_SWAP);
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ATH_WRITE_REG(AR71XX_USB_CTRL_FLADJ,
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ATH_WRITE_REG(AR71XX_USB_CTRL_FLADJ,
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(32 << USB_CTRL_FLADJ_HOST_SHIFT) | (3 << USB_CTRL_FLADJ_A5_SHIFT));
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(32 << USB_CTRL_FLADJ_HOST_SHIFT) |
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(3 << USB_CTRL_FLADJ_A5_SHIFT));
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DELAY(1000);
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DELAY(1000);
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}
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}
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@ -125,12 +125,13 @@ ar724x_chip_device_stopped(uint32_t mask)
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static void
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static void
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ar724x_chip_set_pll_ge(int unit, int speed)
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ar724x_chip_set_pll_ge(int unit, int speed)
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{
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{
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switch (unit) {
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switch (unit) {
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case 0:
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case 0:
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/* TODO */
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/* XXX TODO */
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break;
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break;
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case 1:
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case 1:
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/* TODO */
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/* XXX TODO */
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break;
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break;
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default:
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default:
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printf("%s: invalid PLL set for arge unit: %d\n",
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printf("%s: invalid PLL set for arge unit: %d\n",
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@ -142,6 +143,7 @@ ar724x_chip_set_pll_ge(int unit, int speed)
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static void
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static void
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ar724x_chip_ddr_flush_ge(int unit)
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ar724x_chip_ddr_flush_ge(int unit)
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{
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{
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switch (unit) {
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switch (unit) {
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case 0:
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case 0:
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ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_GE0);
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ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_GE0);
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@ -159,13 +161,14 @@ ar724x_chip_ddr_flush_ge(int unit)
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static void
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static void
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ar724x_chip_ddr_flush_ip2(void)
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ar724x_chip_ddr_flush_ip2(void)
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{
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{
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ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_PCIE);
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ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_PCIE);
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}
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}
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static uint32_t
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static uint32_t
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ar724x_chip_get_eth_pll(unsigned int mac, int speed)
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ar724x_chip_get_eth_pll(unsigned int mac, int speed)
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{
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{
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return 0;
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return 0;
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}
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}
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@ -175,7 +178,6 @@ ar724x_chip_init_usb_peripheral(void)
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switch (ar71xx_soc) {
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switch (ar71xx_soc) {
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case AR71XX_SOC_AR7240:
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case AR71XX_SOC_AR7240:
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ar71xx_device_stop(AR724X_RESET_MODULE_USB_OHCI_DLL |
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ar71xx_device_stop(AR724X_RESET_MODULE_USB_OHCI_DLL |
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AR724X_RESET_USB_HOST);
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AR724X_RESET_USB_HOST);
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DELAY(1000);
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DELAY(1000);
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@ -195,7 +197,6 @@ ar724x_chip_init_usb_peripheral(void)
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case AR71XX_SOC_AR7241:
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case AR71XX_SOC_AR7241:
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case AR71XX_SOC_AR7242:
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case AR71XX_SOC_AR7242:
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ar71xx_device_start(AR724X_RESET_MODULE_USB_OHCI_DLL);
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ar71xx_device_start(AR724X_RESET_MODULE_USB_OHCI_DLL);
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DELAY(100);
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DELAY(100);
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@ -208,7 +209,6 @@ ar724x_chip_init_usb_peripheral(void)
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break;
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break;
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default:
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default:
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/* fallthrough */
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break;
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break;
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}
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}
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}
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}
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@ -52,9 +52,8 @@ __FBSDID("$FreeBSD$");
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#include <machine/vmparam.h>
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#include <machine/vmparam.h>
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#include <mips/atheros/ar71xxreg.h>
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#include <mips/atheros/ar71xxreg.h>
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#include <mips/atheros/ar91xxreg.h>
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#include <mips/atheros/ar71xx_cpudef.h>
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#include <mips/atheros/ar71xx_cpudef.h>
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#include <mips/atheros/ar91xxreg.h>
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#include <mips/atheros/ar91xx_chip.h>
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#include <mips/atheros/ar91xx_chip.h>
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#include <mips/sentry5/s5reg.h>
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#include <mips/sentry5/s5reg.h>
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@ -75,7 +74,6 @@ ar91xx_chip_detect_sys_frequency(void)
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div = ((pll >> AR91XX_PLL_DIV_SHIFT) & AR91XX_PLL_DIV_MASK);
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div = ((pll >> AR91XX_PLL_DIV_SHIFT) & AR91XX_PLL_DIV_MASK);
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freq = div * AR91XX_BASE_FREQ;
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freq = div * AR91XX_BASE_FREQ;
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u_ar71xx_cpu_freq = freq;
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u_ar71xx_cpu_freq = freq;
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div = ((pll >> AR91XX_DDR_DIV_SHIFT) & AR91XX_DDR_DIV_MASK) + 1;
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div = ((pll >> AR91XX_DDR_DIV_SHIFT) & AR91XX_DDR_DIV_MASK) + 1;
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@ -153,6 +151,7 @@ ar91xx_chip_set_pll_ge(int unit, int speed)
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static void
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static void
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ar91xx_chip_ddr_flush_ge(int unit)
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ar91xx_chip_ddr_flush_ge(int unit)
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{
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{
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switch (unit) {
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switch (unit) {
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case 0:
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case 0:
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ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE0);
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ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE0);
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@ -170,6 +169,7 @@ ar91xx_chip_ddr_flush_ge(int unit)
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static void
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static void
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ar91xx_chip_ddr_flush_ip2(void)
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ar91xx_chip_ddr_flush_ip2(void)
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{
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{
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ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_WMAC);
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ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_WMAC);
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}
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}
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@ -177,12 +177,14 @@ ar91xx_chip_ddr_flush_ip2(void)
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static uint32_t
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static uint32_t
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ar91xx_chip_get_eth_pll(unsigned int mac, int speed)
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ar91xx_chip_get_eth_pll(unsigned int mac, int speed)
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{
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{
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return 0;
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return 0;
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}
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}
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static void
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static void
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ar91xx_chip_init_usb_peripheral(void)
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ar91xx_chip_init_usb_peripheral(void)
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{
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{
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ar71xx_device_stop(AR91XX_RST_RESET_MODULE_USBSUS_OVERRIDE);
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ar71xx_device_stop(AR91XX_RST_RESET_MODULE_USBSUS_OVERRIDE);
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DELAY(100);
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DELAY(100);
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