Style(9) changes.

svn path=/head/; revision=228450

sys/mips/atheros/ar71xx_chip.c

@@ -52,9 +52,7 @@ __FBSDID("$FreeBSD$");
 #include <machine/vmparam.h>
 
 #include <mips/atheros/ar71xxreg.h>
-
 #include <mips/atheros/ar71xx_chip.h>
-
 #include <mips/atheros/ar71xx_cpudef.h>
 
 #include <mips/sentry5/s5reg.h>
@@ -144,7 +142,7 @@ ar71xx_chip_set_pll_ge(int unit, int speed)
 {
 	uint32_t pll;
 
-	switch(speed) {
+	switch (speed) {
 	case 10:
 		pll = PLL_ETH_INT_CLK_10;
 		break;
@@ -180,6 +178,7 @@ ar71xx_chip_set_pll_ge(int unit, int speed)
 static void
 ar71xx_chip_ddr_flush_ge(int unit)
 {
+
 	switch (unit) {
 	case 0:
 		ar71xx_ddr_flush(AR71XX_WB_FLUSH_GE0);
@@ -209,18 +208,24 @@ ar71xx_chip_get_eth_pll(unsigned int mac, int speed)
 static void
 ar71xx_chip_init_usb_peripheral(void)
 {
-	ar71xx_device_stop(RST_RESET_USB_OHCI_DLL | RST_RESET_USB_HOST | RST_RESET_USB_PHY);
+
+	ar71xx_device_stop(RST_RESET_USB_OHCI_DLL |
+	    RST_RESET_USB_HOST | RST_RESET_USB_PHY);
 	DELAY(1000);
 
-	ar71xx_device_start(RST_RESET_USB_OHCI_DLL | RST_RESET_USB_HOST | RST_RESET_USB_PHY);
+	ar71xx_device_start(RST_RESET_USB_OHCI_DLL |
+	    RST_RESET_USB_HOST | RST_RESET_USB_PHY);
 	DELAY(1000);
 
 	ATH_WRITE_REG(AR71XX_USB_CTRL_CONFIG,
-	    USB_CTRL_CONFIG_OHCI_DES_SWAP | USB_CTRL_CONFIG_OHCI_BUF_SWAP |
+	    USB_CTRL_CONFIG_OHCI_DES_SWAP |
-	    USB_CTRL_CONFIG_EHCI_DES_SWAP | USB_CTRL_CONFIG_EHCI_BUF_SWAP);
+	    USB_CTRL_CONFIG_OHCI_BUF_SWAP |
+	    USB_CTRL_CONFIG_EHCI_DES_SWAP |
+	    USB_CTRL_CONFIG_EHCI_BUF_SWAP);
 
 	ATH_WRITE_REG(AR71XX_USB_CTRL_FLADJ,
-	    (32 << USB_CTRL_FLADJ_HOST_SHIFT) | (3 << USB_CTRL_FLADJ_A5_SHIFT));
+	    (32 << USB_CTRL_FLADJ_HOST_SHIFT) |
+	    (3 << USB_CTRL_FLADJ_A5_SHIFT));
 
 	DELAY(1000);
 }

sys/mips/atheros/ar724x_chip.c

@@ -125,12 +125,13 @@ ar724x_chip_device_stopped(uint32_t mask)
 static void
 ar724x_chip_set_pll_ge(int unit, int speed)
 {
+
 	switch (unit) {
 	case 0:
-		/* TODO */
+		/* XXX TODO */
 		break;
 	case 1:
-		/* TODO */
+		/* XXX TODO */
 		break;
 	default:
 		printf("%s: invalid PLL set for arge unit: %d\n",
@@ -142,6 +143,7 @@ ar724x_chip_set_pll_ge(int unit, int speed)
 static void
 ar724x_chip_ddr_flush_ge(int unit)
 {
+
 	switch (unit) {
 	case 0:
 		ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_GE0);
@@ -159,13 +161,14 @@ ar724x_chip_ddr_flush_ge(int unit)
 static void
 ar724x_chip_ddr_flush_ip2(void)
 {
+
 	ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_PCIE);
 }
 
-
 static uint32_t
 ar724x_chip_get_eth_pll(unsigned int mac, int speed)
 {
+
 	return 0;
 }
 
@@ -175,7 +178,6 @@ ar724x_chip_init_usb_peripheral(void)
 
 	switch (ar71xx_soc) {
 	case AR71XX_SOC_AR7240:
-
 		ar71xx_device_stop(AR724X_RESET_MODULE_USB_OHCI_DLL |
 		    AR724X_RESET_USB_HOST);
 		DELAY(1000);
@@ -195,7 +197,6 @@ ar724x_chip_init_usb_peripheral(void)
 
 	case AR71XX_SOC_AR7241:
 	case AR71XX_SOC_AR7242:
-
 		ar71xx_device_start(AR724X_RESET_MODULE_USB_OHCI_DLL);
 		DELAY(100);
 
@@ -208,7 +209,6 @@ ar724x_chip_init_usb_peripheral(void)
 		break;
 
 	default:
-			/* fallthrough */
 		break;
 	}
 }

sys/mips/atheros/ar91xx_chip.c

@@ -52,9 +52,8 @@ __FBSDID("$FreeBSD$");
 #include <machine/vmparam.h>
 
 #include <mips/atheros/ar71xxreg.h>
-#include <mips/atheros/ar91xxreg.h>
-
 #include <mips/atheros/ar71xx_cpudef.h>
+#include <mips/atheros/ar91xxreg.h>
 #include <mips/atheros/ar91xx_chip.h>
 
 #include <mips/sentry5/s5reg.h>
@@ -75,7 +74,6 @@ ar91xx_chip_detect_sys_frequency(void)
 
 	div = ((pll >> AR91XX_PLL_DIV_SHIFT) & AR91XX_PLL_DIV_MASK);
 	freq = div * AR91XX_BASE_FREQ;
-        
 	u_ar71xx_cpu_freq = freq;
 
 	div = ((pll >> AR91XX_DDR_DIV_SHIFT) & AR91XX_DDR_DIV_MASK) + 1;
@@ -153,6 +151,7 @@ ar91xx_chip_set_pll_ge(int unit, int speed)
 static void
 ar91xx_chip_ddr_flush_ge(int unit)
 {
+
 	switch (unit) {
 	case 0:
 		ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE0);
@@ -170,6 +169,7 @@ ar91xx_chip_ddr_flush_ge(int unit)
 static void
 ar91xx_chip_ddr_flush_ip2(void)
 {
+
 	ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_WMAC);
 }
 
@@ -177,12 +177,14 @@ ar91xx_chip_ddr_flush_ip2(void)
 static uint32_t
 ar91xx_chip_get_eth_pll(unsigned int mac, int speed)
 {
+
 	return 0;
 }
 
 static void
 ar91xx_chip_init_usb_peripheral(void)
 {
+
 	ar71xx_device_stop(AR91XX_RST_RESET_MODULE_USBSUS_OVERRIDE);
 	DELAY(100);