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- Resolve an issue where we may clear an idt while an interrupt on a
different cpu is still assigned to that vector by never clearing idt entries. This was only provided as a debugging feature and the bugs are caught by other means. - Drop the sched lock when rebinding to reassign an interrupt vector to a new cpu so that pending interrupts have a chance to be delivered before removing the old vector. Discussed with: tegge, jhb
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=188904
@ -900,7 +900,13 @@ apic_disable_vector(u_int apic_id, u_int vector)
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KASSERT(vector != IDT_SYSCALL, ("Attempt to overwrite syscall entry"));
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KASSERT(ioint_handlers[vector / 32] != NULL,
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("No ISR handler for vector %u", vector));
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#ifdef notyet
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/*
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* We can not currently clear the idt entry because other cpus
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* may have a valid vector at this offset.
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*/
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setidt(vector, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0);
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#endif
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}
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/* Release an APIC vector when it's no longer in use. */
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@ -924,9 +930,11 @@ apic_free_vector(u_int apic_id, u_int vector, u_int irq)
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if (sched_is_bound(td))
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panic("apic_free_vector: Thread already bound.\n");
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sched_bind(td, apic_cpuid(apic_id));
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thread_unlock(td);
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mtx_lock_spin(&icu_lock);
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lapics[apic_id].la_ioint_irqs[vector - APIC_IO_INTS] = 0;
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mtx_unlock_spin(&icu_lock);
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thread_lock(td);
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sched_unbind(td);
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thread_unlock(td);
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@ -903,8 +903,14 @@ apic_disable_vector(u_int apic_id, u_int vector)
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KASSERT(vector != IDT_SYSCALL, ("Attempt to overwrite syscall entry"));
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KASSERT(ioint_handlers[vector / 32] != NULL,
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("No ISR handler for vector %u", vector));
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#ifdef notyet
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/*
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* We can not currently clear the idt entry because other cpus
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* may have a valid vector at this offset.
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*/
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setidt(vector, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL,
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GSEL(GCODE_SEL, SEL_KPL));
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#endif
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}
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/* Release an APIC vector when it's no longer in use. */
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@ -928,9 +934,11 @@ apic_free_vector(u_int apic_id, u_int vector, u_int irq)
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if (sched_is_bound(td))
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panic("apic_free_vector: Thread already bound.\n");
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sched_bind(td, apic_cpuid(apic_id));
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thread_unlock(td);
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mtx_lock_spin(&icu_lock);
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lapics[apic_id].la_ioint_irqs[vector - APIC_IO_INTS] = 0;
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mtx_unlock_spin(&icu_lock);
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thread_lock(td);
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sched_unbind(td);
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thread_unlock(td);
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