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- remove some outdated comments
- tweak the announce message a bit - remove '\n's from a few panic() calls - don't use the DVMA base adress the firmware reports; instead, figure it out from the appropriate register on Sabres and let the IOMMU code choose it on Psychos. This also makes the IOMMU TSB size freely selectable.
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parent
9f9bcbde42
commit
3a68043d39
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=108800
@ -360,8 +360,6 @@ psycho_attach(device_t dev)
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* (1) per-PBM PCI configuration space, containing only the
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* PBM 256-byte PCI header
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* (2) the shared psycho configuration registers (struct psychoreg)
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*
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* XXX use the prom address for the psycho registers? we do so far.
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*/
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reg = nexus_get_reg(dev);
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nreg = nexus_get_nreg(dev);
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@ -420,7 +418,7 @@ psycho_attach(device_t dev)
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if (sc->sc_mode == PSYCHO_MODE_PSYCHO)
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sc->sc_ign = PSYCHO_GCSR_IGN(csr) << 6;
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device_printf(dev, "%s, impl %d, version %d, ign %x ",
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device_printf(dev, "%s, impl %d, version %d, ign %#x\n",
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desc->pd_name, (int)PSYCHO_GCSR_IMPL(csr),
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(int)PSYCHO_GCSR_VERS(csr), sc->sc_ign);
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@ -433,6 +431,17 @@ psycho_attach(device_t dev)
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PCICTL_RTRYWAIT);
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PCICTL_WRITE8(sc, PCR_CS, csr);
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if (sc->sc_mode == PSYCHO_MODE_SABRE) {
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/*
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* Use the PROM preset for now.
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*/
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csr = PCICTL_READ8(sc, PCR_TAS);
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if (csr == 0)
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panic("psycho_attach: sabre TAS not initialized.");
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sc->sc_dvmabase = (ffs(csr) - 1) << PCITAS_ADDR_SHIFT;
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} else
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sc->sc_dvmabase = -1;
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/* Grab the psycho ranges */
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psycho_get_ranges(sc->sc_node, &sc->sc_range, &sc->sc_nrange);
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@ -742,7 +751,7 @@ psycho_ue(void *arg)
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if ((afsr & UEAFSR_P_DTE) != 0)
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iommu_decode_fault(sc->sc_is, afar);
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/* It's uncorrectable. Dump the regs and panic. */
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panic("%s: uncorrectable DMA error AFAR %#lx AFSR %#lx\n",
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panic("%s: uncorrectable DMA error AFAR %#lx AFSR %#lx",
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device_get_name(sc->sc_dev), (u_long)afar, (u_long)afsr);
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}
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@ -769,7 +778,7 @@ psycho_bus_a(void *arg)
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afar = PSYCHO_READ8(sc, PSR_PCICTL0 + PCR_AFA);
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afsr = PSYCHO_READ8(sc, PSR_PCICTL0 + PCR_AFS);
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/* It's uncorrectable. Dump the regs and panic. */
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panic("%s: PCI bus A error AFAR %#lx AFSR %#lx\n",
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panic("%s: PCI bus A error AFAR %#lx AFSR %#lx",
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device_get_name(sc->sc_dev), (u_long)afar, (u_long)afsr);
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}
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@ -782,7 +791,7 @@ psycho_bus_b(void *arg)
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afar = PSYCHO_READ8(sc, PSR_PCICTL1 + PCR_AFA);
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afsr = PSYCHO_READ8(sc, PSR_PCICTL1 + PCR_AFS);
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/* It's uncorrectable. Dump the regs and panic. */
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panic("%s: PCI bus B error AFAR %#lx AFSR %#lx\n",
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panic("%s: PCI bus B error AFAR %#lx AFSR %#lx",
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device_get_name(sc->sc_dev), (u_long)afar, (u_long)afsr);
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}
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@ -820,9 +829,6 @@ psycho_iommu_init(struct psycho_softc *sc, int tsbsize)
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{
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char *name;
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struct iommu_state *is = sc->sc_is;
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u_int32_t iobase = -1;
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int *vdma = NULL;
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int nitem;
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/* punch in our copies */
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is->is_bustag = sc->sc_bustag;
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@ -834,35 +840,13 @@ psycho_iommu_init(struct psycho_softc *sc, int tsbsize)
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is->is_dva = PSR_IOMMU_SVADIAG;
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is->is_dtcmp = PSR_IOMMU_TLB_CMP_DIAG;
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/*
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* Separate the men from the boys. Get the `virtual-dma'
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* property for sabre and use that to make sure the damn
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* iommu works.
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*
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* We could query the `#virtual-dma-size-cells' and
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* `#virtual-dma-addr-cells' and DTRT, but I'm lazy.
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*/
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nitem = OF_getprop_alloc(sc->sc_node, "virtual-dma", sizeof(vdma),
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(void **)&vdma);
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if (nitem > 0) {
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iobase = vdma[0];
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tsbsize = ffs(vdma[1]);
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if (tsbsize < 25 || tsbsize > 31 ||
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(vdma[1] & ~(1 << (tsbsize - 1))) != 0) {
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printf("bogus tsb size %x, using 7\n", vdma[1]);
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tsbsize = 31;
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}
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tsbsize -= 24;
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free(vdma, M_OFWPROP);
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}
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/* give us a nice name.. */
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name = (char *)malloc(32, M_DEVBUF, M_NOWAIT);
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if (name == 0)
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panic("couldn't malloc iommu name");
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snprintf(name, 32, "%s dvma", device_get_name(sc->sc_dev));
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iommu_init(name, is, tsbsize, iobase, 0);
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iommu_init(name, is, tsbsize, sc->sc_dvmabase, 0);
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}
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static void
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@ -1190,7 +1174,6 @@ psycho_alloc_resource(device_t bus, device_t child, int type, int *rid,
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case SYS_RES_IOPORT:
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rm = &sc->sc_io_rman;
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bt = sc->sc_iot;
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/* XXX: probably should use ranges property here. */
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bh = sc->sc_bh[PCI_CS_IO];
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break;
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default:
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@ -240,6 +240,9 @@
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#define UEAFSR_P_DWR (1UL << 61) /* pri. error during write */
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#define UEAFSR_P_DRD (1UL << 62) /* pri. error during read */
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/* Definitions for the target address space register. */
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#define PCITAS_ADDR_SHIFT 29
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/* Definitions for the psycho configuration space */
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#define PCS_DEVICE 0 /* Device number of psycho CS entry */
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#define PCS_FUNC 0 /* Function number of psycho CS entry */
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@ -62,6 +62,7 @@ struct psycho_softc {
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#define PSYCHO_MODE_PSYCHO 2
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struct iommu_state *sc_is;
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u_int32_t sc_dvmabase;
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struct resource *sc_mem_res;
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struct resource *sc_irq_res[6];
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