mirror of
https://git.FreeBSD.org/src.git
synced 2024-12-15 10:17:20 +00:00
icu.s:
Move definition of `stat_imask' to clock.c. clock.c: Rename `rtcmask' to `stat_imask' and export it. Rename `clkmask' to `clk_imask' for consistency. Only calculate TIMER_DIV(hz) once. Merge debugging and "garbage" code to produce debugging code and format the output better. Make writertc() static inline and use it everywhere. Now all accesses to the clock registers go through rtcin() and writertc(). Move rtc initialization to cpu_initclocks(). Merge enablertclock() with cpu_initclocks() and remove enablertclock(). The extra entry point was just a leftover from 1.1.5.
This commit is contained in:
Bruce Evans
parent
06ea59471c
commit
43469be308
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=5291
@ -34,7 +34,7 @@
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* SUCH DAMAGE.
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*
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* from: @(#)clock.c 7.2 (Berkeley) 5/12/91
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* $Id: clock.c,v 1.27 1994/11/10 12:53:13 ache Exp $
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* $Id: clock.c,v 1.28 1994/11/12 16:24:54 ache Exp $
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*/
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/*
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@ -94,11 +94,13 @@ int disable_rtc_set = 0; /* disable resettodr() if != 0 */
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#ifdef I586_CPU
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int pentium_mhz;
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#endif
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u_int stat_imask = SWI_CLOCK_MASK;
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int timer0_max_count;
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u_int timer0_overflow_threshold;
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u_int timer0_prescaler_count;
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static int beeping = 0;
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static u_int clk_imask = HWI_MASK | SWI_MASK;
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static const u_char daysinmonth[] = {31,28,31,30,31,30,31,31,30,31,30,31};
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static u_int hardclock_max_count;
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/*
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@ -154,7 +156,7 @@ clkintr(struct clockframe frame)
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if ((timer0_prescaler_count += timer0_max_count)
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>= hardclock_max_count) {
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hardclock(&frame);
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timer0_max_count = TIMER_DIV(hz);
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timer0_max_count = hardclock_max_count;
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timer0_overflow_threshold =
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timer0_max_count - TIMER0_LATCH_COUNT;
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disable_intr();
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@ -244,16 +246,14 @@ rtcintr(struct clockframe frame)
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}
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}
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#ifdef DEBUG
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#ifdef DDB
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static void
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printrtc(void)
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{
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outb(IO_RTC, RTC_STATUSA);
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printf("RTC status A = %x", inb(IO_RTC+1));
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outb(IO_RTC, RTC_STATUSB);
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printf(", B = %x", inb(IO_RTC+1));
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outb(IO_RTC, RTC_INTR);
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printf(", C = %x\n", inb(IO_RTC+1));
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printf("%02x/%02x/%02x %02x:%02x:%02x, A = %02x, B = %02x, C = %02x\n",
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rtcin(RTC_YEAR), rtcin(RTC_MONTH), rtcin(RTC_DAY),
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rtcin(RTC_HRS), rtcin(RTC_MIN), rtcin(RTC_SEC),
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rtcin(RTC_STATUSA), rtcin(RTC_STATUSB), rtcin(RTC_INTR));
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}
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#endif
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@ -401,11 +401,11 @@ int2bcd(int dez)
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return(dez/10 * 16 + dez%10);
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}
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static void
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writertc(int port, int val)
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static inline void
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writertc(u_char reg, u_char val)
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{
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outb(IO_RTC, port);
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outb(IO_RTC+1, val);
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outb(IO_RTC, reg);
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outb(IO_RTC + 1, val);
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}
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static int
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@ -414,28 +414,18 @@ readrtc(int port)
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return(bcd2int(rtcin(port)));
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}
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/*
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* Initialize 8253 timer 0 early so that it can be used in DELAY().
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* XXX initialization of other timers is unintentionally left blank.
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*/
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void
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startrtclock()
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{
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int s;
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/* Initialize 8253 timer 0. */
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timer0_max_count = hardclock_max_count = TIMER_DIV(hz);
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timer0_overflow_threshold = timer0_max_count - TIMER0_LATCH_COUNT;
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outb(TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT);
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outb(TIMER_CNTR0, timer0_max_count & 0xff);
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outb(TIMER_CNTR0, timer0_max_count >> 8);
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/* XXX initialization of other timers unintentionally left blank. */
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/* initialize brain-dead battery powered clock */
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outb (IO_RTC, RTC_STATUSA);
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outb (IO_RTC+1, rtc_statusa);
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outb (IO_RTC, RTC_STATUSB);
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outb (IO_RTC+1, RTCSB_24HR);
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outb (IO_RTC, RTC_DIAG);
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if (s = inb (IO_RTC+1))
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printf("RTC BIOS diagnostic error %b\n", s, RTCDG_BITS);
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}
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/*
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@ -517,7 +507,7 @@ resettodr()
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tm = time.tv_sec;
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splx(s);
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/* First, disable clock updates */
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/* Disable RTC updates and interrupts. */
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writertc(RTC_STATUSB, RTCSB_HALT | RTCSB_24HR);
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/* Calculate local time to put in RTC */
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@ -552,72 +542,44 @@ resettodr()
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writertc(RTC_MONTH, int2bcd(m)); /* Write back Month */
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writertc(RTC_DAY, int2bcd(tm+1)); /* Write back Day */
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/* enable time updates */
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writertc(RTC_STATUSB, RTCSB_PINTR | RTCSB_24HR);
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/* Reenable RTC updates and interrupts. */
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writertc(RTC_STATUSB, RTCSB_24HR | RTCSB_PINTR);
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}
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#ifdef garbage
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/*
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* Initialze the time of day register, based on the time base which is, e.g.
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* from a filesystem.
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*/
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static void
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test_inittodr(time_t base)
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{
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outb(IO_RTC,9); /* year */
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printf("%d ",bcd(inb(IO_RTC+1)));
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outb(IO_RTC,8); /* month */
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printf("%d ",bcd(inb(IO_RTC+1)));
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outb(IO_RTC,7); /* day */
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printf("%d ",bcd(inb(IO_RTC+1)));
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outb(IO_RTC,4); /* hour */
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printf("%d ",bcd(inb(IO_RTC+1)));
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outb(IO_RTC,2); /* minutes */
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printf("%d ",bcd(inb(IO_RTC+1)));
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outb(IO_RTC,0); /* seconds */
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printf("%d\n",bcd(inb(IO_RTC+1)));
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time.tv_sec = base;
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}
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#endif
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/*
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* Wire clock interrupt in.
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* Start both clocks running.
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*/
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static u_int clkmask = HWI_MASK | SWI_MASK;
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static u_int rtcmask = SWI_CLOCK_MASK;
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static void
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enablertclock()
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{
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register_intr(/* irq */ 0, /* XXX id */ 0, /* flags */ 0, clkintr,
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&clkmask, /* unit */ 0);
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INTREN(IRQ0);
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register_intr(/* irq */ 8, /* XXX id */ 1, /* flags */ 0, rtcintr,
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&rtcmask, /* unit */ 0);
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INTREN(IRQ8);
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outb(IO_RTC, RTC_STATUSB);
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outb(IO_RTC+1, RTCSB_PINTR | RTCSB_24HR);
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}
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void
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cpu_initclocks()
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{
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int diag;
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stathz = RTC_NOPROFRATE;
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profhz = RTC_PROFRATE;
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enablertclock();
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/* Finish initializing 8253 timer 0. */
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register_intr(/* irq */ 0, /* XXX id */ 0, /* flags */ 0, clkintr,
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&clk_imask, /* unit */ 0);
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INTREN(IRQ0);
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/* Initialize RTC. */
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writertc(RTC_STATUSA, rtc_statusa);
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writertc(RTC_STATUSB, RTCSB_24HR);
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diag = rtcin(RTC_DIAG);
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if (diag != 0)
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printf("RTC BIOS diagnostic error %b\n", diag, RTCDG_BITS);
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register_intr(/* irq */ 8, /* XXX id */ 1, /* flags */ 0, rtcintr,
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&stat_imask, /* unit */ 0);
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INTREN(IRQ8);
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writertc(RTC_STATUSB, RTCSB_24HR | RTCSB_PINTR);
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}
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void
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setstatclockrate(int newhz)
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{
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if(newhz == RTC_PROFRATE) {
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if (newhz == RTC_PROFRATE)
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rtc_statusa = RTCSA_DIVIDER | RTCSA_PROF;
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} else {
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else
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rtc_statusa = RTCSA_DIVIDER | RTCSA_NOPROF;
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}
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outb(IO_RTC, RTC_STATUSA);
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outb(IO_RTC+1, rtc_statusa);
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writertc(RTC_STATUSA, rtc_statusa);
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}
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@ -34,7 +34,7 @@
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* SUCH DAMAGE.
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*
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* from: @(#)clock.c 7.2 (Berkeley) 5/12/91
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* $Id: clock.c,v 1.27 1994/11/10 12:53:13 ache Exp $
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* $Id: clock.c,v 1.28 1994/11/12 16:24:54 ache Exp $
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*/
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/*
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@ -94,11 +94,13 @@ int disable_rtc_set = 0; /* disable resettodr() if != 0 */
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#ifdef I586_CPU
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int pentium_mhz;
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#endif
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u_int stat_imask = SWI_CLOCK_MASK;
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int timer0_max_count;
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u_int timer0_overflow_threshold;
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u_int timer0_prescaler_count;
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static int beeping = 0;
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static u_int clk_imask = HWI_MASK | SWI_MASK;
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static const u_char daysinmonth[] = {31,28,31,30,31,30,31,31,30,31,30,31};
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static u_int hardclock_max_count;
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/*
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@ -154,7 +156,7 @@ clkintr(struct clockframe frame)
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if ((timer0_prescaler_count += timer0_max_count)
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>= hardclock_max_count) {
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hardclock(&frame);
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timer0_max_count = TIMER_DIV(hz);
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timer0_max_count = hardclock_max_count;
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timer0_overflow_threshold =
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timer0_max_count - TIMER0_LATCH_COUNT;
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disable_intr();
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@ -244,16 +246,14 @@ rtcintr(struct clockframe frame)
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}
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}
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#ifdef DEBUG
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#ifdef DDB
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static void
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printrtc(void)
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{
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outb(IO_RTC, RTC_STATUSA);
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printf("RTC status A = %x", inb(IO_RTC+1));
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outb(IO_RTC, RTC_STATUSB);
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printf(", B = %x", inb(IO_RTC+1));
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outb(IO_RTC, RTC_INTR);
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printf(", C = %x\n", inb(IO_RTC+1));
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printf("%02x/%02x/%02x %02x:%02x:%02x, A = %02x, B = %02x, C = %02x\n",
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rtcin(RTC_YEAR), rtcin(RTC_MONTH), rtcin(RTC_DAY),
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rtcin(RTC_HRS), rtcin(RTC_MIN), rtcin(RTC_SEC),
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rtcin(RTC_STATUSA), rtcin(RTC_STATUSB), rtcin(RTC_INTR));
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}
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#endif
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@ -401,11 +401,11 @@ int2bcd(int dez)
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return(dez/10 * 16 + dez%10);
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}
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static void
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writertc(int port, int val)
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static inline void
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writertc(u_char reg, u_char val)
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{
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outb(IO_RTC, port);
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outb(IO_RTC+1, val);
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outb(IO_RTC, reg);
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outb(IO_RTC + 1, val);
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}
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static int
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@ -414,28 +414,18 @@ readrtc(int port)
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return(bcd2int(rtcin(port)));
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}
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/*
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* Initialize 8253 timer 0 early so that it can be used in DELAY().
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* XXX initialization of other timers is unintentionally left blank.
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*/
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void
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startrtclock()
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{
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int s;
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/* Initialize 8253 timer 0. */
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timer0_max_count = hardclock_max_count = TIMER_DIV(hz);
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timer0_overflow_threshold = timer0_max_count - TIMER0_LATCH_COUNT;
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outb(TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT);
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outb(TIMER_CNTR0, timer0_max_count & 0xff);
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outb(TIMER_CNTR0, timer0_max_count >> 8);
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/* XXX initialization of other timers unintentionally left blank. */
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/* initialize brain-dead battery powered clock */
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outb (IO_RTC, RTC_STATUSA);
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outb (IO_RTC+1, rtc_statusa);
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outb (IO_RTC, RTC_STATUSB);
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outb (IO_RTC+1, RTCSB_24HR);
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outb (IO_RTC, RTC_DIAG);
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if (s = inb (IO_RTC+1))
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printf("RTC BIOS diagnostic error %b\n", s, RTCDG_BITS);
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}
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/*
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@ -517,7 +507,7 @@ resettodr()
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tm = time.tv_sec;
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splx(s);
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/* First, disable clock updates */
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/* Disable RTC updates and interrupts. */
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writertc(RTC_STATUSB, RTCSB_HALT | RTCSB_24HR);
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/* Calculate local time to put in RTC */
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@ -552,72 +542,44 @@ resettodr()
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writertc(RTC_MONTH, int2bcd(m)); /* Write back Month */
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writertc(RTC_DAY, int2bcd(tm+1)); /* Write back Day */
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/* enable time updates */
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writertc(RTC_STATUSB, RTCSB_PINTR | RTCSB_24HR);
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/* Reenable RTC updates and interrupts. */
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writertc(RTC_STATUSB, RTCSB_24HR | RTCSB_PINTR);
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}
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#ifdef garbage
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/*
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* Initialze the time of day register, based on the time base which is, e.g.
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* from a filesystem.
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*/
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static void
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test_inittodr(time_t base)
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{
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outb(IO_RTC,9); /* year */
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printf("%d ",bcd(inb(IO_RTC+1)));
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outb(IO_RTC,8); /* month */
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printf("%d ",bcd(inb(IO_RTC+1)));
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outb(IO_RTC,7); /* day */
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printf("%d ",bcd(inb(IO_RTC+1)));
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outb(IO_RTC,4); /* hour */
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printf("%d ",bcd(inb(IO_RTC+1)));
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outb(IO_RTC,2); /* minutes */
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printf("%d ",bcd(inb(IO_RTC+1)));
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outb(IO_RTC,0); /* seconds */
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printf("%d\n",bcd(inb(IO_RTC+1)));
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time.tv_sec = base;
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}
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#endif
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/*
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* Wire clock interrupt in.
|
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* Start both clocks running.
|
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*/
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static u_int clkmask = HWI_MASK | SWI_MASK;
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static u_int rtcmask = SWI_CLOCK_MASK;
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static void
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enablertclock()
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{
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register_intr(/* irq */ 0, /* XXX id */ 0, /* flags */ 0, clkintr,
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&clkmask, /* unit */ 0);
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INTREN(IRQ0);
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register_intr(/* irq */ 8, /* XXX id */ 1, /* flags */ 0, rtcintr,
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&rtcmask, /* unit */ 0);
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INTREN(IRQ8);
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outb(IO_RTC, RTC_STATUSB);
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outb(IO_RTC+1, RTCSB_PINTR | RTCSB_24HR);
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}
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void
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cpu_initclocks()
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{
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int diag;
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stathz = RTC_NOPROFRATE;
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profhz = RTC_PROFRATE;
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enablertclock();
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/* Finish initializing 8253 timer 0. */
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register_intr(/* irq */ 0, /* XXX id */ 0, /* flags */ 0, clkintr,
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&clk_imask, /* unit */ 0);
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INTREN(IRQ0);
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/* Initialize RTC. */
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writertc(RTC_STATUSA, rtc_statusa);
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writertc(RTC_STATUSB, RTCSB_24HR);
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diag = rtcin(RTC_DIAG);
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if (diag != 0)
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printf("RTC BIOS diagnostic error %b\n", diag, RTCDG_BITS);
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register_intr(/* irq */ 8, /* XXX id */ 1, /* flags */ 0, rtcintr,
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&stat_imask, /* unit */ 0);
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INTREN(IRQ8);
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writertc(RTC_STATUSB, RTCSB_24HR | RTCSB_PINTR);
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}
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void
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setstatclockrate(int newhz)
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{
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if(newhz == RTC_PROFRATE) {
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if (newhz == RTC_PROFRATE)
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rtc_statusa = RTCSA_DIVIDER | RTCSA_PROF;
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} else {
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else
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rtc_statusa = RTCSA_DIVIDER | RTCSA_NOPROF;
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}
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outb(IO_RTC, RTC_STATUSA);
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outb(IO_RTC+1, rtc_statusa);
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writertc(RTC_STATUSA, rtc_statusa);
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}
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@ -34,7 +34,7 @@
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* SUCH DAMAGE.
|
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*
|
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* from: @(#)clock.c 7.2 (Berkeley) 5/12/91
|
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* $Id: clock.c,v 1.27 1994/11/10 12:53:13 ache Exp $
|
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* $Id: clock.c,v 1.28 1994/11/12 16:24:54 ache Exp $
|
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*/
|
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|
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/*
|
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@ -94,11 +94,13 @@ int disable_rtc_set = 0; /* disable resettodr() if != 0 */
|
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#ifdef I586_CPU
|
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int pentium_mhz;
|
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#endif
|
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u_int stat_imask = SWI_CLOCK_MASK;
|
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int timer0_max_count;
|
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u_int timer0_overflow_threshold;
|
||||
u_int timer0_prescaler_count;
|
||||
|
||||
static int beeping = 0;
|
||||
static u_int clk_imask = HWI_MASK | SWI_MASK;
|
||||
static const u_char daysinmonth[] = {31,28,31,30,31,30,31,31,30,31,30,31};
|
||||
static u_int hardclock_max_count;
|
||||
/*
|
||||
@ -154,7 +156,7 @@ clkintr(struct clockframe frame)
|
||||
if ((timer0_prescaler_count += timer0_max_count)
|
||||
>= hardclock_max_count) {
|
||||
hardclock(&frame);
|
||||
timer0_max_count = TIMER_DIV(hz);
|
||||
timer0_max_count = hardclock_max_count;
|
||||
timer0_overflow_threshold =
|
||||
timer0_max_count - TIMER0_LATCH_COUNT;
|
||||
disable_intr();
|
||||
@ -244,16 +246,14 @@ rtcintr(struct clockframe frame)
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef DEBUG
|
||||
#ifdef DDB
|
||||
static void
|
||||
printrtc(void)
|
||||
{
|
||||
outb(IO_RTC, RTC_STATUSA);
|
||||
printf("RTC status A = %x", inb(IO_RTC+1));
|
||||
outb(IO_RTC, RTC_STATUSB);
|
||||
printf(", B = %x", inb(IO_RTC+1));
|
||||
outb(IO_RTC, RTC_INTR);
|
||||
printf(", C = %x\n", inb(IO_RTC+1));
|
||||
printf("%02x/%02x/%02x %02x:%02x:%02x, A = %02x, B = %02x, C = %02x\n",
|
||||
rtcin(RTC_YEAR), rtcin(RTC_MONTH), rtcin(RTC_DAY),
|
||||
rtcin(RTC_HRS), rtcin(RTC_MIN), rtcin(RTC_SEC),
|
||||
rtcin(RTC_STATUSA), rtcin(RTC_STATUSB), rtcin(RTC_INTR));
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -401,11 +401,11 @@ int2bcd(int dez)
|
||||
return(dez/10 * 16 + dez%10);
|
||||
}
|
||||
|
||||
static void
|
||||
writertc(int port, int val)
|
||||
static inline void
|
||||
writertc(u_char reg, u_char val)
|
||||
{
|
||||
outb(IO_RTC, port);
|
||||
outb(IO_RTC+1, val);
|
||||
outb(IO_RTC, reg);
|
||||
outb(IO_RTC + 1, val);
|
||||
}
|
||||
|
||||
static int
|
||||
@ -414,28 +414,18 @@ readrtc(int port)
|
||||
return(bcd2int(rtcin(port)));
|
||||
}
|
||||
|
||||
/*
|
||||
* Initialize 8253 timer 0 early so that it can be used in DELAY().
|
||||
* XXX initialization of other timers is unintentionally left blank.
|
||||
*/
|
||||
void
|
||||
startrtclock()
|
||||
{
|
||||
int s;
|
||||
|
||||
/* Initialize 8253 timer 0. */
|
||||
timer0_max_count = hardclock_max_count = TIMER_DIV(hz);
|
||||
timer0_overflow_threshold = timer0_max_count - TIMER0_LATCH_COUNT;
|
||||
outb(TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT);
|
||||
outb(TIMER_CNTR0, timer0_max_count & 0xff);
|
||||
outb(TIMER_CNTR0, timer0_max_count >> 8);
|
||||
|
||||
/* XXX initialization of other timers unintentionally left blank. */
|
||||
|
||||
/* initialize brain-dead battery powered clock */
|
||||
outb (IO_RTC, RTC_STATUSA);
|
||||
outb (IO_RTC+1, rtc_statusa);
|
||||
outb (IO_RTC, RTC_STATUSB);
|
||||
outb (IO_RTC+1, RTCSB_24HR);
|
||||
outb (IO_RTC, RTC_DIAG);
|
||||
if (s = inb (IO_RTC+1))
|
||||
printf("RTC BIOS diagnostic error %b\n", s, RTCDG_BITS);
|
||||
}
|
||||
|
||||
/*
|
||||
@ -517,7 +507,7 @@ resettodr()
|
||||
tm = time.tv_sec;
|
||||
splx(s);
|
||||
|
||||
/* First, disable clock updates */
|
||||
/* Disable RTC updates and interrupts. */
|
||||
writertc(RTC_STATUSB, RTCSB_HALT | RTCSB_24HR);
|
||||
|
||||
/* Calculate local time to put in RTC */
|
||||
@ -552,72 +542,44 @@ resettodr()
|
||||
writertc(RTC_MONTH, int2bcd(m)); /* Write back Month */
|
||||
writertc(RTC_DAY, int2bcd(tm+1)); /* Write back Day */
|
||||
|
||||
/* enable time updates */
|
||||
writertc(RTC_STATUSB, RTCSB_PINTR | RTCSB_24HR);
|
||||
/* Reenable RTC updates and interrupts. */
|
||||
writertc(RTC_STATUSB, RTCSB_24HR | RTCSB_PINTR);
|
||||
}
|
||||
|
||||
#ifdef garbage
|
||||
/*
|
||||
* Initialze the time of day register, based on the time base which is, e.g.
|
||||
* from a filesystem.
|
||||
*/
|
||||
static void
|
||||
test_inittodr(time_t base)
|
||||
{
|
||||
|
||||
outb(IO_RTC,9); /* year */
|
||||
printf("%d ",bcd(inb(IO_RTC+1)));
|
||||
outb(IO_RTC,8); /* month */
|
||||
printf("%d ",bcd(inb(IO_RTC+1)));
|
||||
outb(IO_RTC,7); /* day */
|
||||
printf("%d ",bcd(inb(IO_RTC+1)));
|
||||
outb(IO_RTC,4); /* hour */
|
||||
printf("%d ",bcd(inb(IO_RTC+1)));
|
||||
outb(IO_RTC,2); /* minutes */
|
||||
printf("%d ",bcd(inb(IO_RTC+1)));
|
||||
outb(IO_RTC,0); /* seconds */
|
||||
printf("%d\n",bcd(inb(IO_RTC+1)));
|
||||
|
||||
time.tv_sec = base;
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Wire clock interrupt in.
|
||||
* Start both clocks running.
|
||||
*/
|
||||
|
||||
static u_int clkmask = HWI_MASK | SWI_MASK;
|
||||
static u_int rtcmask = SWI_CLOCK_MASK;
|
||||
|
||||
static void
|
||||
enablertclock()
|
||||
{
|
||||
register_intr(/* irq */ 0, /* XXX id */ 0, /* flags */ 0, clkintr,
|
||||
&clkmask, /* unit */ 0);
|
||||
INTREN(IRQ0);
|
||||
register_intr(/* irq */ 8, /* XXX id */ 1, /* flags */ 0, rtcintr,
|
||||
&rtcmask, /* unit */ 0);
|
||||
INTREN(IRQ8);
|
||||
outb(IO_RTC, RTC_STATUSB);
|
||||
outb(IO_RTC+1, RTCSB_PINTR | RTCSB_24HR);
|
||||
}
|
||||
|
||||
void
|
||||
cpu_initclocks()
|
||||
{
|
||||
int diag;
|
||||
|
||||
stathz = RTC_NOPROFRATE;
|
||||
profhz = RTC_PROFRATE;
|
||||
enablertclock();
|
||||
|
||||
/* Finish initializing 8253 timer 0. */
|
||||
register_intr(/* irq */ 0, /* XXX id */ 0, /* flags */ 0, clkintr,
|
||||
&clk_imask, /* unit */ 0);
|
||||
INTREN(IRQ0);
|
||||
|
||||
/* Initialize RTC. */
|
||||
writertc(RTC_STATUSA, rtc_statusa);
|
||||
writertc(RTC_STATUSB, RTCSB_24HR);
|
||||
diag = rtcin(RTC_DIAG);
|
||||
if (diag != 0)
|
||||
printf("RTC BIOS diagnostic error %b\n", diag, RTCDG_BITS);
|
||||
register_intr(/* irq */ 8, /* XXX id */ 1, /* flags */ 0, rtcintr,
|
||||
&stat_imask, /* unit */ 0);
|
||||
INTREN(IRQ8);
|
||||
writertc(RTC_STATUSB, RTCSB_24HR | RTCSB_PINTR);
|
||||
}
|
||||
|
||||
void
|
||||
setstatclockrate(int newhz)
|
||||
{
|
||||
if(newhz == RTC_PROFRATE) {
|
||||
if (newhz == RTC_PROFRATE)
|
||||
rtc_statusa = RTCSA_DIVIDER | RTCSA_PROF;
|
||||
} else {
|
||||
else
|
||||
rtc_statusa = RTCSA_DIVIDER | RTCSA_NOPROF;
|
||||
}
|
||||
outb(IO_RTC, RTC_STATUSA);
|
||||
outb(IO_RTC+1, rtc_statusa);
|
||||
writertc(RTC_STATUSA, rtc_statusa);
|
||||
}
|
||||
|
||||
@ -34,7 +34,7 @@
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* from: @(#)clock.c 7.2 (Berkeley) 5/12/91
|
||||
* $Id: clock.c,v 1.27 1994/11/10 12:53:13 ache Exp $
|
||||
* $Id: clock.c,v 1.28 1994/11/12 16:24:54 ache Exp $
|
||||
*/
|
||||
|
||||
/*
|
||||
@ -94,11 +94,13 @@ int disable_rtc_set = 0; /* disable resettodr() if != 0 */
|
||||
#ifdef I586_CPU
|
||||
int pentium_mhz;
|
||||
#endif
|
||||
u_int stat_imask = SWI_CLOCK_MASK;
|
||||
int timer0_max_count;
|
||||
u_int timer0_overflow_threshold;
|
||||
u_int timer0_prescaler_count;
|
||||
|
||||
static int beeping = 0;
|
||||
static u_int clk_imask = HWI_MASK | SWI_MASK;
|
||||
static const u_char daysinmonth[] = {31,28,31,30,31,30,31,31,30,31,30,31};
|
||||
static u_int hardclock_max_count;
|
||||
/*
|
||||
@ -154,7 +156,7 @@ clkintr(struct clockframe frame)
|
||||
if ((timer0_prescaler_count += timer0_max_count)
|
||||
>= hardclock_max_count) {
|
||||
hardclock(&frame);
|
||||
timer0_max_count = TIMER_DIV(hz);
|
||||
timer0_max_count = hardclock_max_count;
|
||||
timer0_overflow_threshold =
|
||||
timer0_max_count - TIMER0_LATCH_COUNT;
|
||||
disable_intr();
|
||||
@ -244,16 +246,14 @@ rtcintr(struct clockframe frame)
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef DEBUG
|
||||
#ifdef DDB
|
||||
static void
|
||||
printrtc(void)
|
||||
{
|
||||
outb(IO_RTC, RTC_STATUSA);
|
||||
printf("RTC status A = %x", inb(IO_RTC+1));
|
||||
outb(IO_RTC, RTC_STATUSB);
|
||||
printf(", B = %x", inb(IO_RTC+1));
|
||||
outb(IO_RTC, RTC_INTR);
|
||||
printf(", C = %x\n", inb(IO_RTC+1));
|
||||
printf("%02x/%02x/%02x %02x:%02x:%02x, A = %02x, B = %02x, C = %02x\n",
|
||||
rtcin(RTC_YEAR), rtcin(RTC_MONTH), rtcin(RTC_DAY),
|
||||
rtcin(RTC_HRS), rtcin(RTC_MIN), rtcin(RTC_SEC),
|
||||
rtcin(RTC_STATUSA), rtcin(RTC_STATUSB), rtcin(RTC_INTR));
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -401,11 +401,11 @@ int2bcd(int dez)
|
||||
return(dez/10 * 16 + dez%10);
|
||||
}
|
||||
|
||||
static void
|
||||
writertc(int port, int val)
|
||||
static inline void
|
||||
writertc(u_char reg, u_char val)
|
||||
{
|
||||
outb(IO_RTC, port);
|
||||
outb(IO_RTC+1, val);
|
||||
outb(IO_RTC, reg);
|
||||
outb(IO_RTC + 1, val);
|
||||
}
|
||||
|
||||
static int
|
||||
@ -414,28 +414,18 @@ readrtc(int port)
|
||||
return(bcd2int(rtcin(port)));
|
||||
}
|
||||
|
||||
/*
|
||||
* Initialize 8253 timer 0 early so that it can be used in DELAY().
|
||||
* XXX initialization of other timers is unintentionally left blank.
|
||||
*/
|
||||
void
|
||||
startrtclock()
|
||||
{
|
||||
int s;
|
||||
|
||||
/* Initialize 8253 timer 0. */
|
||||
timer0_max_count = hardclock_max_count = TIMER_DIV(hz);
|
||||
timer0_overflow_threshold = timer0_max_count - TIMER0_LATCH_COUNT;
|
||||
outb(TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT);
|
||||
outb(TIMER_CNTR0, timer0_max_count & 0xff);
|
||||
outb(TIMER_CNTR0, timer0_max_count >> 8);
|
||||
|
||||
/* XXX initialization of other timers unintentionally left blank. */
|
||||
|
||||
/* initialize brain-dead battery powered clock */
|
||||
outb (IO_RTC, RTC_STATUSA);
|
||||
outb (IO_RTC+1, rtc_statusa);
|
||||
outb (IO_RTC, RTC_STATUSB);
|
||||
outb (IO_RTC+1, RTCSB_24HR);
|
||||
outb (IO_RTC, RTC_DIAG);
|
||||
if (s = inb (IO_RTC+1))
|
||||
printf("RTC BIOS diagnostic error %b\n", s, RTCDG_BITS);
|
||||
}
|
||||
|
||||
/*
|
||||
@ -517,7 +507,7 @@ resettodr()
|
||||
tm = time.tv_sec;
|
||||
splx(s);
|
||||
|
||||
/* First, disable clock updates */
|
||||
/* Disable RTC updates and interrupts. */
|
||||
writertc(RTC_STATUSB, RTCSB_HALT | RTCSB_24HR);
|
||||
|
||||
/* Calculate local time to put in RTC */
|
||||
@ -552,72 +542,44 @@ resettodr()
|
||||
writertc(RTC_MONTH, int2bcd(m)); /* Write back Month */
|
||||
writertc(RTC_DAY, int2bcd(tm+1)); /* Write back Day */
|
||||
|
||||
/* enable time updates */
|
||||
writertc(RTC_STATUSB, RTCSB_PINTR | RTCSB_24HR);
|
||||
/* Reenable RTC updates and interrupts. */
|
||||
writertc(RTC_STATUSB, RTCSB_24HR | RTCSB_PINTR);
|
||||
}
|
||||
|
||||
#ifdef garbage
|
||||
/*
|
||||
* Initialze the time of day register, based on the time base which is, e.g.
|
||||
* from a filesystem.
|
||||
*/
|
||||
static void
|
||||
test_inittodr(time_t base)
|
||||
{
|
||||
|
||||
outb(IO_RTC,9); /* year */
|
||||
printf("%d ",bcd(inb(IO_RTC+1)));
|
||||
outb(IO_RTC,8); /* month */
|
||||
printf("%d ",bcd(inb(IO_RTC+1)));
|
||||
outb(IO_RTC,7); /* day */
|
||||
printf("%d ",bcd(inb(IO_RTC+1)));
|
||||
outb(IO_RTC,4); /* hour */
|
||||
printf("%d ",bcd(inb(IO_RTC+1)));
|
||||
outb(IO_RTC,2); /* minutes */
|
||||
printf("%d ",bcd(inb(IO_RTC+1)));
|
||||
outb(IO_RTC,0); /* seconds */
|
||||
printf("%d\n",bcd(inb(IO_RTC+1)));
|
||||
|
||||
time.tv_sec = base;
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Wire clock interrupt in.
|
||||
* Start both clocks running.
|
||||
*/
|
||||
|
||||
static u_int clkmask = HWI_MASK | SWI_MASK;
|
||||
static u_int rtcmask = SWI_CLOCK_MASK;
|
||||
|
||||
static void
|
||||
enablertclock()
|
||||
{
|
||||
register_intr(/* irq */ 0, /* XXX id */ 0, /* flags */ 0, clkintr,
|
||||
&clkmask, /* unit */ 0);
|
||||
INTREN(IRQ0);
|
||||
register_intr(/* irq */ 8, /* XXX id */ 1, /* flags */ 0, rtcintr,
|
||||
&rtcmask, /* unit */ 0);
|
||||
INTREN(IRQ8);
|
||||
outb(IO_RTC, RTC_STATUSB);
|
||||
outb(IO_RTC+1, RTCSB_PINTR | RTCSB_24HR);
|
||||
}
|
||||
|
||||
void
|
||||
cpu_initclocks()
|
||||
{
|
||||
int diag;
|
||||
|
||||
stathz = RTC_NOPROFRATE;
|
||||
profhz = RTC_PROFRATE;
|
||||
enablertclock();
|
||||
|
||||
/* Finish initializing 8253 timer 0. */
|
||||
register_intr(/* irq */ 0, /* XXX id */ 0, /* flags */ 0, clkintr,
|
||||
&clk_imask, /* unit */ 0);
|
||||
INTREN(IRQ0);
|
||||
|
||||
/* Initialize RTC. */
|
||||
writertc(RTC_STATUSA, rtc_statusa);
|
||||
writertc(RTC_STATUSB, RTCSB_24HR);
|
||||
diag = rtcin(RTC_DIAG);
|
||||
if (diag != 0)
|
||||
printf("RTC BIOS diagnostic error %b\n", diag, RTCDG_BITS);
|
||||
register_intr(/* irq */ 8, /* XXX id */ 1, /* flags */ 0, rtcintr,
|
||||
&stat_imask, /* unit */ 0);
|
||||
INTREN(IRQ8);
|
||||
writertc(RTC_STATUSB, RTCSB_24HR | RTCSB_PINTR);
|
||||
}
|
||||
|
||||
void
|
||||
setstatclockrate(int newhz)
|
||||
{
|
||||
if(newhz == RTC_PROFRATE) {
|
||||
if (newhz == RTC_PROFRATE)
|
||||
rtc_statusa = RTCSA_DIVIDER | RTCSA_PROF;
|
||||
} else {
|
||||
else
|
||||
rtc_statusa = RTCSA_DIVIDER | RTCSA_NOPROF;
|
||||
}
|
||||
outb(IO_RTC, RTC_STATUSA);
|
||||
outb(IO_RTC+1, rtc_statusa);
|
||||
writertc(RTC_STATUSA, rtc_statusa);
|
||||
}
|
||||
|
||||
@ -36,7 +36,7 @@
|
||||
*
|
||||
* @(#)icu.s 7.2 (Berkeley) 5/21/91
|
||||
*
|
||||
* $Id: icu.s,v 1.15 1994/09/20 21:35:47 bde Exp $
|
||||
* $Id: icu.s,v 1.16 1994/12/03 10:03:16 bde Exp $
|
||||
*/
|
||||
|
||||
/*
|
||||
@ -57,8 +57,6 @@
|
||||
_cpl: .long HWI_MASK | SWI_MASK /* current priority (all off) */
|
||||
.globl _imen
|
||||
_imen: .long HWI_MASK /* interrupt mask enable (all h/w off) */
|
||||
.globl _stat_imask
|
||||
_stat_imask: .long (1 << 8)
|
||||
.globl _tty_imask
|
||||
_tty_imask: .long 0
|
||||
.globl _bio_imask
|
||||
|
||||
122
sys/isa/atrtc.c
122
sys/isa/atrtc.c
@ -34,7 +34,7 @@
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* from: @(#)clock.c 7.2 (Berkeley) 5/12/91
|
||||
* $Id: clock.c,v 1.27 1994/11/10 12:53:13 ache Exp $
|
||||
* $Id: clock.c,v 1.28 1994/11/12 16:24:54 ache Exp $
|
||||
*/
|
||||
|
||||
/*
|
||||
@ -94,11 +94,13 @@ int disable_rtc_set = 0; /* disable resettodr() if != 0 */
|
||||
#ifdef I586_CPU
|
||||
int pentium_mhz;
|
||||
#endif
|
||||
u_int stat_imask = SWI_CLOCK_MASK;
|
||||
int timer0_max_count;
|
||||
u_int timer0_overflow_threshold;
|
||||
u_int timer0_prescaler_count;
|
||||
|
||||
static int beeping = 0;
|
||||
static u_int clk_imask = HWI_MASK | SWI_MASK;
|
||||
static const u_char daysinmonth[] = {31,28,31,30,31,30,31,31,30,31,30,31};
|
||||
static u_int hardclock_max_count;
|
||||
/*
|
||||
@ -154,7 +156,7 @@ clkintr(struct clockframe frame)
|
||||
if ((timer0_prescaler_count += timer0_max_count)
|
||||
>= hardclock_max_count) {
|
||||
hardclock(&frame);
|
||||
timer0_max_count = TIMER_DIV(hz);
|
||||
timer0_max_count = hardclock_max_count;
|
||||
timer0_overflow_threshold =
|
||||
timer0_max_count - TIMER0_LATCH_COUNT;
|
||||
disable_intr();
|
||||
@ -244,16 +246,14 @@ rtcintr(struct clockframe frame)
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef DEBUG
|
||||
#ifdef DDB
|
||||
static void
|
||||
printrtc(void)
|
||||
{
|
||||
outb(IO_RTC, RTC_STATUSA);
|
||||
printf("RTC status A = %x", inb(IO_RTC+1));
|
||||
outb(IO_RTC, RTC_STATUSB);
|
||||
printf(", B = %x", inb(IO_RTC+1));
|
||||
outb(IO_RTC, RTC_INTR);
|
||||
printf(", C = %x\n", inb(IO_RTC+1));
|
||||
printf("%02x/%02x/%02x %02x:%02x:%02x, A = %02x, B = %02x, C = %02x\n",
|
||||
rtcin(RTC_YEAR), rtcin(RTC_MONTH), rtcin(RTC_DAY),
|
||||
rtcin(RTC_HRS), rtcin(RTC_MIN), rtcin(RTC_SEC),
|
||||
rtcin(RTC_STATUSA), rtcin(RTC_STATUSB), rtcin(RTC_INTR));
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -401,11 +401,11 @@ int2bcd(int dez)
|
||||
return(dez/10 * 16 + dez%10);
|
||||
}
|
||||
|
||||
static void
|
||||
writertc(int port, int val)
|
||||
static inline void
|
||||
writertc(u_char reg, u_char val)
|
||||
{
|
||||
outb(IO_RTC, port);
|
||||
outb(IO_RTC+1, val);
|
||||
outb(IO_RTC, reg);
|
||||
outb(IO_RTC + 1, val);
|
||||
}
|
||||
|
||||
static int
|
||||
@ -414,28 +414,18 @@ readrtc(int port)
|
||||
return(bcd2int(rtcin(port)));
|
||||
}
|
||||
|
||||
/*
|
||||
* Initialize 8253 timer 0 early so that it can be used in DELAY().
|
||||
* XXX initialization of other timers is unintentionally left blank.
|
||||
*/
|
||||
void
|
||||
startrtclock()
|
||||
{
|
||||
int s;
|
||||
|
||||
/* Initialize 8253 timer 0. */
|
||||
timer0_max_count = hardclock_max_count = TIMER_DIV(hz);
|
||||
timer0_overflow_threshold = timer0_max_count - TIMER0_LATCH_COUNT;
|
||||
outb(TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT);
|
||||
outb(TIMER_CNTR0, timer0_max_count & 0xff);
|
||||
outb(TIMER_CNTR0, timer0_max_count >> 8);
|
||||
|
||||
/* XXX initialization of other timers unintentionally left blank. */
|
||||
|
||||
/* initialize brain-dead battery powered clock */
|
||||
outb (IO_RTC, RTC_STATUSA);
|
||||
outb (IO_RTC+1, rtc_statusa);
|
||||
outb (IO_RTC, RTC_STATUSB);
|
||||
outb (IO_RTC+1, RTCSB_24HR);
|
||||
outb (IO_RTC, RTC_DIAG);
|
||||
if (s = inb (IO_RTC+1))
|
||||
printf("RTC BIOS diagnostic error %b\n", s, RTCDG_BITS);
|
||||
}
|
||||
|
||||
/*
|
||||
@ -517,7 +507,7 @@ resettodr()
|
||||
tm = time.tv_sec;
|
||||
splx(s);
|
||||
|
||||
/* First, disable clock updates */
|
||||
/* Disable RTC updates and interrupts. */
|
||||
writertc(RTC_STATUSB, RTCSB_HALT | RTCSB_24HR);
|
||||
|
||||
/* Calculate local time to put in RTC */
|
||||
@ -552,72 +542,44 @@ resettodr()
|
||||
writertc(RTC_MONTH, int2bcd(m)); /* Write back Month */
|
||||
writertc(RTC_DAY, int2bcd(tm+1)); /* Write back Day */
|
||||
|
||||
/* enable time updates */
|
||||
writertc(RTC_STATUSB, RTCSB_PINTR | RTCSB_24HR);
|
||||
/* Reenable RTC updates and interrupts. */
|
||||
writertc(RTC_STATUSB, RTCSB_24HR | RTCSB_PINTR);
|
||||
}
|
||||
|
||||
#ifdef garbage
|
||||
/*
|
||||
* Initialze the time of day register, based on the time base which is, e.g.
|
||||
* from a filesystem.
|
||||
*/
|
||||
static void
|
||||
test_inittodr(time_t base)
|
||||
{
|
||||
|
||||
outb(IO_RTC,9); /* year */
|
||||
printf("%d ",bcd(inb(IO_RTC+1)));
|
||||
outb(IO_RTC,8); /* month */
|
||||
printf("%d ",bcd(inb(IO_RTC+1)));
|
||||
outb(IO_RTC,7); /* day */
|
||||
printf("%d ",bcd(inb(IO_RTC+1)));
|
||||
outb(IO_RTC,4); /* hour */
|
||||
printf("%d ",bcd(inb(IO_RTC+1)));
|
||||
outb(IO_RTC,2); /* minutes */
|
||||
printf("%d ",bcd(inb(IO_RTC+1)));
|
||||
outb(IO_RTC,0); /* seconds */
|
||||
printf("%d\n",bcd(inb(IO_RTC+1)));
|
||||
|
||||
time.tv_sec = base;
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Wire clock interrupt in.
|
||||
* Start both clocks running.
|
||||
*/
|
||||
|
||||
static u_int clkmask = HWI_MASK | SWI_MASK;
|
||||
static u_int rtcmask = SWI_CLOCK_MASK;
|
||||
|
||||
static void
|
||||
enablertclock()
|
||||
{
|
||||
register_intr(/* irq */ 0, /* XXX id */ 0, /* flags */ 0, clkintr,
|
||||
&clkmask, /* unit */ 0);
|
||||
INTREN(IRQ0);
|
||||
register_intr(/* irq */ 8, /* XXX id */ 1, /* flags */ 0, rtcintr,
|
||||
&rtcmask, /* unit */ 0);
|
||||
INTREN(IRQ8);
|
||||
outb(IO_RTC, RTC_STATUSB);
|
||||
outb(IO_RTC+1, RTCSB_PINTR | RTCSB_24HR);
|
||||
}
|
||||
|
||||
void
|
||||
cpu_initclocks()
|
||||
{
|
||||
int diag;
|
||||
|
||||
stathz = RTC_NOPROFRATE;
|
||||
profhz = RTC_PROFRATE;
|
||||
enablertclock();
|
||||
|
||||
/* Finish initializing 8253 timer 0. */
|
||||
register_intr(/* irq */ 0, /* XXX id */ 0, /* flags */ 0, clkintr,
|
||||
&clk_imask, /* unit */ 0);
|
||||
INTREN(IRQ0);
|
||||
|
||||
/* Initialize RTC. */
|
||||
writertc(RTC_STATUSA, rtc_statusa);
|
||||
writertc(RTC_STATUSB, RTCSB_24HR);
|
||||
diag = rtcin(RTC_DIAG);
|
||||
if (diag != 0)
|
||||
printf("RTC BIOS diagnostic error %b\n", diag, RTCDG_BITS);
|
||||
register_intr(/* irq */ 8, /* XXX id */ 1, /* flags */ 0, rtcintr,
|
||||
&stat_imask, /* unit */ 0);
|
||||
INTREN(IRQ8);
|
||||
writertc(RTC_STATUSB, RTCSB_24HR | RTCSB_PINTR);
|
||||
}
|
||||
|
||||
void
|
||||
setstatclockrate(int newhz)
|
||||
{
|
||||
if(newhz == RTC_PROFRATE) {
|
||||
if (newhz == RTC_PROFRATE)
|
||||
rtc_statusa = RTCSA_DIVIDER | RTCSA_PROF;
|
||||
} else {
|
||||
else
|
||||
rtc_statusa = RTCSA_DIVIDER | RTCSA_NOPROF;
|
||||
}
|
||||
outb(IO_RTC, RTC_STATUSA);
|
||||
outb(IO_RTC+1, rtc_statusa);
|
||||
writertc(RTC_STATUSA, rtc_statusa);
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user