mirror of
https://git.FreeBSD.org/src.git
synced 2024-12-19 10:53:58 +00:00
- remove all calls to sched_pin and sched_unpin as they are only useful to
pmap on i386 - check for change in executable status in pmap_enter - pmap_qenter and pmap_qremove only need to invalidate the range if one of the pages has been referenced - remove pmap_kenter/pmap_kremove as they were only used by pmap_qenter and pmap_qremove - in pmap_copy don't copy wired bit to destination pmap - mpte was unused in pmap_enter_object - remove - pmap_enter_quick_locked is not called on the kernel_pmap, remove check - move pmap_remove_write specific logic out of tte_clear_phys_bit - in pmap_protect check for removal of execute bit - panic in the presence of a wired page in pmap_remove_all - pmap_zero_range can call hwblkclr if offset is zero and size is PAGE_SIZE - tte_clear_virt_bit is only used by pmap_change_wiring - thus it can be greatly simplified - pmap_invalidate_page need only be called in tte_clear_phys_bit if there is a match with flags - lock the pmap in tte_clear_phys_bit so that clearing the page bits is atomic with invalidating the page - these changes result in 100s reduction in buildworld from a malloc backed disk to a malloc backed disk - ~2.5%
This commit is contained in:
Kip Macy
parent
5e296dbf52
commit
4654a1f82f
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=165521
@ -317,7 +317,6 @@ get_pv_entry(pmap_t locked_pmap)
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vpq = &vm_page_queues[PQ_INACTIVE];
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retry:
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sched_pin();
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TAILQ_FOREACH(m, &vpq->pl, pageq) {
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if (m->hold_count || m->busy)
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continue;
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@ -359,7 +358,6 @@ get_pv_entry(pmap_t locked_pmap)
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free_pv_entry(pv);
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}
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}
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sched_unpin();
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if (allocated_pv == NULL) {
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if (vpq == &vm_page_queues[PQ_INACTIVE]) {
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vpq = &vm_page_queues[PQ_ACTIVE];
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@ -990,7 +988,6 @@ pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr,
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PMAP_LOCK(src_pmap);
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PMAP_LOCK(dst_pmap);
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}
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sched_pin();
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for (addr = src_addr; addr < end_addr; addr += PAGE_SIZE) {
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tte_t tte_data;
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vm_page_t m;
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@ -1001,20 +998,15 @@ pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr,
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if (tte_hash_lookup(dst_pmap->pm_hash, addr) == 0) {
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m = PHYS_TO_VM_PAGE(TTE_GET_PA(tte_data));
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tte_hash_insert(dst_pmap->pm_hash, addr, tte_data & ~(VTD_W|VTD_REF));
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tte_hash_insert(dst_pmap->pm_hash, addr, tte_data & ~(VTD_W|VTD_REF|VTD_WIRED));
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dst_pmap->pm_stats.resident_count++;
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pmap_insert_entry(dst_pmap, addr, m);
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}
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}
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}
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sched_unpin();
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vm_page_unlock_queues();
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PMAP_UNLOCK(src_pmap);
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PMAP_UNLOCK(dst_pmap);
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}
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void
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@ -1064,24 +1056,22 @@ pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
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vm_page_lock_queues();
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PMAP_LOCK(pmap);
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sched_pin();
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tte_data = pa = VM_PAGE_TO_PHYS(m);
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otte_data = tte_hash_delete(pmap->pm_hash, va);
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opa = TTE_GET_PA(otte_data);
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/*
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* Mapping has not changed, must be protection or wiring change.
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*/
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if (opa == 0) {
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/*
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* This is a new mapping
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*/
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pmap->pm_stats.resident_count++;
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pmap_add_tte(pmap, va, m, &tte_data, wired);
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} else if (pa != opa) {
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/*
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* Mapping has changed, invalidate old range and fall through to
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* handle validating new mapping.
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* Mapping has changed, handle validating new mapping.
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*
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*/
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if (otte_data & VTD_WIRED)
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pmap->pm_stats.wired_count--;
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@ -1094,6 +1084,10 @@ pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
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pmap_add_tte(pmap, va, m, &tte_data, wired);
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} else /* (pa == opa) */ {
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/*
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* Mapping has not changed, must be protection or wiring change.
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*/
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/*
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* Wiring change, just update stats. We don't worry about
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* wiring PT pages as they remain resident as long as there
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@ -1127,7 +1121,7 @@ pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
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if (wired)
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tte_data |= VTD_WIRED;
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if (pmap == kernel_pmap)
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tte_data |= TTE_KERNEL_MINFLAGS;
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tte_data |= VTD_P;
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invlva = FALSE;
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if ((otte_data & ~(VTD_W|VTD_REF)) != tte_data) {
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@ -1135,19 +1129,25 @@ pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
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if (otte_data & VTD_REF) {
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if (otte_data & VTD_MANAGED)
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vm_page_flag_set(om, PG_REFERENCED);
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if (opa != pa)
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if ((opa != pa) || ((opa & VTD_X) != (pa & VTD_X)))
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invlva = TRUE;
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}
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if (otte_data & VTD_W) {
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if (otte_data & VTD_MANAGED)
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vm_page_dirty(om);
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if ((prot & VM_PROT_WRITE) == 0)
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if ((pa & VTD_SW_W) != 0)
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invlva = TRUE;
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}
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if (invlva)
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pmap_invalidate_page(pmap, va, TRUE);
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}
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}
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tte_hash_insert(pmap->pm_hash, va, tte_data|TTE_MINFLAGS|VTD_REF);
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/*
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* XXX this needs to be locked for the threaded / kernel case
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*/
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tsb_set_tte(&pmap->pm_tsb, va, tte_data|TTE_MINFLAGS|VTD_REF,
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pmap->pm_context);
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@ -1160,13 +1160,8 @@ pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
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if (0 && pmap->pm_context != 0 && pmap->pm_tsb_miss_count > 512)
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pmap_tsb_resize(pmap);
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vm_page_unlock_queues();
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if (invlva)
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pmap_invalidate_page(pmap, va, TRUE);
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sched_unpin();
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PMAP_UNLOCK(pmap);
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}
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@ -1186,17 +1181,15 @@ void
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pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
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vm_page_t m_start, vm_prot_t prot)
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{
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vm_page_t m, mpte;
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vm_page_t m;
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vm_pindex_t diff, psize;
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VM_OBJECT_LOCK_ASSERT(m_start->object, MA_OWNED);
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psize = atop(end - start);
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mpte = NULL;
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m = m_start;
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PMAP_LOCK(pmap);
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while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
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pmap_enter_quick_locked(pmap, start + ptoa(diff), m,
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prot);
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pmap_enter_quick_locked(pmap, start + ptoa(diff), m, prot);
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m = TAILQ_NEXT(m, listq);
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}
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PMAP_UNLOCK(pmap);
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@ -1208,7 +1201,6 @@ pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
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PMAP_LOCK(pmap);
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pmap_enter_quick_locked(pmap, va, m, prot);
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PMAP_UNLOCK(pmap);
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}
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static void
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@ -1241,11 +1233,7 @@ pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot
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if ((prot & VM_PROT_EXECUTE) != 0)
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tte_data |= VTD_X;
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if (pmap == kernel_pmap)
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tte_data |= TTE_KERNEL_MINFLAGS;
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tte_hash_insert(pmap->pm_hash, va, tte_data | TTE_MINFLAGS);
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}
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/*
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@ -1278,14 +1266,12 @@ pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
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m = NULL;
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vm_page_lock_queues();
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PMAP_LOCK(pmap);
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sched_pin();
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tte_data = tte_hash_lookup(pmap->pm_hash, va);
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if (tte_data != 0 &&
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((tte_data & VTD_SW_W) || (prot & VM_PROT_WRITE) == 0)) {
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m = PHYS_TO_VM_PAGE(TTE_GET_PA(tte_data));
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vm_page_hold(m);
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}
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sched_unpin();
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vm_page_unlock_queues();
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PMAP_UNLOCK(pmap);
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@ -1594,16 +1580,6 @@ pmap_is_prefaultable(pmap_t pmap, vm_offset_t va)
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return (tte_hash_lookup(pmap->pm_hash, va) == 0);
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}
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/*
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* Map a wired page into kernel virtual address space.
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*/
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static void
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pmap_kenter(vm_offset_t va, vm_paddr_t pa)
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{
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tte_hash_update(kernel_pmap->pm_hash, va, pa | TTE_KERNEL | VTD_8K);
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tsb_set_tte(&kernel_td[TSB8K_INDEX], va, pa | TTE_KERNEL | VTD_8K, 0);
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}
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/*
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* Extract the physical page address associated with the given kernel virtual
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* address.
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@ -1630,12 +1606,6 @@ pmap_kextract(vm_offset_t va)
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return pa;
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}
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static void
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pmap_kremove(vm_offset_t va)
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{
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tte_hash_delete(kernel_pmap->pm_hash, va);
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}
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/*
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* Map a range of physical addresses into kernel virtual address space.
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*
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@ -1689,7 +1659,6 @@ pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
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if (loops >= 16)
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break;
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}
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return (FALSE);
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}
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@ -1709,8 +1678,11 @@ pmap_page_init(vm_page_t m)
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void
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pmap_remove_write(vm_page_t m)
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{
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tte_clear_phys_bit(m, VTD_SW_W);
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if ((m->flags & PG_WRITEABLE) == 0)
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return;
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mtx_assert(&vm_page_queue_mtx, MA_OWNED);
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tte_clear_phys_bit(m, VTD_SW_W|VTD_W);
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vm_page_flag_clear(m, PG_WRITEABLE);
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}
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/*
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* Initialize the pmap associated with process 0.
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@ -1765,6 +1737,7 @@ pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
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int anychanged;
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vm_offset_t tva;
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uint64_t clearbits;
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DPRINTF("pmap_protect(0x%lx, 0x%lx, %d)\n", sva, eva, prot);
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@ -1773,23 +1746,30 @@ pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
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return;
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}
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if (prot & VM_PROT_WRITE)
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if ((prot & (VM_PROT_WRITE|VM_PROT_EXECUTE)) ==
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(VM_PROT_WRITE|VM_PROT_EXECUTE))
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return;
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anychanged = 0;
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clearbits = anychanged = 0;
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if ((prot & VM_PROT_WRITE) == 0)
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clearbits |= (VTD_W|VTD_SW_W);
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if ((prot & VM_PROT_EXECUTE) == 0)
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clearbits |= VTD_X;
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vm_page_lock_queues();
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PMAP_LOCK(pmap);
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sched_pin();
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for (tva = sva; tva < eva; tva += PAGE_SIZE) {
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uint64_t otte_data;
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vm_page_t m;
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if ((otte_data = tte_hash_clear_bits(pmap->pm_hash, tva,
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(VTD_SW_W|VTD_W))) == 0)
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clearbits)) == 0)
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continue;
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/*
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* XXX technically we should do a shootdown if it
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* was referenced and was executable - but is not now
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*/
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if (!anychanged && (otte_data & VTD_W))
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anychanged = 1;
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@ -1808,10 +1788,8 @@ pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
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}
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vm_page_unlock_queues();
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if (anychanged)
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pmap_invalidate_range(pmap, sva, eva, TRUE);
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sched_unpin();
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PMAP_UNLOCK(pmap);
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}
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@ -1824,19 +1802,19 @@ void
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pmap_qenter(vm_offset_t sva, vm_page_t *m, int count)
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{
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vm_offset_t va;
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tte_t otte_data;
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otte_data = 0;
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va = sva;
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while (count-- > 0) {
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/*
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* If we make explicit calls to tte_hash_update
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* we can determine if any of the pages have been mapped
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* before - this can save us a pmap_invalidate_range
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*/
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pmap_kenter(va, VM_PAGE_TO_PHYS(*m));
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otte |= tte_hash_update(kernel_pmap->pm_hash, va,
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VM_PAGE_TO_PHYS(*m),
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pa | TTE_KERNEL | VTD_8K);
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va += PAGE_SIZE;
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m++;
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}
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pmap_invalidate_range(kernel_pmap, sva, va, FALSE);
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if ((otte & VTD_REF) != 0)
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pmap_invalidate_range(kernel_pmap, sva, va, FALSE);
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}
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/*
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@ -1847,18 +1825,17 @@ void
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pmap_qremove(vm_offset_t sva, int count)
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{
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vm_offset_t va;
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tte_t otte;
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va = sva;
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#ifndef NFS_NOT_BROKEN
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if (count == 0)
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count = 1;
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#endif
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otte = 0;
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while (count-- > 0) {
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pmap_kremove(va);
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otte |= tte_hash_delete(kernel_pmap->pm_hash, va);
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va += PAGE_SIZE;
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}
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pmap_invalidate_range(kernel_pmap, sva, va, TRUE);
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if ((otte & VTD_REF) != 0)
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pmap_invalidate_range(kernel_pmap, sva, va, TRUE);
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}
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/*
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@ -1898,23 +1875,18 @@ pmap_remove(pmap_t pmap, vm_offset_t start, vm_offset_t end)
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start, end);
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invlva = 0;
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vm_page_lock_queues();
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sched_pin();
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PMAP_LOCK(pmap);
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for (tva = start; tva < end; tva += PAGE_SIZE) {
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if ((tte_data = tte_hash_delete(pmap->pm_hash, tva)) == 0)
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continue;
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pmap_remove_tte(pmap, tte_data, tva);
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if (!invlva && (tte_data & (VTD_REF|VTD_W)))
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if (tte_data & (VTD_REF|VTD_W))
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invlva = 1;
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}
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vm_page_unlock_queues();
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if (invlva)
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pmap_invalidate_range(pmap, start, end, TRUE);
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sched_unpin();
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PMAP_UNLOCK(pmap);
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}
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/*
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@ -1938,7 +1910,6 @@ pmap_remove_all(vm_page_t m)
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DPRINTF("pmap_remove_all 0x%lx\n", VM_PAGE_TO_PHYS(m));
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mtx_assert(&vm_page_queue_mtx, MA_OWNED);
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sched_pin();
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while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
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PMAP_LOCK(pv->pv_pmap);
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pv->pv_pmap->pm_stats.resident_count--;
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@ -1968,7 +1939,6 @@ pmap_remove_all(vm_page_t m)
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free_pv_entry(pv);
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}
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vm_page_flag_clear(m, PG_WRITEABLE);
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sched_unpin();
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}
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static void
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@ -2011,24 +1981,17 @@ pmap_remove_pages(pmap_t pmap)
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DPRINTF("pmap_remove_pages(ctx=0x%lx)\n", pmap->pm_context);
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vm_page_lock_queues();
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PMAP_LOCK(pmap);
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sched_pin();
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for (pv = TAILQ_FIRST(&pmap->pm_pvlist); pv; pv = npv) {
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tte_data = tte_hash_delete(pmap->pm_hash, pv->pv_va);
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if (tte_data == 0) {
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membar(Sync);
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DELAY(100);
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membar(Sync);
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tte_data = tte_hash_delete(pmap->pm_hash, pv->pv_va);
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if (tte_data == 0) {
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printf("TTE IS ZERO @ VA %016lx\n", pv->pv_va);
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panic("bad tte");
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}
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}
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if (tte_data & VTD_WIRED)
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pmap->pm_stats.wired_count--;
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if (tte_data == 0) {
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printf("TTE IS ZERO @ VA %016lx\n", pv->pv_va);
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panic("bad tte");
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}
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||||
if (tte_data & VTD_WIRED) {
|
||||
panic("wired page in process not handled correctly");
|
||||
pmap->pm_stats.wired_count--;
|
||||
}
|
||||
m = PHYS_TO_VM_PAGE(TTE_GET_PA(tte_data));
|
||||
|
||||
pmap->pm_stats.resident_count--;
|
||||
@ -2052,9 +2015,7 @@ pmap_remove_pages(pmap_t pmap)
|
||||
pmap_tsb_reset(pmap);
|
||||
|
||||
vm_page_unlock_queues();
|
||||
|
||||
pmap_invalidate_all(pmap);
|
||||
sched_unpin();
|
||||
PMAP_UNLOCK(pmap);
|
||||
}
|
||||
|
||||
@ -2209,7 +2170,6 @@ pmap_ts_referenced(vm_page_t m)
|
||||
if (m->flags & PG_FICTITIOUS)
|
||||
return (rv);
|
||||
|
||||
sched_pin();
|
||||
mtx_assert(&vm_page_queue_mtx, MA_OWNED);
|
||||
if ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
|
||||
|
||||
@ -2238,8 +2198,6 @@ pmap_ts_referenced(vm_page_t m)
|
||||
PMAP_UNLOCK(pmap);
|
||||
} while ((pv = pvn) != NULL && pv != pvf);
|
||||
}
|
||||
sched_unpin();
|
||||
|
||||
return (rv);
|
||||
}
|
||||
|
||||
@ -2257,8 +2215,10 @@ pmap_zero_page_area(vm_page_t m, int off, int size)
|
||||
|
||||
pa = VM_PAGE_TO_PHYS(m);
|
||||
va = TLB_PHYS_TO_DIRECT(pa);
|
||||
|
||||
bzero((char *)(va + off), size);
|
||||
if (off == 0 && size == PAGE_SIZE)
|
||||
hwblkclr((void *)TLB_PHYS_TO_DIRECT(VM_PAGE_TO_PHYS(m)), PAGE_SIZE);
|
||||
else
|
||||
bzero((char *)(va + off), size);
|
||||
|
||||
}
|
||||
|
||||
|
||||
@ -56,36 +56,30 @@ void
|
||||
tte_clear_phys_bit(vm_page_t m, uint64_t flags)
|
||||
{
|
||||
pv_entry_t pv;
|
||||
tte_t active_flags = (flags & ~VTD_SW_W);
|
||||
|
||||
if ((m->flags & PG_FICTITIOUS) ||
|
||||
(flags == VTD_SW_W && (m->flags & PG_WRITEABLE) == 0))
|
||||
if (m->flags & PG_FICTITIOUS)
|
||||
return;
|
||||
sched_pin();
|
||||
|
||||
mtx_assert(&vm_page_queue_mtx, MA_OWNED);
|
||||
/*
|
||||
* Loop over all current mappings setting/clearing as appropos If
|
||||
* setting RO do we need to clear the VAC?
|
||||
*/
|
||||
TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
|
||||
tte_t otte_data;
|
||||
tte_t otte_data, matchbits;
|
||||
pmap_t pmap;
|
||||
|
||||
if (flags == VTD_SW_W)
|
||||
flags = (VTD_SW_W|VTD_W);
|
||||
|
||||
otte_data = tte_hash_clear_bits(pv->pv_pmap->pm_hash, pv->pv_va, flags);
|
||||
|
||||
if (otte_data & flags) {
|
||||
if (otte_data & VTD_W)
|
||||
pmap = pv->pv_pmap;
|
||||
PMAP_LOCK(pmap);
|
||||
otte_data = tte_hash_clear_bits(pmap->pm_hash, pv->pv_va, flags);
|
||||
if ((matchbits = (otte_data & active_flags)) != 0) {
|
||||
if (matchbits == VTD_W)
|
||||
vm_page_dirty(m);
|
||||
|
||||
pmap_invalidate_page(pv->pv_pmap, pv->pv_va, TRUE);
|
||||
pmap_invalidate_page(pmap, pv->pv_va, TRUE);
|
||||
}
|
||||
|
||||
|
||||
PMAP_UNLOCK(pmap);
|
||||
}
|
||||
if (flags & VTD_SW_W)
|
||||
vm_page_flag_clear(m, PG_WRITEABLE);
|
||||
sched_unpin();
|
||||
}
|
||||
|
||||
boolean_t
|
||||
@ -106,8 +100,7 @@ tte_get_phys_bit(vm_page_t m, uint64_t flags)
|
||||
|
||||
pmap = pv->pv_pmap;
|
||||
otte_data = tte_hash_lookup(pmap->pm_hash, pv->pv_va);
|
||||
rv = ((otte_data & flags) != 0);
|
||||
if (rv)
|
||||
if ((rv = ((otte_data & flags) != 0)))
|
||||
break;
|
||||
}
|
||||
|
||||
@ -117,15 +110,7 @@ tte_get_phys_bit(vm_page_t m, uint64_t flags)
|
||||
void
|
||||
tte_clear_virt_bit(struct pmap *pmap, vm_offset_t va, uint64_t flags)
|
||||
{
|
||||
tte_t otte_data;
|
||||
|
||||
if (flags == VTD_SW_W)
|
||||
flags = (VTD_SW_W|VTD_W);
|
||||
|
||||
otte_data = tte_hash_clear_bits(pmap->pm_hash, va, flags);
|
||||
|
||||
if (otte_data & flags)
|
||||
pmap_invalidate_page(pmap, va, TRUE);
|
||||
(void)tte_hash_clear_bits(pmap->pm_hash, va, flags);
|
||||
}
|
||||
|
||||
void
|
||||
|
||||
Loading…
Reference in New Issue
Block a user