mirror of
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Intels App Note AP-485 applied.
We will now tell a good deal more about the CPU if Intel made it. What is a i486DX2 Write-Back Enhanced CPU ?
This commit is contained in:
Poul-Henning Kamp
parent
914a63ebd4
commit
499454c6e9
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=6308
@ -34,7 +34,7 @@
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* SUCH DAMAGE.
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*
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* from: @(#)locore.s 7.3 (Berkeley) 5/13/91
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* $Id: locore.s,v 1.46 1995/01/14 13:20:07 bde Exp $
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* $Id: locore.s,v 1.47 1995/01/25 21:40:15 bde Exp $
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*/
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/*
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@ -121,9 +121,12 @@ tmpstk:
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.globl _boothowto,_bootdev
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.globl _cpu,_cold,_atdevbase,_cpu_vendor,_cpu_id,_bootinfo
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.globl _cpu_high, _cpu_feature
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_cpu: .long 0 /* are we 386, 386sx, or 486 */
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_cpu_id: .long 0 /* stepping ID */
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_cpu_high: .long 0 /* highest arg to CPUID */
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_cpu_feature: .long 0 /* features */
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_cpu_vendor: .space 20 /* CPU origin code */
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_bootinfo: .space BOOTINFO_SIZE /* bootinfo that we can handle */
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_cold: .long 1 /* cold till we are not */
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@ -474,16 +477,18 @@ got_common_bi_size:
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1: /* Use the `cpuid' instruction. */
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xorl %eax,%eax
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.byte 0x0f,0xa2 # cpuid 0
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.byte 0x0f,0xa2 # cpuid 0
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movl %eax,_cpu_high-KERNBASE # highest capability
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movl %ebx,_cpu_vendor-KERNBASE # store vendor string
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movl %edx,_cpu_vendor+4-KERNBASE
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movl %ecx,_cpu_vendor+8-KERNBASE
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movb $0,_cpu_vendor+12-KERNBASE
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movl $1,%eax
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.byte 0x0f,0xa2 # cpuid 1
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.byte 0x0f,0xa2 # cpuid 1
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movl %eax,_cpu_id-KERNBASE # store cpu_id
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rorl $8,%eax # extract family type
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movl %edx,_cpu_feature-KERNBASE # store cpu_feature
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rorl $8,%eax # extract family type
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andl $15,%eax
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cmpl $5,%eax
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jae 1f
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@ -34,7 +34,7 @@
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* SUCH DAMAGE.
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*
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* from: @(#)locore.s 7.3 (Berkeley) 5/13/91
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* $Id: locore.s,v 1.46 1995/01/14 13:20:07 bde Exp $
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* $Id: locore.s,v 1.47 1995/01/25 21:40:15 bde Exp $
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*/
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/*
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@ -121,9 +121,12 @@ tmpstk:
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.globl _boothowto,_bootdev
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.globl _cpu,_cold,_atdevbase,_cpu_vendor,_cpu_id,_bootinfo
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.globl _cpu_high, _cpu_feature
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_cpu: .long 0 /* are we 386, 386sx, or 486 */
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_cpu_id: .long 0 /* stepping ID */
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_cpu_high: .long 0 /* highest arg to CPUID */
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_cpu_feature: .long 0 /* features */
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_cpu_vendor: .space 20 /* CPU origin code */
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_bootinfo: .space BOOTINFO_SIZE /* bootinfo that we can handle */
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_cold: .long 1 /* cold till we are not */
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@ -474,16 +477,18 @@ got_common_bi_size:
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1: /* Use the `cpuid' instruction. */
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xorl %eax,%eax
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.byte 0x0f,0xa2 # cpuid 0
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.byte 0x0f,0xa2 # cpuid 0
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movl %eax,_cpu_high-KERNBASE # highest capability
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movl %ebx,_cpu_vendor-KERNBASE # store vendor string
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movl %edx,_cpu_vendor+4-KERNBASE
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movl %ecx,_cpu_vendor+8-KERNBASE
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movb $0,_cpu_vendor+12-KERNBASE
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movl $1,%eax
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.byte 0x0f,0xa2 # cpuid 1
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.byte 0x0f,0xa2 # cpuid 1
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movl %eax,_cpu_id-KERNBASE # store cpu_id
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rorl $8,%eax # extract family type
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movl %edx,_cpu_feature-KERNBASE # store cpu_feature
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rorl $8,%eax # extract family type
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andl $15,%eax
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cmpl $5,%eax
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jae 1f
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@ -35,7 +35,7 @@
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* SUCH DAMAGE.
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*
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* from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
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* $Id: machdep.c,v 1.106 1995/02/10 07:17:46 davidg Exp $
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* $Id: machdep.c,v 1.107 1995/02/10 07:44:03 davidg Exp $
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*/
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#include "npx.h"
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@ -377,7 +377,7 @@ struct cpu_nameclass i386_cpus[] = {
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static void
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identifycpu()
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{
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extern u_long cpu_id;
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extern u_long cpu_id, cpu_high, cpu_feature;
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extern char cpu_vendor[];
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printf("CPU: ");
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if (cpu >= 0
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@ -413,11 +413,50 @@ identifycpu()
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printf(" %d MHz", pentium_mhz);
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}
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#endif
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if(cpu_id)
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printf(" Id = 0x%lx",cpu_id);
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if(*cpu_vendor)
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printf(" Origin = \"%s\"",cpu_vendor);
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if(cpu_id)
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printf(" Id = 0x%lx",cpu_id);
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printf("\n"); /* cpu speed would be nice, but how? */
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if (!strcmp(cpu_vendor,"GenuineIntel")) {
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printf(" This is a");
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if ((cpu_id & 0xf00) > 3) {
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switch (cpu_id & 0x3000) {
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case 0x1000: printf("Overdrive "); break;
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case 0x2000: printf("Dual "); break;
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}
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if ((cpu_id & 0xf00) == 0x400)
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printf("n i486");
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else if ((cpu_id & 0xf00) == 0x500)
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printf(" Pentium ");
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else
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printf(" unknown CPU");
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switch (cpu_id & 0xff0) {
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case 0x400: printf("DX"); break;
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case 0x410: printf("DX"); break;
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case 0x420: printf("SX"); break;
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case 0x430: printf("DX2"); break;
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case 0x440: printf("SL"); break;
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case 0x450: printf("SX2"); break;
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case 0x470: printf("DX2 Write-Back Enhanced");
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break;
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case 0x480: printf("DX4"); break;
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case 0x510: printf("510\\60 or 567\\66"); break;
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case 0x520: printf("735\\90 or 815\\100"); break;
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}
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}
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printf(" Stepping=%d", cpu_id & 0xf);
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if (cpu_high > 0) {
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printf(" Features=0x%lx",cpu_feature);
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if (cpu_feature & 0x1) printf(" FPU");
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if (cpu_feature & 0x2) printf(" VME");
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if (cpu_feature & 0x8) printf(" PSE");
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if (cpu_feature & 0x80) printf(" MCE");
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if (cpu_feature & 0x100) printf(" CX8");
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if (cpu_feature & 0x200) printf(" APIC");
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}
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printf("\n");
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}
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/*
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* Now that we have told the user what they have,
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@ -34,7 +34,7 @@
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* SUCH DAMAGE.
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*
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* from: @(#)locore.s 7.3 (Berkeley) 5/13/91
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* $Id: locore.s,v 1.46 1995/01/14 13:20:07 bde Exp $
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* $Id: locore.s,v 1.47 1995/01/25 21:40:15 bde Exp $
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*/
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/*
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@ -121,9 +121,12 @@ tmpstk:
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.globl _boothowto,_bootdev
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.globl _cpu,_cold,_atdevbase,_cpu_vendor,_cpu_id,_bootinfo
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.globl _cpu_high, _cpu_feature
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_cpu: .long 0 /* are we 386, 386sx, or 486 */
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_cpu_id: .long 0 /* stepping ID */
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_cpu_high: .long 0 /* highest arg to CPUID */
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_cpu_feature: .long 0 /* features */
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_cpu_vendor: .space 20 /* CPU origin code */
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_bootinfo: .space BOOTINFO_SIZE /* bootinfo that we can handle */
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_cold: .long 1 /* cold till we are not */
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@ -474,16 +477,18 @@ got_common_bi_size:
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1: /* Use the `cpuid' instruction. */
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xorl %eax,%eax
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.byte 0x0f,0xa2 # cpuid 0
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.byte 0x0f,0xa2 # cpuid 0
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movl %eax,_cpu_high-KERNBASE # highest capability
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movl %ebx,_cpu_vendor-KERNBASE # store vendor string
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movl %edx,_cpu_vendor+4-KERNBASE
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movl %ecx,_cpu_vendor+8-KERNBASE
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movb $0,_cpu_vendor+12-KERNBASE
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movl $1,%eax
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.byte 0x0f,0xa2 # cpuid 1
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.byte 0x0f,0xa2 # cpuid 1
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movl %eax,_cpu_id-KERNBASE # store cpu_id
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rorl $8,%eax # extract family type
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movl %edx,_cpu_feature-KERNBASE # store cpu_feature
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rorl $8,%eax # extract family type
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andl $15,%eax
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cmpl $5,%eax
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jae 1f
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@ -35,7 +35,7 @@
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* SUCH DAMAGE.
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*
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* from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
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* $Id: machdep.c,v 1.106 1995/02/10 07:17:46 davidg Exp $
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* $Id: machdep.c,v 1.107 1995/02/10 07:44:03 davidg Exp $
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*/
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#include "npx.h"
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@ -377,7 +377,7 @@ struct cpu_nameclass i386_cpus[] = {
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static void
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identifycpu()
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{
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extern u_long cpu_id;
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extern u_long cpu_id, cpu_high, cpu_feature;
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extern char cpu_vendor[];
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printf("CPU: ");
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if (cpu >= 0
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@ -413,11 +413,50 @@ identifycpu()
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printf(" %d MHz", pentium_mhz);
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}
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#endif
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if(cpu_id)
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printf(" Id = 0x%lx",cpu_id);
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if(*cpu_vendor)
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printf(" Origin = \"%s\"",cpu_vendor);
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if(cpu_id)
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printf(" Id = 0x%lx",cpu_id);
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printf("\n"); /* cpu speed would be nice, but how? */
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if (!strcmp(cpu_vendor,"GenuineIntel")) {
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printf(" This is a");
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if ((cpu_id & 0xf00) > 3) {
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switch (cpu_id & 0x3000) {
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case 0x1000: printf("Overdrive "); break;
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case 0x2000: printf("Dual "); break;
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}
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if ((cpu_id & 0xf00) == 0x400)
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printf("n i486");
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else if ((cpu_id & 0xf00) == 0x500)
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printf(" Pentium ");
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else
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printf(" unknown CPU");
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switch (cpu_id & 0xff0) {
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case 0x400: printf("DX"); break;
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case 0x410: printf("DX"); break;
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case 0x420: printf("SX"); break;
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case 0x430: printf("DX2"); break;
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case 0x440: printf("SL"); break;
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case 0x450: printf("SX2"); break;
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case 0x470: printf("DX2 Write-Back Enhanced");
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break;
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case 0x480: printf("DX4"); break;
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case 0x510: printf("510\\60 or 567\\66"); break;
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case 0x520: printf("735\\90 or 815\\100"); break;
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}
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}
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printf(" Stepping=%d", cpu_id & 0xf);
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if (cpu_high > 0) {
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printf(" Features=0x%lx",cpu_feature);
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if (cpu_feature & 0x1) printf(" FPU");
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if (cpu_feature & 0x2) printf(" VME");
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if (cpu_feature & 0x8) printf(" PSE");
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if (cpu_feature & 0x80) printf(" MCE");
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if (cpu_feature & 0x100) printf(" CX8");
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if (cpu_feature & 0x200) printf(" APIC");
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}
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printf("\n");
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}
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/*
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* Now that we have told the user what they have,
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