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There are two models of AMD K6-2 Model 8 (c.f. AMD's document), so the
CPU stepping must be checked. Also, fixed print_AMD_info. Submitted by: Akio Morita <amorita@meadow.scphys.kyoto-u.ac.jp>
This commit is contained in:
KATO Takenori
parent
f6866643a6
commit
4b05574297
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=42732
@ -36,7 +36,7 @@
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* SUCH DAMAGE.
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*
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* from: Id: machdep.c,v 1.193 1996/06/18 01:22:04 bde Exp
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* $Id: identcpu.c,v 1.55 1999/01/08 16:29:56 bde Exp $
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* $Id: identcpu.c,v 1.56 1999/01/09 13:07:18 bde Exp $
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*/
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#include "opt_cpu.h"
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@ -293,7 +293,9 @@ printcpuinfo(void)
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&& ((cpu_id & 0x0f0) < 0x60)
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&& ((cpu_id & 0x00f) > 3))
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enable_K5_wt_alloc();
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else if ((cpu_id & 0x0f0) > 0x70)
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else if (((cpu_id & 0x0f0) > 0x80)
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|| (((cpu_id & 0x0f0) == 0x80)
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&& (cpu_id & 0x00f) > 0x07))
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enable_K6_2_wt_alloc();
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else if ((cpu_id & 0x0f0) > 0x50)
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enable_K6_wt_alloc();
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@ -859,23 +861,11 @@ print_AMD_info(void)
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printf(", %d lines/tag", (regs[3] >> 8) & 0xff);
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print_AMD_assoc((regs[3] >> 16) & 0xff);
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}
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switch (cpu_id & 0xFF0) {
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case 0x560: /* K6 0.35u */
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case 0x570: /* K6 0.25u */
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amd_whcr = rdmsr(0xc0000082);
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if (!(amd_whcr & 0x00fe)) {
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printf("Write Allocate Disable\n");
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} else {
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printf("Write Allocate Enable Limit: %dM bytes\n",
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(u_int32_t)(amd_whcr & 0x00fe) * 4);
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printf("Write Allocate 15-16M bytes: %s\n",
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(amd_whcr & 0x0001) ? "Enable" : "Disable");
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printf("Hardware Write Allocate Control: %s\n",
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(amd_whcr & 0x0100) ? "Enable" : "Disable");
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}
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break;
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case 0x580: /* K6-2 */
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case 0x590: /* K6-3 */
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if (((cpu_id & 0xf00) == 0x500)
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&& (((cpu_id & 0x0f0) > 0x80)
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|| (((cpu_id & 0x0f0) == 0x80)
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&& (cpu_id & 0x00f) > 0x07))) {
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/* K6-2(new core [Stepping 8-F]), K6-3 or later */
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amd_whcr = rdmsr(0xc0000082);
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if (!(amd_whcr & (0x3ff << 22))) {
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printf("Write Allocate Disable\n");
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@ -885,6 +875,19 @@ print_AMD_info(void)
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printf("Write Allocate 15-16M bytes: %s\n",
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(amd_whcr & (1 << 16)) ? "Enable" : "Disable");
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}
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break;
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} else if (((cpu_id & 0xf00) == 0x500)
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&& ((cpu_id & 0x0f0) > 0x50)) {
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/* K6, K6-2(old core) */
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amd_whcr = rdmsr(0xc0000082);
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if (!(amd_whcr & (0x7f << 1))) {
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printf("Write Allocate Disable\n");
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} else {
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printf("Write Allocate Enable Limit: %dM bytes\n",
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(u_int32_t)((amd_whcr & (0x7f << 1)) >> 1) * 4);
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printf("Write Allocate 15-16M bytes: %s\n",
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(amd_whcr & 0x0001) ? "Enable" : "Disable");
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printf("Hardware Write Allocate Control: %s\n",
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(amd_whcr & 0x0100) ? "Enable" : "Disable");
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}
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}
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}
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@ -26,7 +26,7 @@
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $Id: initcpu.c,v 1.15 1998/12/14 06:16:13 dillon Exp $
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* $Id: initcpu.c,v 1.16 1998/12/27 23:23:26 msmith Exp $
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*/
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#include "opt_cpu.h"
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@ -617,20 +617,17 @@ enable_K6_wt_alloc(void)
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#endif
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/* Don't assume that memory size is aligned with 4M. */
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if (Maxmem > 0)
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size = Maxmem / 256;
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size = ((Maxmem >> 8) + 3) >> 2;
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else
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size = 0;
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size = (size + 3) / 4;
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/* Limit is 508M bytes. */
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if (size > 127)
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size = 127;
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whcr = rdmsr(0xc0000082);
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whcr &= ~0x00feLL;
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whcr |= (size << 1);
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if (size > 0x7f)
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size = 0x7f;
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whcr = (rdmsr(0xc0000082) & ~(0x7fLL << 1)) | (size << 1);
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#if defined(PC98) || defined(NO_MEMORY_HOLE)
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if (whcr & 0x00feLL) {
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if (whcr & (0x7fLL << 1)) {
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#ifdef PC98
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/*
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* If bit 2 of port 0x43b is 0, disable wrte allocate for the
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@ -687,7 +684,8 @@ enable_K6_2_wt_alloc(void)
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size = 0;
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/* Limit is 4092M bytes. */
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size &= 0x3ff;
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if (size > 0x3fff)
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size = 0x3ff;
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whcr = (rdmsr(0xc0000082) & ~(0x3ffLL << 22)) | (size << 22);
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#if defined(PC98) || defined(NO_MEMORY_HOLE)
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@ -36,7 +36,7 @@
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* SUCH DAMAGE.
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*
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* from: Id: machdep.c,v 1.193 1996/06/18 01:22:04 bde Exp
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* $Id: identcpu.c,v 1.55 1999/01/08 16:29:56 bde Exp $
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* $Id: identcpu.c,v 1.56 1999/01/09 13:07:18 bde Exp $
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*/
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#include "opt_cpu.h"
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@ -293,7 +293,9 @@ printcpuinfo(void)
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&& ((cpu_id & 0x0f0) < 0x60)
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&& ((cpu_id & 0x00f) > 3))
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enable_K5_wt_alloc();
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else if ((cpu_id & 0x0f0) > 0x70)
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else if (((cpu_id & 0x0f0) > 0x80)
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|| (((cpu_id & 0x0f0) == 0x80)
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&& (cpu_id & 0x00f) > 0x07))
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enable_K6_2_wt_alloc();
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else if ((cpu_id & 0x0f0) > 0x50)
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enable_K6_wt_alloc();
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@ -859,23 +861,11 @@ print_AMD_info(void)
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printf(", %d lines/tag", (regs[3] >> 8) & 0xff);
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print_AMD_assoc((regs[3] >> 16) & 0xff);
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}
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switch (cpu_id & 0xFF0) {
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case 0x560: /* K6 0.35u */
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case 0x570: /* K6 0.25u */
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amd_whcr = rdmsr(0xc0000082);
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if (!(amd_whcr & 0x00fe)) {
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printf("Write Allocate Disable\n");
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} else {
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printf("Write Allocate Enable Limit: %dM bytes\n",
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(u_int32_t)(amd_whcr & 0x00fe) * 4);
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printf("Write Allocate 15-16M bytes: %s\n",
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(amd_whcr & 0x0001) ? "Enable" : "Disable");
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printf("Hardware Write Allocate Control: %s\n",
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(amd_whcr & 0x0100) ? "Enable" : "Disable");
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}
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break;
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case 0x580: /* K6-2 */
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case 0x590: /* K6-3 */
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if (((cpu_id & 0xf00) == 0x500)
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&& (((cpu_id & 0x0f0) > 0x80)
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|| (((cpu_id & 0x0f0) == 0x80)
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&& (cpu_id & 0x00f) > 0x07))) {
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/* K6-2(new core [Stepping 8-F]), K6-3 or later */
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amd_whcr = rdmsr(0xc0000082);
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if (!(amd_whcr & (0x3ff << 22))) {
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printf("Write Allocate Disable\n");
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@ -885,6 +875,19 @@ print_AMD_info(void)
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printf("Write Allocate 15-16M bytes: %s\n",
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(amd_whcr & (1 << 16)) ? "Enable" : "Disable");
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}
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break;
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} else if (((cpu_id & 0xf00) == 0x500)
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&& ((cpu_id & 0x0f0) > 0x50)) {
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/* K6, K6-2(old core) */
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amd_whcr = rdmsr(0xc0000082);
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if (!(amd_whcr & (0x7f << 1))) {
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printf("Write Allocate Disable\n");
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} else {
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printf("Write Allocate Enable Limit: %dM bytes\n",
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(u_int32_t)((amd_whcr & (0x7f << 1)) >> 1) * 4);
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printf("Write Allocate 15-16M bytes: %s\n",
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(amd_whcr & 0x0001) ? "Enable" : "Disable");
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printf("Hardware Write Allocate Control: %s\n",
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(amd_whcr & 0x0100) ? "Enable" : "Disable");
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}
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}
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}
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@ -26,7 +26,7 @@
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $Id: initcpu.c,v 1.15 1998/12/14 06:16:13 dillon Exp $
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* $Id: initcpu.c,v 1.16 1998/12/27 23:23:26 msmith Exp $
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*/
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#include "opt_cpu.h"
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@ -617,20 +617,17 @@ enable_K6_wt_alloc(void)
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#endif
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/* Don't assume that memory size is aligned with 4M. */
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if (Maxmem > 0)
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size = Maxmem / 256;
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size = ((Maxmem >> 8) + 3) >> 2;
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else
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size = 0;
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size = (size + 3) / 4;
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/* Limit is 508M bytes. */
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if (size > 127)
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size = 127;
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whcr = rdmsr(0xc0000082);
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whcr &= ~0x00feLL;
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whcr |= (size << 1);
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if (size > 0x7f)
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size = 0x7f;
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whcr = (rdmsr(0xc0000082) & ~(0x7fLL << 1)) | (size << 1);
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#if defined(PC98) || defined(NO_MEMORY_HOLE)
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if (whcr & 0x00feLL) {
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if (whcr & (0x7fLL << 1)) {
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#ifdef PC98
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/*
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* If bit 2 of port 0x43b is 0, disable wrte allocate for the
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@ -687,7 +684,8 @@ enable_K6_2_wt_alloc(void)
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size = 0;
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/* Limit is 4092M bytes. */
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size &= 0x3ff;
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if (size > 0x3fff)
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size = 0x3ff;
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whcr = (rdmsr(0xc0000082) & ~(0x3ffLL << 22)) | (size << 22);
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#if defined(PC98) || defined(NO_MEMORY_HOLE)
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