Drivers for AMD-8111 and NVIDIA nForce2/3/4 SMBus 2.0 controllers.

svn path=/head/; revision=153618

sys/conf/NOTES

@@ -2167,7 +2167,7 @@ device		cardbus
 # which is a child of the 'smbus' device.
 #
 # Supported devices:
-# smb		standard io through /dev/smb*
+# smb		standard I/O through /dev/smb*
 #
 # Supported SMB interfaces:
 # iicsmb	I2C to SMB bridge with any iicbus interface
@@ -2177,7 +2177,9 @@ device		cardbus
 # ichsmb	Intel ICH SMBus controller chips (82801AA, 82801AB, 82801BA)
 # viapm		VIA VT82C586B/596B/686A and VT8233 Power Management Unit
 # amdpm		AMD 756 Power Management Unit
+# amdsmb	AMD 8111 SMBus 2.0 Controller
 # nfpm		NVIDIA nForce Power Management Unit
+# nfsmb		NVIDIA nForce2/3/4 MCP SMBus 2.0 Controller
 #
 device		smbus		# Bus support, required for smb below.
 
@@ -2186,7 +2188,9 @@ device		alpm
 device		ichsmb
 device		viapm
 device		amdpm
+device		amdsmb
 device		nfpm
+device		nfsmb
 
 device		smb
 

sys/conf/files

@@ -1794,6 +1794,7 @@ pci/agp.c			optional agp pci
 pci/agp_if.m			optional agp pci
 pci/alpm.c			optional alpm pci
 pci/amdpm.c			optional amdpm pci | nfpm pci
+pci/amdsmb.c			optional amdsmb pci
 pci/if_de.c			optional de pci
 pci/if_mn.c			optional mn pci
 pci/if_pcn.c			optional pcn pci
@@ -1808,6 +1809,7 @@ pci/if_wb.c			optional wb pci
 pci/if_xl.c			optional xl pci
 pci/intpm.c			optional intpm pci
 pci/ncr.c			optional ncr pci
+pci/nfsmb.c			optional nfsmb pci
 pci/viapm.c			optional viapm pci
 pci/xrpu.c			optional xrpu pci
 posix4/ksched.c			optional _kposix_priority_scheduling

sys/dev/smbus/smbus.c

@@ -103,5 +103,7 @@ DRIVER_MODULE(smbus, intsmb, smbus_driver, smbus_devclass, 0, 0);
 DRIVER_MODULE(smbus, alpm, smbus_driver, smbus_devclass, 0, 0);
 DRIVER_MODULE(smbus, ichsmb, smbus_driver, smbus_devclass, 0, 0);
 DRIVER_MODULE(smbus, amdpm, smbus_driver, smbus_devclass, 0, 0);
+DRIVER_MODULE(smbus, amdsmb, smbus_driver, smbus_devclass, 0, 0);
+DRIVER_MODULE(smbus, nfsmb, smbus_driver, smbus_devclass, 0, 0);
 DRIVER_MODULE(smbus, viapropm, smbus_driver, smbus_devclass, 0, 0);
 MODULE_VERSION(smbus, SMBUS_MODVER);

sys/modules/i2c/controllers/Makefile

@@ -3,7 +3,7 @@
 .if ${MACHINE} == "pc98"
 SUBDIR = lpbb
 .else
-SUBDIR = alpm amdpm ichsmb intpm viapm lpbb pcf
+SUBDIR = alpm amdpm amdsmb ichsmb intpm nfsmb viapm lpbb pcf
 .endif
 
 .include <bsd.subdir.mk>

sys/modules/i2c/controllers/amdsmb/Makefile

@@ -0,0 +1,9 @@
+# $FreeBSD$
+
+.PATH: ${.CURDIR}/../../../../pci
+
+KMOD=	amdsmb
+SRCS=	amdsmb.c
+SRCS+=	device_if.h smbus_if.h pci_if.h bus_if.h
+
+.include <bsd.kmod.mk>

sys/modules/i2c/controllers/nfsmb/Makefile

@@ -0,0 +1,9 @@
+# $FreeBSD$
+
+.PATH: ${.CURDIR}/../../../../pci
+
+KMOD=	nfsmb
+SRCS=	nfsmb.c
+SRCS+=	device_if.h smbus_if.h pci_if.h bus_if.h
+
+.include <bsd.kmod.mk>

sys/pci/amdsmb.c

@@ -0,0 +1,524 @@
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/kernel.h>
+#include <sys/systm.h>
+#include <sys/module.h>
+#include <sys/bus.h>
+#include <sys/uio.h>
+
+#include <machine/bus.h>
+#include <machine/clock.h>
+#include <machine/resource.h>
+#include <sys/rman.h>
+
+#include <dev/pci/pcivar.h>
+#include <dev/pci/pcireg.h>
+
+#include <dev/iicbus/iiconf.h>
+#include <dev/smbus/smbconf.h>
+#include "smbus_if.h"
+
+#define	AMDSMB_DEBUG(x)	if (amdsmb_debug) (x)
+
+#ifdef DEBUG
+static int amdsmb_debug = 1;
+#else
+static int amdsmb_debug = 0;
+#endif
+
+#define	AMDSMB_VENDORID_AMD		0x1022
+#define	AMDSMB_DEVICEID_AMD8111_SMB2	0x746a
+
+/*
+ * ACPI 3.0, Chapter 12, Embedded Controller Interface.
+ */
+#define	EC_DATA		0x00	/* data register */
+#define	EC_SC		0x04	/* status of controller */
+#define	EC_CMD		0x04	/* command register */
+
+#define	EC_SC_IBF	0x02	/* data ready for embedded controller */
+#define	EC_SC_OBF	0x01	/* data ready for host */
+#define	EC_CMD_WR	0x81	/* write EC */
+#define	EC_CMD_RD	0x80	/* read EC */
+
+/*
+ * ACPI 3.0, Chapter 12, SMBus Host Controller Interface.
+ */
+#define	SMB_PRTCL	0x00	/* protocol */
+#define	SMB_STS		0x01	/* status */
+#define	SMB_ADDR	0x02	/* address */
+#define	SMB_CMD		0x03	/* command */
+#define	SMB_DATA	0x04	/* 32 data registers */
+#define	SMB_BCNT	0x24	/* number of data bytes */
+#define	SMB_ALRM_A	0x25	/* alarm address */
+#define	SMB_ALRM_D	0x26	/* 2 bytes alarm data */
+
+#define	SMB_STS_DONE	0x80
+#define	SMB_STS_ALRM	0x40
+#define	SMB_STS_RES	0x20
+#define	SMB_STS_STATUS	0x1f
+#define	SMB_STS_OK	0x00	/* OK */
+#define	SMB_STS_UF	0x07	/* Unknown Failure */
+#define	SMB_STS_DANA	0x10	/* Device Address Not Acknowledged */
+#define	SMB_STS_DED	0x11	/* Device Error Detected */
+#define	SMB_STS_DCAD	0x12	/* Device Command Access Denied */
+#define	SMB_STS_UE	0x13	/* Unknown Error */
+#define	SMB_STS_DAD	0x17	/* Device Access Denied */
+#define	SMB_STS_T	0x18	/* Timeout */
+#define	SMB_STS_HUP	0x19	/* Host Unsupported Protocol */
+#define	SMB_STS_B	0x1a	/* Busy */
+#define	SMB_STS_PEC	0x1f	/* PEC (CRC-8) Error */
+
+#define	SMB_PRTCL_WRITE			0x00
+#define	SMB_PRTCL_READ			0x01
+#define	SMB_PRTCL_QUICK			0x02
+#define	SMB_PRTCL_BYTE			0x04
+#define	SMB_PRTCL_BYTE_DATA		0x06
+#define	SMB_PRTCL_WORD_DATA		0x08
+#define	SMB_PRTCL_BLOCK_DATA		0x0a
+#define	SMB_PRTCL_PROC_CALL		0x0c
+#define	SMB_PRTCL_BLOCK_PROC_CALL	0x0d
+#define	SMB_PRTCL_PEC			0x80
+
+struct amdsmb_softc {
+	int rid;
+	struct resource *res;
+	bus_space_tag_t smbst;
+	bus_space_handle_t smbsh;
+
+	device_t smbus;
+};
+
+#define	AMDSMB_ECINB(amdsmb, register) \
+	(bus_space_read_1(amdsmb->smbst, amdsmb->smbsh, register))
+#define	AMDSMB_ECOUTB(amdsmb, register, value) \
+	(bus_space_write_1(amdsmb->smbst, amdsmb->smbsh, register, value))
+
+static int
+amdsmb_probe(device_t dev)
+{
+	u_int16_t vid;
+	u_int16_t did;
+
+	vid = pci_get_vendor(dev);
+	did = pci_get_device(dev);
+
+	if (vid == AMDSMB_VENDORID_AMD) {
+		switch(did) {
+		case AMDSMB_DEVICEID_AMD8111_SMB2:
+			device_set_desc(dev, "AMD-8111 SMBus 2.0 Controller");
+			return (BUS_PROBE_DEFAULT);
+		}
+	}
+
+	return (ENXIO);
+}
+
+static int
+amdsmb_attach(device_t dev)
+{
+	struct amdsmb_softc *amdsmb_sc = device_get_softc(dev);
+
+	/* Allocate I/O space */
+	amdsmb_sc->rid = PCIR_BAR(0);
+	
+	amdsmb_sc->res = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
+		&amdsmb_sc->rid, RF_ACTIVE);
+
+	if (amdsmb_sc->res == NULL) {
+		device_printf(dev, "could not map i/o space\n");
+		return (ENXIO);
+	}
+
+	amdsmb_sc->smbst = rman_get_bustag(amdsmb_sc->res);
+	amdsmb_sc->smbsh = rman_get_bushandle(amdsmb_sc->res);
+
+	/* Allocate a new smbus device */
+	amdsmb_sc->smbus = device_add_child(dev, "smbus", -1);
+	if (!amdsmb_sc->smbus)
+		return (EINVAL);
+
+	bus_generic_attach(dev);
+
+	return (0);
+}
+
+static int
+amdsmb_detach(device_t dev)
+{
+	struct amdsmb_softc *amdsmb_sc = device_get_softc(dev);
+
+	if (amdsmb_sc->smbus) {
+		device_delete_child(dev, amdsmb_sc->smbus);
+		amdsmb_sc->smbus = NULL;
+	}
+
+	if (amdsmb_sc->res)
+		bus_release_resource(dev, SYS_RES_IOPORT, amdsmb_sc->rid,
+		    amdsmb_sc->res);
+
+	return (0);
+}
+
+static int
+amdsmb_callback(device_t dev, int index, caddr_t *data)
+{
+	int error = 0;
+
+	switch (index) {
+	case SMB_REQUEST_BUS:
+	case SMB_RELEASE_BUS:
+		break;
+	default:
+		error = EINVAL;
+	}
+
+	return (error);
+}
+
+static int
+amdsmb_ec_wait_write(struct amdsmb_softc *sc)
+{
+	int timeout = 500;
+
+	while (timeout-- && AMDSMB_ECINB(sc, EC_SC) & EC_SC_IBF)
+		DELAY(1);
+	if (timeout == 0) {
+		device_printf(sc->smbus, "timeout waiting for IBF to clear\n");
+		return (1);
+	}
+	return (0);
+}
+
+static int
+amdsmb_ec_wait_read(struct amdsmb_softc *sc)
+{
+	int timeout = 500;
+
+	while (timeout-- && ~AMDSMB_ECINB(sc, EC_SC) & EC_SC_OBF)
+		DELAY(1);
+	if (timeout == 0) {
+		device_printf(sc->smbus, "timeout waiting for OBF to set\n");
+		return (1);
+	}
+	return (0);
+}
+
+static int
+amdsmb_ec_read(struct amdsmb_softc *sc, u_char addr, u_char *data)
+{
+
+	if (amdsmb_ec_wait_write(sc))
+		return (1);
+	AMDSMB_ECOUTB(sc, EC_CMD, EC_CMD_RD);
+
+	if (amdsmb_ec_wait_write(sc))
+		return (1);
+	AMDSMB_ECOUTB(sc, EC_DATA, addr);
+
+	if (amdsmb_ec_wait_read(sc))
+		return (1);
+	*data = AMDSMB_ECINB(sc, EC_DATA);
+
+	return (0);
+}
+
+static int
+amdsmb_ec_write(struct amdsmb_softc *sc, u_char addr, u_char data)
+{
+
+	if (amdsmb_ec_wait_write(sc))
+		return (1);
+	AMDSMB_ECOUTB(sc, EC_CMD, EC_CMD_WR);
+
+	if (amdsmb_ec_wait_write(sc))
+		return (1);
+	AMDSMB_ECOUTB(sc, EC_DATA, addr);
+
+	if (amdsmb_ec_wait_write(sc))
+		return (1);
+	AMDSMB_ECOUTB(sc, EC_DATA, data);
+
+	return (0);
+}
+
+static int
+amdsmb_wait(struct amdsmb_softc *sc)
+{
+	u_char sts, temp;
+	int error, count;
+
+	amdsmb_ec_read(sc, SMB_PRTCL, &temp);
+	if (temp != 0)
+	{
+		count = 10000;
+		do {
+			DELAY(500);
+			amdsmb_ec_read(sc, SMB_PRTCL, &temp);
+		} while (temp != 0 && count--);
+		if (count == 0)
+			return (SMB_ETIMEOUT);
+	}
+
+	amdsmb_ec_read(sc, SMB_STS, &sts);
+	sts &= SMB_STS_STATUS;
+	AMDSMB_DEBUG(printf("amdsmb: STS=0x%x\n", sts));
+
+	switch (sts) {
+	case SMB_STS_OK:
+		error = SMB_ENOERR;
+		break;
+	case SMB_STS_DANA:
+		error = SMB_ENOACK;
+		break;
+	case SMB_STS_B:
+		error = SMB_EBUSY;
+		break;
+	case SMB_STS_T:
+		error = SMB_ETIMEOUT;
+		break;
+	case SMB_STS_DCAD:
+	case SMB_STS_DAD:
+	case SMB_STS_HUP:
+		error = SMB_ENOTSUPP;
+		break;
+	default:
+		error = SMB_EBUSERR;
+		break;
+	}
+
+	return (error);
+}
+
+static int
+amdsmb_quick(device_t dev, u_char slave, int how)
+{
+	struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
+	u_char protocol;
+	int error;
+
+	protocol = SMB_PRTCL_QUICK;
+
+	switch (how) {
+	case SMB_QWRITE:
+		protocol |= SMB_PRTCL_WRITE;
+		AMDSMB_DEBUG(printf("amdsmb: QWRITE to 0x%x", slave));
+		break;
+	case SMB_QREAD:
+		protocol |= SMB_PRTCL_READ;
+		AMDSMB_DEBUG(printf("amdsmb: QREAD to 0x%x", slave));
+		break;
+	default:
+		panic("%s: unknown QUICK command (%x)!", __func__, how);
+	}
+
+	amdsmb_ec_write(sc, SMB_ADDR, slave);
+	amdsmb_ec_write(sc, SMB_PRTCL, protocol);
+
+	error = amdsmb_wait(sc);
+
+	AMDSMB_DEBUG(printf(", error=0x%x\n", error));
+
+	return (error);
+}
+
+static int
+amdsmb_sendb(device_t dev, u_char slave, char byte)
+{
+	struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
+	int error;
+
+	amdsmb_ec_write(sc, SMB_CMD, byte);
+	amdsmb_ec_write(sc, SMB_ADDR, slave);
+	amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_WRITE | SMB_PRTCL_BYTE);
+
+	error = amdsmb_wait(sc);
+
+	AMDSMB_DEBUG(printf("amdsmb: SENDB to 0x%x, byte=0x%x, error=0x%x\n",
+	   slave, byte, error));
+
+	return (error);
+}
+
+static int
+amdsmb_recvb(device_t dev, u_char slave, char *byte)
+{
+	struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
+	int error;
+
+	amdsmb_ec_write(sc, SMB_ADDR, slave);
+	amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_READ | SMB_PRTCL_BYTE);
+
+	if ((error = amdsmb_wait(sc)) == SMB_ENOERR)
+		amdsmb_ec_read(sc, SMB_DATA, byte);
+
+	AMDSMB_DEBUG(printf("amdsmb: RECVB from 0x%x, byte=0x%x, error=0x%x\n",
+	    slave, *byte, error));
+
+	return (error);
+}
+
+static int
+amdsmb_writeb(device_t dev, u_char slave, char cmd, char byte)
+{
+	struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
+	int error;
+
+	amdsmb_ec_write(sc, SMB_CMD, cmd);
+	amdsmb_ec_write(sc, SMB_DATA, byte);
+	amdsmb_ec_write(sc, SMB_ADDR, slave);
+	amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_WRITE | SMB_PRTCL_BYTE_DATA);
+
+	error = amdsmb_wait(sc);
+
+	AMDSMB_DEBUG(printf("amdsmb: WRITEB to 0x%x, cmd=0x%x, byte=0x%x, "
+	    "error=0x%x\n", slave, cmd, byte, error));
+
+	return (error);
+}
+
+static int
+amdsmb_readb(device_t dev, u_char slave, char cmd, char *byte)
+{
+	struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
+	int error;
+
+	amdsmb_ec_write(sc, SMB_CMD, cmd);
+	amdsmb_ec_write(sc, SMB_ADDR, slave);
+	amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_READ | SMB_PRTCL_BYTE_DATA);
+
+	if ((error = amdsmb_wait(sc)) == SMB_ENOERR)
+		amdsmb_ec_read(sc, SMB_DATA, byte);
+
+	AMDSMB_DEBUG(printf("amdsmb: READB from 0x%x, cmd=0x%x, byte=0x%x, "
+	    "error=0x%x\n", slave, cmd, (unsigned char)*byte, error));
+
+	return (error);
+}
+
+static int
+amdsmb_writew(device_t dev, u_char slave, char cmd, short word)
+{
+	struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
+	int error;
+
+	amdsmb_ec_write(sc, SMB_CMD, cmd);
+	amdsmb_ec_write(sc, SMB_DATA, word);
+	amdsmb_ec_write(sc, SMB_DATA + 1, word >> 8);
+	amdsmb_ec_write(sc, SMB_ADDR, slave);
+	amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_WRITE | SMB_PRTCL_WORD_DATA);
+
+	error = amdsmb_wait(sc);
+
+	AMDSMB_DEBUG(printf("amdsmb: WRITEW to 0x%x, cmd=0x%x, word=0x%x, "
+	    "error=0x%x\n", slave, cmd, word, error));
+
+	return (error);
+}
+
+static int
+amdsmb_readw(device_t dev, u_char slave, char cmd, short *word)
+{
+	struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
+	u_char temp[2];
+	int error;
+
+	amdsmb_ec_write(sc, SMB_CMD, cmd);
+	amdsmb_ec_write(sc, SMB_ADDR, slave);
+	amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_READ | SMB_PRTCL_WORD_DATA);
+
+	if ((error = amdsmb_wait(sc)) == SMB_ENOERR) {
+		amdsmb_ec_read(sc, SMB_DATA + 0, &temp[0]);
+		amdsmb_ec_read(sc, SMB_DATA + 1, &temp[1]);
+		*word = temp[0] | (temp[1] << 8);
+	}
+
+	AMDSMB_DEBUG(printf("amdsmb: READW from 0x%x, cmd=0x%x, word=0x%x, "
+	    "error=0x%x\n", slave, cmd, (unsigned short)*word, error));
+
+	return (error);
+}
+
+static int
+amdsmb_bwrite(device_t dev, u_char slave, char cmd, u_char count, char *buf)
+{
+	struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
+	u_char len, i;
+	int error;
+
+	len = min(count, 32);
+	amdsmb_ec_write(sc, SMB_CMD, cmd);
+	amdsmb_ec_write(sc, SMB_BCNT, len);
+	for (i = 0; i < len; i++)
+		amdsmb_ec_write(sc, SMB_DATA + i, buf[i]);
+	amdsmb_ec_write(sc, SMB_ADDR, slave);
+	amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_WRITE | SMB_PRTCL_BLOCK_DATA);
+
+	error = amdsmb_wait(sc);
+
+	AMDSMB_DEBUG(printf("amdsmb: WRITEBLK to 0x%x, count=0x%x, cmd=0x%x, "
+	    "error=0x%x", slave, count, cmd, error));
+
+	return (error);
+}
+
+static int
+amdsmb_bread(device_t dev, u_char slave, char cmd, u_char count, char *buf)
+{
+	struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
+	u_char len, i;
+	int error;
+
+	amdsmb_ec_write(sc, SMB_CMD, cmd);
+	amdsmb_ec_write(sc, SMB_ADDR, slave);
+	amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_READ | SMB_PRTCL_BLOCK_DATA);
+
+	if ((error = amdsmb_wait(sc)) == SMB_ENOERR) {
+		amdsmb_ec_read(sc, SMB_BCNT, &len);
+		len = min(len, 32);
+		for (i = 0; i < len; i++)
+			amdsmb_ec_read(sc, SMB_DATA + i, buf + i);
+	}
+
+	AMDSMB_DEBUG(printf("amdsmb: READBLK to 0x%x, count=0x%x, cmd=0x%x, "
+	    "error=0x%x", slave, count, cmd, error));
+
+	return (error);
+}
+
+static device_method_t amdsmb_methods[] = {
+	/* Device interface */
+	DEVMETHOD(device_probe,		amdsmb_probe),
+	DEVMETHOD(device_attach,	amdsmb_attach),
+	DEVMETHOD(device_detach,	amdsmb_detach),
+
+	/* SMBus interface */
+	DEVMETHOD(smbus_callback,	amdsmb_callback),
+	DEVMETHOD(smbus_quick,		amdsmb_quick),
+	DEVMETHOD(smbus_sendb,		amdsmb_sendb),
+	DEVMETHOD(smbus_recvb,		amdsmb_recvb),
+	DEVMETHOD(smbus_writeb,		amdsmb_writeb),
+	DEVMETHOD(smbus_readb,		amdsmb_readb),
+	DEVMETHOD(smbus_writew,		amdsmb_writew),
+	DEVMETHOD(smbus_readw,		amdsmb_readw),
+	DEVMETHOD(smbus_bwrite,		amdsmb_bwrite),
+	DEVMETHOD(smbus_bread,		amdsmb_bread),
+
+	{ 0, 0 }
+};
+
+static devclass_t amdsmb_devclass;
+
+static driver_t amdsmb_driver = {
+	"amdsmb",
+	amdsmb_methods,
+	sizeof(struct amdsmb_softc),
+};
+
+DRIVER_MODULE(amdsmb, pci, amdsmb_driver, amdsmb_devclass, 0, 0);
+
+MODULE_DEPEND(amdsmb, pci, 1, 1, 1);
+MODULE_DEPEND(amdsmb, smbus, SMBUS_MINVER, SMBUS_PREFVER, SMBUS_MAXVER);
+MODULE_VERSION(amdsmb, 1);

sys/pci/nfsmb.c

@@ -0,0 +1,553 @@
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/kernel.h>
+#include <sys/systm.h>
+#include <sys/module.h>
+#include <sys/bus.h>
+#include <sys/uio.h>
+
+#include <machine/bus.h>
+#include <machine/clock.h>
+#include <machine/resource.h>
+#include <sys/rman.h>
+
+#include <dev/pci/pcivar.h>
+#include <dev/pci/pcireg.h>
+
+#include <dev/iicbus/iiconf.h>
+#include <dev/smbus/smbconf.h>
+#include "smbus_if.h"
+
+#define	NFSMB_DEBUG(x)	if (nfsmb_debug) (x)
+
+#ifdef DEBUG
+static int nfsmb_debug = 1;
+#else
+static int nfsmb_debug = 0;
+#endif
+
+/* NVIDIA nForce2/3/4 MCP */
+#define	NFSMB_VENDORID_NVIDIA		0x10de
+#define	NFSMB_DEVICEID_NF2_SMB		0x0064
+#define	NFSMB_DEVICEID_NF2_ULTRA_SMB	0x0084
+#define	NFSMB_DEVICEID_NF3_PRO150_SMB	0x00d4
+#define	NFSMB_DEVICEID_NF3_250GB_SMB	0x00e4
+#define	NFSMB_DEVICEID_NF4_SMB		0x0052
+
+/* PCI Configuration space registers */
+#define	NF2PCI_SMBASE_1		PCIR_BAR(4)
+#define	NF2PCI_SMBASE_2		PCIR_BAR(5)
+
+/*
+ * ACPI 3.0, Chapter 12, SMBus Host Controller Interface.
+ */
+#define	SMB_PRTCL		0x00	/* protocol */
+#define	SMB_STS			0x01	/* status */
+#define	SMB_ADDR		0x02	/* address */
+#define	SMB_CMD			0x03	/* command */
+#define	SMB_DATA		0x04	/* 32 data registers */
+#define	SMB_BCNT		0x24	/* number of data bytes */
+#define	SMB_ALRM_A		0x25	/* alarm address */
+#define	SMB_ALRM_D		0x26	/* 2 bytes alarm data */
+
+#define	SMB_STS_DONE		0x80
+#define	SMB_STS_ALRM		0x40
+#define	SMB_STS_RES		0x20
+#define	SMB_STS_STATUS		0x1f
+#define	SMB_STS_OK		0x00	/* OK */
+#define	SMB_STS_UF		0x07	/* Unknown Failure */
+#define	SMB_STS_DANA		0x10	/* Device Address Not Acknowledged */
+#define	SMB_STS_DED		0x11	/* Device Error Detected */
+#define	SMB_STS_DCAD		0x12	/* Device Command Access Denied */
+#define	SMB_STS_UE		0x13	/* Unknown Error */
+#define	SMB_STS_DAD		0x17	/* Device Access Denied */
+#define	SMB_STS_T		0x18	/* Timeout */
+#define	SMB_STS_HUP		0x19	/* Host Unsupported Protocol */
+#define	SMB_STS_B		0x1A	/* Busy */
+#define	SMB_STS_PEC		0x1F	/* PEC (CRC-8) Error */
+
+#define	SMB_PRTCL_WRITE		0x00
+#define	SMB_PRTCL_READ		0x01
+#define	SMB_PRTCL_QUICK		0x02
+#define	SMB_PRTCL_BYTE		0x04
+#define	SMB_PRTCL_BYTE_DATA	0x06
+#define	SMB_PRTCL_WORD_DATA	0x08
+#define	SMB_PRTCL_BLOCK_DATA	0x0a
+#define	SMB_PRTCL_PROC_CALL	0x0c
+#define	SMB_PRTCL_BLOCK_PROC_CALL 0x0d
+#define	SMB_PRTCL_PEC		0x80
+
+struct nfsmb_softc {
+	int rid;
+	struct resource *res;
+	bus_space_tag_t smbst;
+	bus_space_handle_t smbsh;
+
+	device_t smbus;
+	device_t subdev;
+};
+
+#define	NFSMB_SMBINB(nfsmb, register) \
+	(bus_space_read_1(nfsmb->smbst, nfsmb->smbsh, register))
+#define	NFSMB_SMBOUTB(nfsmb, register, value) \
+	(bus_space_write_1(nfsmb->smbst, nfsmb->smbsh, register, value))
+
+static int
+nfsmbsub_probe(device_t dev)
+{
+
+	device_set_desc(dev, "nForce2/3/4 MCP SMBus Controller");
+	return (BUS_PROBE_DEFAULT);
+}
+
+static int
+nfsmb_probe(device_t dev)
+{
+	u_int16_t vid;
+	u_int16_t did;
+
+	vid = pci_get_vendor(dev);
+	did = pci_get_device(dev);
+
+	if (vid == NFSMB_VENDORID_NVIDIA) {
+		switch(did) {
+		case NFSMB_DEVICEID_NF2_SMB:
+		case NFSMB_DEVICEID_NF2_ULTRA_SMB:
+		case NFSMB_DEVICEID_NF3_PRO150_SMB:
+		case NFSMB_DEVICEID_NF3_250GB_SMB:
+		case NFSMB_DEVICEID_NF4_SMB:
+			device_set_desc(dev, "nForce2/3/4 MCP SMBus Controller");
+			return (BUS_PROBE_DEFAULT);
+		}
+	}
+
+	return (ENXIO);
+}
+
+static int
+nfsmbsub_attach(device_t dev)
+{
+	device_t parent;
+	struct nfsmb_softc *nfsmbsub_sc = device_get_softc(dev);
+
+	parent = device_get_parent(dev);
+
+	nfsmbsub_sc->rid = NF2PCI_SMBASE_2;
+
+	nfsmbsub_sc->res = bus_alloc_resource_any(parent, SYS_RES_IOPORT,
+	    &nfsmbsub_sc->rid, RF_ACTIVE);
+	if (nfsmbsub_sc->res == NULL) {
+		device_printf(dev, "could not map i/o space\n");
+		return (ENXIO);
+	}
+	nfsmbsub_sc->smbst = rman_get_bustag(nfsmbsub_sc->res);
+	nfsmbsub_sc->smbsh = rman_get_bushandle(nfsmbsub_sc->res);
+
+	nfsmbsub_sc->smbus = device_add_child(dev, "smbus", -1);
+	if (nfsmbsub_sc->smbus == NULL)
+		return (EINVAL);
+
+	bus_generic_attach(dev);
+
+	return (0);
+}
+
+static int
+nfsmb_attach(device_t dev)
+{
+	struct nfsmb_softc *nfsmb_sc = device_get_softc(dev);
+
+	/* Allocate I/O space */
+	nfsmb_sc->rid = NF2PCI_SMBASE_1;
+
+	nfsmb_sc->res = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
+		&nfsmb_sc->rid, RF_ACTIVE);
+
+	if (nfsmb_sc->res == NULL) {
+		device_printf(dev, "could not map i/o space\n");
+		return (ENXIO);
+	}
+
+	nfsmb_sc->smbst = rman_get_bustag(nfsmb_sc->res);
+	nfsmb_sc->smbsh = rman_get_bushandle(nfsmb_sc->res);
+
+	/* Allocate a new smbus device */
+	nfsmb_sc->smbus = device_add_child(dev, "smbus", -1);
+	if (!nfsmb_sc->smbus)
+		return (EINVAL);
+
+	nfsmb_sc->subdev = NULL;
+	switch (pci_get_device(dev)) {
+	case NFSMB_DEVICEID_NF2_SMB:
+	case NFSMB_DEVICEID_NF2_ULTRA_SMB:
+	case NFSMB_DEVICEID_NF3_PRO150_SMB:
+	case NFSMB_DEVICEID_NF3_250GB_SMB:
+	case NFSMB_DEVICEID_NF4_SMB:
+		/* Trying to add secondary device as slave */
+		nfsmb_sc->subdev = device_add_child(dev, "nfsmb", -1);
+		if (!nfsmb_sc->subdev)
+			return (EINVAL);
+		break;
+	default:
+		break;
+	}
+
+	bus_generic_attach(dev);
+
+	return (0);
+}
+
+static int
+nfsmbsub_detach(device_t dev)
+{
+	device_t parent;
+	struct nfsmb_softc *nfsmbsub_sc = device_get_softc(dev);
+
+	parent = device_get_parent(dev);
+
+	if (nfsmbsub_sc->smbus) {
+		device_delete_child(dev, nfsmbsub_sc->smbus);
+		nfsmbsub_sc->smbus = NULL;
+	}
+	if (nfsmbsub_sc->res) {
+		bus_release_resource(parent, SYS_RES_IOPORT, nfsmbsub_sc->rid,
+		    nfsmbsub_sc->res);
+		nfsmbsub_sc->res = NULL;
+	}
+	return (0);
+}
+
+static int
+nfsmb_detach(device_t dev)
+{
+	struct nfsmb_softc *nfsmb_sc = device_get_softc(dev);
+
+	if (nfsmb_sc->subdev) {
+		device_delete_child(dev, nfsmb_sc->subdev);
+		nfsmb_sc->subdev = NULL;
+	}
+
+	if (nfsmb_sc->smbus) {
+		device_delete_child(dev, nfsmb_sc->smbus);
+		nfsmb_sc->smbus = NULL;
+	}
+
+	if (nfsmb_sc->res) {
+		bus_release_resource(dev, SYS_RES_IOPORT, nfsmb_sc->rid,
+		    nfsmb_sc->res);
+		nfsmb_sc->res = NULL;
+	}
+
+	return (0);
+}
+
+static int
+nfsmb_callback(device_t dev, int index, caddr_t *data)
+{
+	int error = 0;
+
+	switch (index) {
+	case SMB_REQUEST_BUS:
+	case SMB_RELEASE_BUS:
+		break;
+	default:
+		error = EINVAL;
+	}
+
+	return (error);
+}
+
+static int
+nfsmb_wait(struct nfsmb_softc *sc)
+{
+	u_char sts;
+	int error, count;
+
+	if (NFSMB_SMBINB(sc, SMB_PRTCL) != 0)
+	{
+		count = 10000;
+		do {
+			DELAY(500);
+		} while (NFSMB_SMBINB(sc, SMB_PRTCL) != 0 && count--);
+		if (count == 0)
+			return (SMB_ETIMEOUT);
+	}
+
+	sts = NFSMB_SMBINB(sc, SMB_STS) & SMB_STS_STATUS;
+	NFSMB_DEBUG(printf("nfsmb: STS=0x%x\n", sts));
+
+	switch (sts) {
+	case SMB_STS_OK:
+		error = SMB_ENOERR;
+		break;
+	case SMB_STS_DANA:
+		error = SMB_ENOACK;
+		break;
+	case SMB_STS_B:
+		error = SMB_EBUSY;
+		break;
+	case SMB_STS_T:
+		error = SMB_ETIMEOUT;
+		break;
+	case SMB_STS_DCAD:
+	case SMB_STS_DAD:
+	case SMB_STS_HUP:
+		error = SMB_ENOTSUPP;
+		break;
+	default:
+		error = SMB_EBUSERR;
+		break;
+	}
+
+	return (error);
+}
+
+static int
+nfsmb_quick(device_t dev, u_char slave, int how)
+{
+	struct nfsmb_softc *sc = (struct nfsmb_softc *)device_get_softc(dev);
+	u_char protocol;
+	int error;
+
+	protocol = SMB_PRTCL_QUICK;
+
+	switch (how) {
+	case SMB_QWRITE:
+		protocol |= SMB_PRTCL_WRITE;
+		NFSMB_DEBUG(printf("nfsmb: QWRITE to 0x%x", slave));
+		break;
+	case SMB_QREAD:
+		protocol |= SMB_PRTCL_READ;
+		NFSMB_DEBUG(printf("nfsmb: QREAD to 0x%x", slave));
+		break;
+	default:
+		panic("%s: unknown QUICK command (%x)!", __func__, how);
+	}
+
+	NFSMB_SMBOUTB(sc, SMB_ADDR, slave);
+	NFSMB_SMBOUTB(sc, SMB_PRTCL, protocol);
+
+	error = nfsmb_wait(sc);
+
+	NFSMB_DEBUG(printf(", error=0x%x\n", error));
+
+	return (error);
+}
+
+static int
+nfsmb_sendb(device_t dev, u_char slave, char byte)
+{
+	struct nfsmb_softc *sc = (struct nfsmb_softc *)device_get_softc(dev);
+	int error;
+
+	NFSMB_SMBOUTB(sc, SMB_CMD, byte);
+	NFSMB_SMBOUTB(sc, SMB_ADDR, slave);
+	NFSMB_SMBOUTB(sc, SMB_PRTCL, SMB_PRTCL_WRITE | SMB_PRTCL_BYTE);
+
+	error = nfsmb_wait(sc);
+
+	NFSMB_DEBUG(printf("nfsmb: SENDB to 0x%x, byte=0x%x, error=0x%x\n", slave, byte, error));
+
+	return (error);
+}
+
+static int
+nfsmb_recvb(device_t dev, u_char slave, char *byte)
+{
+	struct nfsmb_softc *sc = (struct nfsmb_softc *)device_get_softc(dev);
+	int error;
+
+	NFSMB_SMBOUTB(sc, SMB_ADDR, slave);
+	NFSMB_SMBOUTB(sc, SMB_PRTCL, SMB_PRTCL_READ | SMB_PRTCL_BYTE);
+
+	if ((error = nfsmb_wait(sc)) == SMB_ENOERR)
+		*byte = NFSMB_SMBINB(sc, SMB_DATA);
+
+	NFSMB_DEBUG(printf("nfsmb: RECVB from 0x%x, byte=0x%x, error=0x%x\n", slave, *byte, error));
+
+	return (error);
+}
+
+static int
+nfsmb_writeb(device_t dev, u_char slave, char cmd, char byte)
+{
+	struct nfsmb_softc *sc = (struct nfsmb_softc *)device_get_softc(dev);
+	int error;
+
+	NFSMB_SMBOUTB(sc, SMB_CMD, cmd);
+	NFSMB_SMBOUTB(sc, SMB_DATA, byte);
+	NFSMB_SMBOUTB(sc, SMB_ADDR, slave);
+	NFSMB_SMBOUTB(sc, SMB_PRTCL, SMB_PRTCL_WRITE | SMB_PRTCL_BYTE_DATA);
+
+	error = nfsmb_wait(sc);
+
+	NFSMB_DEBUG(printf("nfsmb: WRITEB to 0x%x, cmd=0x%x, byte=0x%x, error=0x%x\n", slave, cmd, byte, error));
+
+	return (error);
+}
+
+static int
+nfsmb_readb(device_t dev, u_char slave, char cmd, char *byte)
+{
+	struct nfsmb_softc *sc = (struct nfsmb_softc *)device_get_softc(dev);
+	int error;
+
+	NFSMB_SMBOUTB(sc, SMB_CMD, cmd);
+	NFSMB_SMBOUTB(sc, SMB_ADDR, slave);
+	NFSMB_SMBOUTB(sc, SMB_PRTCL, SMB_PRTCL_READ | SMB_PRTCL_BYTE_DATA);
+
+	if ((error = nfsmb_wait(sc)) == SMB_ENOERR)
+		*byte = NFSMB_SMBINB(sc, SMB_DATA);
+
+	NFSMB_DEBUG(printf("nfsmb: READB from 0x%x, cmd=0x%x, byte=0x%x, error=0x%x\n", slave, cmd, (unsigned char)*byte, error));
+
+	return (error);
+}
+
+static int
+nfsmb_writew(device_t dev, u_char slave, char cmd, short word)
+{
+	struct nfsmb_softc *sc = (struct nfsmb_softc *)device_get_softc(dev);
+	int error;
+
+	NFSMB_SMBOUTB(sc, SMB_CMD, cmd);
+	NFSMB_SMBOUTB(sc, SMB_DATA, word);
+	NFSMB_SMBOUTB(sc, SMB_DATA + 1, word >> 8);
+	NFSMB_SMBOUTB(sc, SMB_ADDR, slave);
+	NFSMB_SMBOUTB(sc, SMB_PRTCL, SMB_PRTCL_WRITE | SMB_PRTCL_WORD_DATA);
+
+	error = nfsmb_wait(sc);
+
+	NFSMB_DEBUG(printf("nfsmb: WRITEW to 0x%x, cmd=0x%x, word=0x%x, error=0x%x\n", slave, cmd, word, error));
+
+	return (error);
+}
+
+static int
+nfsmb_readw(device_t dev, u_char slave, char cmd, short *word)
+{
+	struct nfsmb_softc *sc = (struct nfsmb_softc *)device_get_softc(dev);
+	int error;
+
+	NFSMB_SMBOUTB(sc, SMB_CMD, cmd);
+	NFSMB_SMBOUTB(sc, SMB_ADDR, slave);
+	NFSMB_SMBOUTB(sc, SMB_PRTCL, SMB_PRTCL_READ | SMB_PRTCL_WORD_DATA);
+
+	if ((error = nfsmb_wait(sc)) == SMB_ENOERR)
+		*word = NFSMB_SMBINB(sc, SMB_DATA) |
+		    (NFSMB_SMBINB(sc, SMB_DATA + 1) << 8);
+
+	NFSMB_DEBUG(printf("nfsmb: READW from 0x%x, cmd=0x%x, word=0x%x, error=0x%x\n", slave, cmd, (unsigned short)*word, error));
+
+	return (error);
+}
+
+static int
+nfsmb_bwrite(device_t dev, u_char slave, char cmd, u_char count, char *buf)
+{
+	struct nfsmb_softc *sc = (struct nfsmb_softc *)device_get_softc(dev);
+	u_char len, i;
+	int error;
+
+	len = min(count, 32);
+	NFSMB_SMBOUTB(sc, SMB_CMD, cmd);
+	NFSMB_SMBOUTB(sc, SMB_BCNT, len);
+	for (i = 0; i < len; i++)
+		NFSMB_SMBOUTB(sc, SMB_DATA + i, buf[i]);
+	NFSMB_SMBOUTB(sc, SMB_ADDR, slave);
+	NFSMB_SMBOUTB(sc, SMB_PRTCL, SMB_PRTCL_WRITE | SMB_PRTCL_BLOCK_DATA);
+
+	error = nfsmb_wait(sc);
+
+	NFSMB_DEBUG(printf("nfsmb: WRITEBLK to 0x%x, count=0x%x, cmd=0x%x, error=0x%x", slave, count, cmd, error));
+
+	return (error);
+}
+
+static int
+nfsmb_bread(device_t dev, u_char slave, char cmd, u_char count, char *buf)
+{
+	struct nfsmb_softc *sc = (struct nfsmb_softc *)device_get_softc(dev);
+	u_char len, i;
+	int error;
+
+	NFSMB_SMBOUTB(sc, SMB_CMD, cmd);
+	NFSMB_SMBOUTB(sc, SMB_ADDR, slave);
+	NFSMB_SMBOUTB(sc, SMB_PRTCL, SMB_PRTCL_READ | SMB_PRTCL_BLOCK_DATA);
+
+	if ((error = nfsmb_wait(sc)) == SMB_ENOERR) {
+		len = NFSMB_SMBINB(sc, SMB_BCNT);
+		len = min(len, 32);
+		for (i = 0; i < len; i++)
+			buf[i] = NFSMB_SMBINB(sc, SMB_DATA + i);
+	}
+
+	NFSMB_DEBUG(printf("nfsmb: READBLK to 0x%x, count=0x%x, cmd=0x%x, error=0x%x", slave, count, cmd, error));
+
+	return (error);
+}
+
+static device_method_t nfsmb_methods[] = {
+	/* Device interface */
+	DEVMETHOD(device_probe,		nfsmb_probe),
+	DEVMETHOD(device_attach,	nfsmb_attach),
+	DEVMETHOD(device_detach,	nfsmb_detach),
+
+	/* SMBus interface */
+	DEVMETHOD(smbus_callback,	nfsmb_callback),
+	DEVMETHOD(smbus_quick,		nfsmb_quick),
+	DEVMETHOD(smbus_sendb,		nfsmb_sendb),
+	DEVMETHOD(smbus_recvb,		nfsmb_recvb),
+	DEVMETHOD(smbus_writeb,		nfsmb_writeb),
+	DEVMETHOD(smbus_readb,		nfsmb_readb),
+	DEVMETHOD(smbus_writew,		nfsmb_writew),
+	DEVMETHOD(smbus_readw,		nfsmb_readw),
+	DEVMETHOD(smbus_bwrite,		nfsmb_bwrite),
+	DEVMETHOD(smbus_bread,		nfsmb_bread),
+
+	{ 0, 0 }
+};
+
+static device_method_t nfsmbsub_methods[] = {
+	/* Device interface */
+	DEVMETHOD(device_probe,		nfsmbsub_probe),
+	DEVMETHOD(device_attach,	nfsmbsub_attach),
+	DEVMETHOD(device_detach,	nfsmbsub_detach),
+
+	/* SMBus interface */
+	DEVMETHOD(smbus_callback,	nfsmb_callback),
+	DEVMETHOD(smbus_quick,		nfsmb_quick),
+	DEVMETHOD(smbus_sendb,		nfsmb_sendb),
+	DEVMETHOD(smbus_recvb,		nfsmb_recvb),
+	DEVMETHOD(smbus_writeb,		nfsmb_writeb),
+	DEVMETHOD(smbus_readb,		nfsmb_readb),
+	DEVMETHOD(smbus_writew,		nfsmb_writew),
+	DEVMETHOD(smbus_readw,		nfsmb_readw),
+	DEVMETHOD(smbus_bwrite,		nfsmb_bwrite),
+	DEVMETHOD(smbus_bread,		nfsmb_bread),
+
+	{ 0, 0 }
+};
+
+static devclass_t nfsmb_devclass;
+
+static driver_t nfsmb_driver = {
+	"nfsmb",
+	nfsmb_methods,
+	sizeof(struct nfsmb_softc),
+};
+
+static driver_t nfsmbsub_driver = {
+	"nfsmb",
+	nfsmbsub_methods,
+	sizeof(struct nfsmb_softc),
+};
+
+DRIVER_MODULE(nfsmb, pci, nfsmb_driver, nfsmb_devclass, 0, 0);
+DRIVER_MODULE(nfsmb, nfsmb, nfsmbsub_driver, nfsmb_devclass, 0, 0);
+
+MODULE_DEPEND(nfsmb, pci, 1, 1, 1);
+MODULE_DEPEND(nfsmb, smbus, SMBUS_MINVER, SMBUS_PREFVER, SMBUS_MAXVER);
+MODULE_VERSION(nfsmb, 1);