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mirror of https://git.FreeBSD.org/src.git synced 2024-10-19 02:29:40 +00:00

Fix low-level uart drivers that set their fifo sizes in the softc too late.

uart(4) allocates send and receiver buffers in attach() before it calls
the low-level driver's attach routine.  Many low-level drivers set the
fifo sizes in their attach routine, which is too late.  Other drivers set
them in the probe() routine, so that they're available when uart(4)
allocates buffers.  This fixes the ones that were setting the values too
late by moving the code to probe().
This commit is contained in:
Ian Lepore 2013-04-01 00:44:20 +00:00
parent 5ea561e03a
commit 4d7abca057
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=248965
10 changed files with 47 additions and 41 deletions

View File

@ -233,14 +233,6 @@ static kobj_method_t s3c2410_methods[] = {
int
s3c2410_bus_probe(struct uart_softc *sc)
{
return (0);
}
static int
s3c2410_bus_attach(struct uart_softc *sc)
{
uintptr_t irq;
switch(s3c2xx0_softc->sc_cpu) {
case CPU_S3C2410:
sc->sc_txfifosz = 16;
@ -254,6 +246,14 @@ s3c2410_bus_attach(struct uart_softc *sc)
return (ENXIO);
}
return (0);
}
static int
s3c2410_bus_attach(struct uart_softc *sc)
{
uintptr_t irq;
sc->sc_hwiflow = 0;
sc->sc_hwoflow = 0;

View File

@ -156,6 +156,8 @@ static kobj_method_t sa1110_methods[] = {
int
sa1110_bus_probe(struct uart_softc *sc)
{
sc->sc_txfifosz = 3;
sc->sc_rxfifosz = 1;
return (0);
}
@ -164,8 +166,6 @@ sa1110_bus_attach(struct uart_softc *sc)
{
bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas));
sc->sc_txfifosz = 3;
sc->sc_rxfifosz = 1;
sc->sc_hwiflow = 0;
uart_setreg(&sc->sc_bas, SACOM_CR3, CR3_RXE | CR3_TXE | CR3_RIE | CR3_TIE);
return (0);

View File

@ -187,9 +187,6 @@ imx_uart_bus_attach(struct uart_softc *sc)
imx_uart_init(bas, 115200, 8, 1, 0);
}
sc->sc_rxfifosz = 1;
sc->sc_txfifosz = 1;
(void)imx_uart_bus_getsig(sc);
/* XXX workaround to have working console on manut prompt */
@ -353,6 +350,9 @@ imx_uart_bus_probe(struct uart_softc *sc)
if (error)
return (error);
sc->sc_rxfifosz = 1;
sc->sc_txfifosz = 1;
device_set_desc(sc->sc_dev, "imx_uart");
return (0);
}

View File

@ -278,9 +278,6 @@ uart_pl011_bus_attach(struct uart_softc *sc)
/* Clear RX & TX interrupts */
__uart_setreg(bas, UART_ICR, IMSC_MASK_ALL);
sc->sc_rxfifosz = 1;
sc->sc_txfifosz = 1;
return (0);
}
@ -377,6 +374,9 @@ uart_pl011_bus_probe(struct uart_softc *sc)
device_set_desc(sc->sc_dev, "PrimeCell UART (PL011)");
sc->sc_rxfifosz = 1;
sc->sc_txfifosz = 1;
return (0);
}

View File

@ -293,9 +293,6 @@ quicc_bus_attach(struct uart_softc *sc)
quicc_setup(bas, 9600, 8, 1, UART_PARITY_NONE);
}
sc->sc_rxfifosz = 1;
sc->sc_txfifosz = 1;
/* Enable interrupts on the receive buffer. */
rb = quicc_read2(bas, QUICC_PRAM_SCC_RBASE(bas->chan - 1));
st = quicc_read2(bas, rb);
@ -417,6 +414,9 @@ quicc_bus_probe(struct uart_softc *sc)
if (error)
return (error);
sc->sc_rxfifosz = 1;
sc->sc_txfifosz = 1;
snprintf(buf, sizeof(buf), "quicc, channel %d", sc->sc_bas.chan);
device_set_desc_copy(sc->sc_dev, buf);
return (0);

View File

@ -407,9 +407,6 @@ sab82532_bus_attach(struct uart_softc *sc)
if (sc->sc_sysdev == NULL)
sab82532_init(bas, 9600, 8, 1, UART_PARITY_NONE);
sc->sc_rxfifosz = 32;
sc->sc_txfifosz = 32;
imr0 = SAB_IMR0_TCD|SAB_IMR0_TIME|SAB_IMR0_CDSC|SAB_IMR0_RFO|
SAB_IMR0_RPF;
uart_setreg(bas, SAB_IMR0, 0xff & ~imr0);
@ -592,6 +589,9 @@ sab82532_bus_probe(struct uart_softc *sc)
if (error)
return (error);
sc->sc_rxfifosz = 32;
sc->sc_txfifosz = 32;
ch = sc->sc_bas.chan - 1 + 'A';
switch (uart_getreg(&sc->sc_bas, SAB_VSTR) & SAB_VSTR_VMASK) {

View File

@ -332,9 +332,6 @@ z8530_bus_attach(struct uart_softc *sc)
}
z8530->txidle = 1; /* Report SER_INT_TXIDLE. */
sc->sc_rxfifosz = 3;
sc->sc_txfifosz = 1;
(void)z8530_bus_getsig(sc);
uart_setmreg(bas, WR_IC, IC_BRK | IC_CTS | IC_DCD);
@ -515,6 +512,9 @@ z8530_bus_probe(struct uart_softc *sc)
if (error)
return (error);
sc->sc_rxfifosz = 3;
sc->sc_txfifosz = 1;
ch = sc->sc_bas.chan - 1 + 'A';
snprintf(buf, sizeof(buf), "z8530, channel %c", ch);

View File

@ -221,9 +221,6 @@ adm5120_uart_bus_attach(struct uart_softc *sc)
/* TODO: set parameters 115200, 8N1 */
}
sc->sc_rxfifosz = 16;
sc->sc_txfifosz = 16;
(void)adm5120_uart_bus_getsig(sc);
#if 1
@ -367,6 +364,9 @@ adm5120_uart_bus_probe(struct uart_softc *sc)
if (error)
return (error);
sc->sc_rxfifosz = 16;
sc->sc_txfifosz = 16;
ch = sc->sc_bas.chan + 'A';
snprintf(buf, sizeof(buf), "adm5120_uart, channel %c", ch);

View File

@ -272,9 +272,6 @@ rt305x_uart_bus_attach(struct uart_softc *sc)
rt305x_uart_init(bas, 115200, 8, 1, 0);
}
sc->sc_rxfifosz = 16;
sc->sc_txfifosz = 16;
(void)rt305x_uart_bus_getsig(sc);
/* Enable FIFO */
@ -438,6 +435,9 @@ rt305x_uart_bus_probe(struct uart_softc *sc)
if (error)
return (error);
sc->sc_rxfifosz = 16;
sc->sc_txfifosz = 16;
snprintf(buf, sizeof(buf), "rt305x_uart");
device_set_desc_copy(sc->sc_dev, buf);

View File

@ -835,13 +835,6 @@ sbbc_uart_bus_attach(struct uart_softc *sc)
bst = bas->bst;
bsh = bas->bsh;
sc->sc_rxfifosz = SBBC_SRAM_READ_4(sbbc_solcons +
SBBC_CONS_OFF(cons_in_end)) - SBBC_SRAM_READ_4(sbbc_solcons +
SBBC_CONS_OFF(cons_in_begin)) - 1;
sc->sc_txfifosz = SBBC_SRAM_READ_4(sbbc_solcons +
SBBC_CONS_OFF(cons_out_end)) - SBBC_SRAM_READ_4(sbbc_solcons +
SBBC_CONS_OFF(cons_out_begin)) - 1;
uart_lock(sc->sc_hwmtx);
/*
@ -995,11 +988,24 @@ sbbc_uart_bus_param(struct uart_softc *sc __unused, int baudrate __unused,
}
static int
sbbc_uart_bus_probe(struct uart_softc *sc __unused)
sbbc_uart_bus_probe(struct uart_softc *sc)
{
struct uart_bas *bas;
bus_space_tag_t bst;
bus_space_handle_t bsh;
if (sbbc_console != 0)
if (sbbc_console != 0) {
bas = &sc->sc_bas;
bst = bas->bst;
bsh = bas->bsh;
sc->sc_rxfifosz = SBBC_SRAM_READ_4(sbbc_solcons +
SBBC_CONS_OFF(cons_in_end)) - SBBC_SRAM_READ_4(sbbc_solcons +
SBBC_CONS_OFF(cons_in_begin)) - 1;
sc->sc_txfifosz = SBBC_SRAM_READ_4(sbbc_solcons +
SBBC_CONS_OFF(cons_out_end)) - SBBC_SRAM_READ_4(sbbc_solcons +
SBBC_CONS_OFF(cons_out_begin)) - 1;
return (0);
}
return (ENXIO);
}