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Relocate interrupt sense setting for K2 SATA from the ATA driver to the
OFW PCI layer and read the sense directly from the device tree instead of guessing. MFC after: 1 week
This commit is contained in:
parent
f751743351
commit
4dea0435b5
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=208162
@ -41,9 +41,6 @@ __FBSDID("$FreeBSD$");
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#include <sys/sema.h>
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#include <sys/taskqueue.h>
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#include <vm/uma.h>
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#ifdef __powerpc__
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#include <machine/intr_machdep.h>
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#endif
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#include <machine/stdarg.h>
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#include <machine/resource.h>
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#include <machine/bus.h>
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@ -220,10 +217,6 @@ ata_serverworks_ch_attach(device_t dev)
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ch->hw.tf_write = ata_serverworks_tf_write;
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#ifdef __powerpc__
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ch->hw.status = ata_serverworks_status;
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/* Make sure that our interrupt is edge triggered */
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powerpc_config_intr(bus_get_resource_start(device_get_parent(dev),
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SYS_RES_IRQ, 0), INTR_TRIGGER_EDGE, INTR_POLARITY_HIGH);
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#endif
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if (ctlr->chip->chipid == ATA_K2) {
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@ -43,6 +43,7 @@ __FBSDID("$FreeBSD$");
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#include <dev/ofw/openfirm.h>
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#include <machine/bus.h>
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#include <machine/intr_machdep.h>
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#include <machine/resource.h>
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#include <dev/pci/pcireg.h>
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@ -192,20 +193,36 @@ ofw_pcibus_enum_devtree(device_t dev, u_int domain, u_int busno)
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pci_add_child(dev, (struct pci_devinfo *)dinfo);
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/*
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* Some devices don't have an intpin set, but do have
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* interrupts. These are fully specified, and set in the
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* Some devices don't have an intpin set, but do have
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* interrupts. These are fully specified, and set in the
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* interrupts property, so add that value to the device's
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* resource list.
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*/
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if (dinfo->opd_dinfo.cfg.intpin == 0) {
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ofw_pci_intr_t intr;
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*/
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if (dinfo->opd_dinfo.cfg.intpin == 0) {
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ofw_pci_intr_t intr[2];
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phandle_t iparent;
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int icells;
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if (OF_getprop(child, "interrupts", &intr,
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sizeof(intr)) > 0) {
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resource_list_add(&dinfo->opd_dinfo.resources,
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SYS_RES_IRQ, 0, intr, intr, 1);
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iparent = 0;
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icells = 1;
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OF_getprop(child, "interrupt-parent", &iparent,
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sizeof(iparent));
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OF_getprop(iparent, "#interrupt-cells", &icells,
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sizeof(icells));
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if (iparent != 0 && icells > 1) {
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powerpc_config_intr(intr[0],
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(intr[1] & 1) ? INTR_TRIGGER_LEVEL :
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INTR_TRIGGER_EDGE,
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INTR_POLARITY_HIGH);
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}
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resource_list_add(&dinfo->opd_dinfo.resources,
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SYS_RES_IRQ, 0, intr[0], intr[0], 1);
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}
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}
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}
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}
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}
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