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- Allow fxp_encap() enqueue failed transmissions and set
IFF_DRV_OACTIVE to note resource shortage to upper stack. - Don't count number of mbuf chains. Default 32 DMA segments for a frame is enough for most cases. If bus_dmamap_mbuf_sg fails use m_collapse(9) to collapse the mbuf chain instead of relying on expensive m_defrag(9). - Move bpf handling to fxp_start_body() which is supposed to be more appropriate place. - Always arm watchdog timer whenever a new Tx request is made. Previously fxp(4) used to arm watchdog timer only when FXP_CXINT_THRESH-th Tx request is made. Because fxp(4) does not rely on Tx interrupt to reclaim transmitted mbufs it's better to arm watchdog timer to detect potential lockups. - Add more aggresive Tx buffer reclaiming in fxp_start_body to make room for new Tx requests. Since fxp(4) does not request Tx completion interrupt for every frames it's necessary to clean TXCBs in advance to saturate link. - Make fxp(4) try to start more packets transmitting regardless of interrupt type in fxp_intr_body.
This commit is contained in:
Pyun YongHyeon
parent
16385727ce
commit
4e53f83744
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=185285
@ -220,7 +220,8 @@ static void fxp_init_body(struct fxp_softc *sc);
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static void fxp_tick(void *xsc);
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static void fxp_start(struct ifnet *ifp);
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static void fxp_start_body(struct ifnet *ifp);
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static int fxp_encap(struct fxp_softc *sc, struct mbuf *m_head);
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static int fxp_encap(struct fxp_softc *sc, struct mbuf **m_head);
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static void fxp_txeof(struct fxp_softc *sc);
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static void fxp_stop(struct fxp_softc *sc);
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static void fxp_release(struct fxp_softc *sc);
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static int fxp_ioctl(struct ifnet *ifp, u_long command,
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@ -1190,7 +1191,7 @@ fxp_start_body(struct ifnet *ifp)
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{
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struct fxp_softc *sc = ifp->if_softc;
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struct mbuf *mb_head;
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int error, txqueued;
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int txqueued;
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FXP_LOCK_ASSERT(sc, MA_OWNED);
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@ -1202,6 +1203,8 @@ fxp_start_body(struct ifnet *ifp)
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if (sc->need_mcsetup)
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return;
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if (sc->tx_queued > FXP_NTXCB_HIWAT)
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fxp_txeof(sc);
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/*
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* We're finished if there is nothing more to add to the list or if
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* we're all filled up with buffers to transmit.
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@ -1219,32 +1222,44 @@ fxp_start_body(struct ifnet *ifp)
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if (mb_head == NULL)
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break;
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error = fxp_encap(sc, mb_head);
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if (error)
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if (fxp_encap(sc, &mb_head)) {
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if (mb_head == NULL)
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break;
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txqueued = 1;
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IFQ_DRV_PREPEND(&ifp->if_snd, mb_head);
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ifp->if_drv_flags |= IFF_DRV_OACTIVE;
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}
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txqueued++;
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/*
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* Pass packet to bpf if there is a listener.
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*/
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BPF_MTAP(ifp, mb_head);
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}
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bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_PREWRITE);
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/*
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* We're finished. If we added to the list, issue a RESUME to get DMA
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* going again if suspended.
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*/
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if (txqueued) {
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if (txqueued > 0) {
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bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_PREWRITE);
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fxp_scb_wait(sc);
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fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_RESUME);
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/*
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* Set a 5 second timer just in case we don't hear
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* from the card again.
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*/
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sc->watchdog_timer = 5;
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}
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}
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static int
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fxp_encap(struct fxp_softc *sc, struct mbuf *m_head)
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fxp_encap(struct fxp_softc *sc, struct mbuf **m_head)
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{
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struct ifnet *ifp;
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struct mbuf *m;
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struct fxp_tx *txp;
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struct fxp_cb_tx *cbp;
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bus_dma_segment_t segs[FXP_NTXSEG];
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int chainlen, error, i, nseg;
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int error, i, nseg;
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FXP_LOCK_ASSERT(sc, MA_OWNED);
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ifp = sc->ifp;
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@ -1271,6 +1286,7 @@ fxp_encap(struct fxp_softc *sc, struct mbuf *m_head)
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txp->tx_cb->ipcb_ip_activation_high =
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FXP_IPCB_HARDWAREPARSING_ENABLE;
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m = *m_head;
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/*
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* Deal with TCP/IP checksum offload. Note that
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* in order for TCP checksum offload to work,
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@ -1279,11 +1295,11 @@ fxp_encap(struct fxp_softc *sc, struct mbuf *m_head)
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* in the TCP header. The stack should have
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* already done this for us.
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*/
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if (m_head->m_pkthdr.csum_flags) {
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if (m_head->m_pkthdr.csum_flags & CSUM_DELAY_DATA) {
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if (m->m_pkthdr.csum_flags) {
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if (m->m_pkthdr.csum_flags & CSUM_DELAY_DATA) {
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txp->tx_cb->ipcb_ip_schedule =
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FXP_IPCB_TCPUDP_CHECKSUM_ENABLE;
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if (m_head->m_pkthdr.csum_flags & CSUM_TCP)
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if (m->m_pkthdr.csum_flags & CSUM_TCP)
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txp->tx_cb->ipcb_ip_schedule |=
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FXP_IPCB_TCP_PACKET;
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}
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@ -1311,13 +1327,13 @@ fxp_encap(struct fxp_softc *sc, struct mbuf *m_head)
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* the header sizes/offsets vary.
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*/
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if (m_head->m_pkthdr.csum_flags & CSUM_IP) {
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if (m_head->m_pkthdr.len < 38) {
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if (m->m_pkthdr.csum_flags & CSUM_IP) {
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if (m->m_pkthdr.len < 38) {
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struct ip *ip;
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m_head->m_data += ETHER_HDR_LEN;
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ip = mtod(m_head, struct ip *);
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ip->ip_sum = in_cksum(m_head, ip->ip_hl << 2);
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m_head->m_data -= ETHER_HDR_LEN;
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m->m_data += ETHER_HDR_LEN;
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ip = mtod(m, struct ip *);
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ip->ip_sum = in_cksum(m, ip->ip_hl << 2);
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m->m_data -= ETHER_HDR_LEN;
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} else {
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txp->tx_cb->ipcb_ip_activation_high =
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FXP_IPCB_HARDWAREPARSING_ENABLE;
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@ -1328,40 +1344,33 @@ fxp_encap(struct fxp_softc *sc, struct mbuf *m_head)
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#endif
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}
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chainlen = 0;
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for (m = m_head; m != NULL && chainlen <= sc->maxtxseg; m = m->m_next)
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chainlen++;
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if (chainlen > sc->maxtxseg) {
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struct mbuf *mn;
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/*
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* We ran out of segments. We have to recopy this
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* mbuf chain first. Bail out if we can't get the
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* new buffers.
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*/
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mn = m_defrag(m_head, M_DONTWAIT);
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if (mn == NULL) {
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m_freem(m_head);
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return (-1);
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} else {
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m_head = mn;
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error = bus_dmamap_load_mbuf_sg(sc->fxp_mtag, txp->tx_map, *m_head,
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segs, &nseg, 0);
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if (error == EFBIG) {
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m = m_collapse(*m_head, M_DONTWAIT, sc->maxtxseg);
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if (m == NULL) {
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m_freem(*m_head);
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*m_head = NULL;
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return (ENOMEM);
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}
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}
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/*
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* Go through each of the mbufs in the chain and initialize
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* the transmit buffer descriptors with the physical address
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* and size of the mbuf.
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*/
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*m_head = m;
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error = bus_dmamap_load_mbuf_sg(sc->fxp_mtag, txp->tx_map,
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m_head, segs, &nseg, 0);
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if (error) {
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device_printf(sc->dev, "can't map mbuf (error %d)\n", error);
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m_freem(m_head);
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return (-1);
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*m_head, segs, &nseg, 0);
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if (error != 0) {
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m_freem(*m_head);
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*m_head = NULL;
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return (ENOMEM);
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}
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} else if (error != 0)
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return (error);
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if (nseg == 0) {
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m_freem(*m_head);
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*m_head = NULL;
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return (EIO);
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}
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KASSERT(nseg <= sc->maxtxseg, ("too many DMA segments"));
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bus_dmamap_sync(sc->fxp_mtag, txp->tx_map, BUS_DMASYNC_PREWRITE);
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cbp = txp->tx_cb;
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for (i = 0; i < nseg; i++) {
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@ -1389,24 +1398,17 @@ fxp_encap(struct fxp_softc *sc, struct mbuf *m_head)
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}
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cbp->tbd_number = nseg;
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bus_dmamap_sync(sc->fxp_mtag, txp->tx_map, BUS_DMASYNC_PREWRITE);
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txp->tx_mbuf = m_head;
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txp->tx_mbuf = m;
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txp->tx_cb->cb_status = 0;
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txp->tx_cb->byte_count = 0;
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if (sc->tx_queued != FXP_CXINT_THRESH - 1) {
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if (sc->tx_queued != FXP_CXINT_THRESH - 1)
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txp->tx_cb->cb_command =
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htole16(sc->tx_cmd | FXP_CB_COMMAND_SF |
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FXP_CB_COMMAND_S);
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} else {
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else
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txp->tx_cb->cb_command =
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htole16(sc->tx_cmd | FXP_CB_COMMAND_SF |
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FXP_CB_COMMAND_S | FXP_CB_COMMAND_I);
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/*
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* Set a 5 second timer just in case we don't hear
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* from the card again.
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*/
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sc->watchdog_timer = 5;
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}
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txp->tx_cb->tx_threshold = tx_threshold;
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/*
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@ -1439,10 +1441,6 @@ fxp_encap(struct fxp_softc *sc, struct mbuf *m_head)
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sc->tx_queued++;
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/*
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* Pass packet to bpf if there is a listener.
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*/
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BPF_MTAP(ifp, m_head);
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return (0);
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}
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@ -1528,8 +1526,10 @@ fxp_intr(void *xsc)
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static void
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fxp_txeof(struct fxp_softc *sc)
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{
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struct ifnet *ifp;
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struct fxp_tx *txp;
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ifp = sc->ifp;
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bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_PREREAD);
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for (txp = sc->fxp_desc.tx_first; sc->tx_queued &&
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(le16toh(txp->tx_cb->cb_status) & FXP_CB_STATUS_C) != 0;
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@ -1544,6 +1544,7 @@ fxp_txeof(struct fxp_softc *sc)
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txp->tx_cb->tbd[0].tb_addr = 0;
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}
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sc->tx_queued--;
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ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
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}
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sc->fxp_desc.tx_first = txp;
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bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_PREWRITE);
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@ -1589,7 +1590,7 @@ fxp_intr_body(struct fxp_softc *sc, struct ifnet *ifp, uint8_t statack,
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* packets go out onto the wire for about 5 to 10 seconds
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* after the interface is ifconfig'ed for the first time.
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*/
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if (statack & (FXP_SCB_STATACK_CXTNO | FXP_SCB_STATACK_CNA)) {
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if (statack & (FXP_SCB_STATACK_CXTNO | FXP_SCB_STATACK_CNA))
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fxp_txeof(sc);
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/*
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@ -1597,7 +1598,6 @@ fxp_intr_body(struct fxp_softc *sc, struct ifnet *ifp, uint8_t statack,
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*/
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if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
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fxp_start_body(ifp);
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}
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/*
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* Just return if nothing happened on the receive side.
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@ -38,6 +38,7 @@
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* This must be a power of two.
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*/
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#define FXP_NTXCB 128
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#define FXP_NTXCB_HIWAT ((FXP_NTXCB * 7) / 10)
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/*
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* Size of the TxCB list.
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