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Fix some outstanding bugs in the DCD modem control..
Implement the slip/ppp "hotchar" detection to improve latency Debug the L_RINT bypass code.. Fix an interesting feature that caused 8-bit chars to loose their top bit in some circumstances.. This finishes the remaining outstanding problems that I'm aware of, with the exception of efficiency... Optimizing can come later after it's fully debugged.
This commit is contained in:
Peter Wemm
parent
d3497bc8de
commit
5275513295
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=10161
208
sys/dev/si/si.c
208
sys/dev/si/si.c
@ -30,7 +30,7 @@
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHORS BE LIABLE.
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*
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* $Id: si.c,v 1.3 1995/08/13 15:18:05 peter Exp $
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* $Id: si.c,v 1.4 1995/08/13 15:44:37 peter Exp $
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*/
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#ifndef lint
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@ -86,7 +86,6 @@ enum si_mctl { GET, SET, BIS, BIC };
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static void si_command __P((struct si_port *, int, int));
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static int si_modem __P((struct si_port *, enum si_mctl, int));
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static void si_write_enable __P((struct si_port *, int));
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static int si_drainwait __P((struct si_port *, char *));
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static int si_Sioctl __P((dev_t, int, caddr_t, int, struct proc *));
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static void si_start __P((struct tty *));
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static void si_lstart __P((struct si_port *));
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@ -1347,6 +1346,7 @@ siparam(tp, t)
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int error = 0; /* shutup gcc */
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int ispeed = 0; /* shutup gcc */
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int ospeed = 0; /* shutup gcc */
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BYTE val;
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DPRINT((pp, DBG_ENTRY|DBG_PARAM, "siparam(%x,%x)\n", tp, t));
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cflag = t->c_cflag;
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@ -1373,91 +1373,120 @@ siparam(tp, t)
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oldspl = spltty();
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ccbp = pp->sp_ccb;
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if (iflag & IGNBRK) /* Breaks */
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ccbp->hi_break = BR_IGN;
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else
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ccbp->hi_break = 0;
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if (iflag & BRKINT) /* Interrupt on break? */
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ccbp->hi_break |= BR_INT;
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if (iflag & PARMRK) /* Parity mark? */
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ccbp->hi_break |= BR_PARMRK;
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if (iflag & IGNPAR) /* Ignore chars with parity errors? */
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ccbp->hi_break |= BR_PARIGN;
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/* ========== set hi_break ========== */
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val = 0;
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if (iflag & IGNBRK) /* Breaks */
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val |= BR_IGN;
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if (iflag & BRKINT) /* Interrupt on break? */
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val |= BR_INT;
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if (iflag & PARMRK) /* Parity mark? */
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val |= BR_PARMRK;
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if (iflag & IGNPAR) /* Ignore chars with parity errors? */
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val |= BR_PARIGN;
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ccbp->hi_break = val;
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/* ========== set hi_csr ========== */
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/* if not hung up.. */
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if (t->c_ospeed != 0) {
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/* Set I/O speeds */
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ccbp->hi_csr = (ispeed << 4) | ospeed;
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val = (ispeed << 4) | ospeed;
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}
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ccbp->hi_csr = val;
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/* ========== set hi_mr2 ========== */
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val = 0;
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if (cflag & CSTOPB) /* Stop bits */
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ccbp->hi_mr2 = MR2_2_STOP;
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val |= MR2_2_STOP;
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else
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ccbp->hi_mr2 = MR2_1_STOP;
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val |= MR2_1_STOP;
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/*
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* Enable H/W RTS/CTS handshaking. The default TA/MTA is
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* a DCE, hence the reverse sense of RTS and CTS
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*/
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/* Output Flow - RTS must be raised before data can be sent */
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if (cflag & CCTS_OFLOW)
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val |= MR2_RTSCONT;
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ccbp->hi_mr1 = val;
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/* ========== set hi_mr1 ========== */
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val = 0;
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if (!(cflag & PARENB)) /* Parity */
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ccbp->hi_mr1 = MR1_NONE;
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val |= MR1_NONE;
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else
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ccbp->hi_mr1 = MR1_WITH;
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val |= MR1_WITH;
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if (cflag & PARODD)
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ccbp->hi_mr1 |= MR1_ODD;
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val |= MR1_ODD;
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if ((cflag & CS8) == CS8) { /* 8 data bits? */
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ccbp->hi_mr1 |= MR1_8_BITS;
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ccbp->hi_mask = 0xFF;
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val |= MR1_8_BITS;
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} else if ((cflag & CS7) == CS7) { /* 7 data bits? */
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ccbp->hi_mr1 |= MR1_7_BITS;
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ccbp->hi_mask = 0x7F;
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val |= MR1_7_BITS;
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} else if ((cflag & CS6) == CS6) { /* 6 data bits? */
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ccbp->hi_mr1 |= MR1_6_BITS;
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ccbp->hi_mask = 0x3F;
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val |= MR1_6_BITS;
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} else { /* Must be 5 */
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ccbp->hi_mr1 |= MR1_5_BITS;
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ccbp->hi_mask = 0x1F;
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val |= MR1_5_BITS;
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}
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/*
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* Enable H/W RTS/CTS handshaking. The default TA/MTA is
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* a DCE, hence the reverse sense of RTS and CTS
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*/
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/* Input Flow - CTS is raised when port is ready to receive data */
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if (cflag & CRTS_IFLOW)
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val |= MR1_CTSCONT;
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ccbp->hi_mr1 = val;
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/* ========== set hi_mask ========== */
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val = 0xff;
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if ((cflag & CS8) == CS8) { /* 8 data bits? */
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val &= 0xFF;
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} else if ((cflag & CS7) == CS7) { /* 7 data bits? */
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val &= 0x7F;
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} else if ((cflag & CS6) == CS6) { /* 6 data bits? */
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val &= 0x3F;
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} else { /* Must be 5 */
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val &= 0x1F;
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}
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if (iflag & ISTRIP)
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ccbp->hi_mask &= 0x7F;
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val &= 0x7F;
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ccbp->hi_mask = val;
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/* ========== set hi_prtcl ========== */
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val = 0;
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/* Monitor DCD etc. if a modem */
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if (!(cflag & CLOCAL))
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ccbp->hi_prtcl = SP_DCEN;
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else
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ccbp->hi_prtcl = 0;
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val |= SP_DCEN;
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if (iflag & IXANY)
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val |= SP_TANY;
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if (iflag & IXON)
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val |= SP_TXEN;
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if (iflag & IXOFF)
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val |= SP_RXEN;
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if (iflag & INPCK)
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val |= SP_PAEN;
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/* XXX: the card handles all the flow control... */
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ccbp->hi_prtcl = val;
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/* ========== set hi_{rx|tx}{on|off} ========== */
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/* XXX: the card TOTALLY shields us from the flow control... */
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ccbp->hi_txon = t->c_cc[VSTART];
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ccbp->hi_txoff = t->c_cc[VSTOP];
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ccbp->hi_rxon = t->c_cc[VSTART];
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ccbp->hi_rxoff = t->c_cc[VSTOP];
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if (iflag & IXANY)
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ccbp->hi_prtcl |= SP_TANY;
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if (iflag & IXON)
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ccbp->hi_prtcl |= SP_TXEN;
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if (iflag & IXOFF)
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ccbp->hi_prtcl |= SP_RXEN;
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if (iflag & INPCK)
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ccbp->hi_prtcl |= SP_PAEN;
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/*
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* Enable H/W RTS/CTS handshaking. The default TA/MTA is
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* a DCE, hence the reverse sense of RTS and CTS
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*/
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/* Output - RTS must be raised before data can be sent */
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if (cflag & CCTS_OFLOW)
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ccbp->hi_mr2 |= MR2_RTSCONT;
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/* Input - CTS is raised when port is ready to receive data */
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if (cflag & CRTS_IFLOW)
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ccbp->hi_mr1 |= MR1_CTSCONT;
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/* ========== send settings to the card ========== */
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/* potential sleep here */
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if (ccbp->hi_stat == IDLE_CLOSE) /* Not yet open */
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si_command(pp, LOPEN, SI_WAIT); /* open it */
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else
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si_command(pp, CONFIG, SI_WAIT); /* change params */
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/* ========== set DTR etc ========== */
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/* Hangup if ospeed == 0 */
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if (t->c_ospeed == 0) {
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(void) si_modem(pp, BIC, TIOCM_DTR|TIOCM_RTS);
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@ -1477,65 +1506,6 @@ siparam(tp, t)
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return(error);
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}
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/*
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* Wait for buffered TX characters to drain away.
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* IT IS THE RESPONSIBILITY OF THE CALLER TO DISABLE/ENABLE WRITES.
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*/
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static int
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si_drainwait(pp, msg)
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register struct si_port *pp;
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char *msg;
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{
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register struct tty *tp = pp->sp_tty;
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volatile struct si_channel *ccbp = pp->sp_ccb;
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int error, oldspl, time;
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BYTE x;
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DPRINT((pp, DBG_ENTRY|DBG_DRAIN, "si_drainwait(%x,%s)\n",
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pp, msg));
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error = 0;
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oldspl = spltty();
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/* number of pending characters in output buffer */
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x = (int)ccbp->hi_txipos - (int)ccbp->hi_txopos;
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while ( (x != 0 && (tp->t_state & TS_BUSY))
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|| (ccbp->hi_stat == IDLE_BREAK)) {
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DPRINT((pp, DBG_DRAIN,
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" x %d. t_state %x sp_state %x hi_stat %x\n",
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x, tp->t_state, pp->sp_state, ccbp->hi_stat));
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/* else waiting got chars */
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/* guess how long */
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time = ttspeedtab(tp->t_ospeed, chartimes);
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if (time == 0 || time > x)
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time = 1;
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else
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time = x/time + 1;
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error = ttysleep(tp, (caddr_t)pp,
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TTOPRI|PCATCH, msg, time);
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if (error != EWOULDBLOCK) {
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DPRINT((pp, DBG_DRAIN|DBG_FAIL,
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"%s, wait for drain broken by signal %d\n",
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msg, error));
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break;
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}
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error = 0;
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/* reload count */
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x = (int)ccbp->hi_txipos - (int)ccbp->hi_txopos;
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}
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tp->t_state &= ~TS_BUSY;
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ttwwakeup(tp);
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splx(oldspl);
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return(error);
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}
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/*
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* Enable or Disable the writes to this channel...
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* "state" -> enabled = 1; disabled = 0;
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@ -1688,7 +1658,7 @@ si_poll(void *nothing)
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* it is called.
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*/
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static char rxbuf[SLXOS_BUFFERSIZE]; /* input staging area */
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static BYTE rxbuf[SLXOS_BUFFERSIZE]; /* input staging area */
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int
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siintr(int bdnum)
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@ -1701,7 +1671,7 @@ siintr(int bdnum)
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register struct tty *tp;
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volatile caddr_t maddr;
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BYTE op, ip, cc;
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int x, card, port, n;
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int x, card, port, n, i;
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volatile BYTE *z;
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BYTE c;
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static int in_poll = 0;
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@ -1889,8 +1859,11 @@ siintr(int bdnum)
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}
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} else {
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for(x = 0; x < n; x++) {
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(*linesw[tp->t_line].l_rint)(
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rxbuf[x], tp);
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i = rxbuf[x];
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(*linesw[tp->t_line].l_rint)(rxbuf[x], tp);
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if (pp->sp_hotchar && i == pp->sp_hotchar) {
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setsofttty();
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}
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}
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}
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@ -2187,6 +2160,7 @@ si_disc_optim(tp, t, pp)
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tp->t_state |= TS_CAN_BYPASS_L_RINT;
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else
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tp->t_state &= ~TS_CAN_BYPASS_L_RINT;
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/*
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* Prepare to reduce input latency for packet
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* discplines with a end of packet character.
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@ -2197,6 +2171,10 @@ si_disc_optim(tp, t, pp)
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pp->sp_hotchar = 0x7e;
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else
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pp->sp_hotchar = 0;
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DPRINT((pp, DBG_OPTIM, "bypass: %s, hotchar: %x\n",
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(tp->t_state & TS_CAN_BYPASS_L_RINT) ? "on" : "off",
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pp->sp_hotchar));
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}
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@ -30,7 +30,7 @@
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHORS BE LIABLE.
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*
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* $Id: si.c,v 1.3 1995/08/13 15:18:05 peter Exp $
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* $Id: si.c,v 1.4 1995/08/13 15:44:37 peter Exp $
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*/
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#ifndef lint
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@ -86,7 +86,6 @@ enum si_mctl { GET, SET, BIS, BIC };
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static void si_command __P((struct si_port *, int, int));
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static int si_modem __P((struct si_port *, enum si_mctl, int));
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static void si_write_enable __P((struct si_port *, int));
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static int si_drainwait __P((struct si_port *, char *));
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static int si_Sioctl __P((dev_t, int, caddr_t, int, struct proc *));
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static void si_start __P((struct tty *));
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static void si_lstart __P((struct si_port *));
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@ -1347,6 +1346,7 @@ siparam(tp, t)
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int error = 0; /* shutup gcc */
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int ispeed = 0; /* shutup gcc */
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int ospeed = 0; /* shutup gcc */
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BYTE val;
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DPRINT((pp, DBG_ENTRY|DBG_PARAM, "siparam(%x,%x)\n", tp, t));
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cflag = t->c_cflag;
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@ -1373,91 +1373,120 @@ siparam(tp, t)
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oldspl = spltty();
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ccbp = pp->sp_ccb;
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if (iflag & IGNBRK) /* Breaks */
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ccbp->hi_break = BR_IGN;
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else
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ccbp->hi_break = 0;
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if (iflag & BRKINT) /* Interrupt on break? */
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ccbp->hi_break |= BR_INT;
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if (iflag & PARMRK) /* Parity mark? */
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ccbp->hi_break |= BR_PARMRK;
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if (iflag & IGNPAR) /* Ignore chars with parity errors? */
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ccbp->hi_break |= BR_PARIGN;
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/* ========== set hi_break ========== */
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val = 0;
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if (iflag & IGNBRK) /* Breaks */
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val |= BR_IGN;
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if (iflag & BRKINT) /* Interrupt on break? */
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val |= BR_INT;
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if (iflag & PARMRK) /* Parity mark? */
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val |= BR_PARMRK;
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if (iflag & IGNPAR) /* Ignore chars with parity errors? */
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val |= BR_PARIGN;
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ccbp->hi_break = val;
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/* ========== set hi_csr ========== */
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/* if not hung up.. */
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if (t->c_ospeed != 0) {
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/* Set I/O speeds */
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ccbp->hi_csr = (ispeed << 4) | ospeed;
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val = (ispeed << 4) | ospeed;
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}
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ccbp->hi_csr = val;
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/* ========== set hi_mr2 ========== */
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val = 0;
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if (cflag & CSTOPB) /* Stop bits */
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ccbp->hi_mr2 = MR2_2_STOP;
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val |= MR2_2_STOP;
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else
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ccbp->hi_mr2 = MR2_1_STOP;
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val |= MR2_1_STOP;
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/*
|
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* Enable H/W RTS/CTS handshaking. The default TA/MTA is
|
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* a DCE, hence the reverse sense of RTS and CTS
|
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*/
|
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/* Output Flow - RTS must be raised before data can be sent */
|
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if (cflag & CCTS_OFLOW)
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val |= MR2_RTSCONT;
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ccbp->hi_mr1 = val;
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/* ========== set hi_mr1 ========== */
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val = 0;
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if (!(cflag & PARENB)) /* Parity */
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ccbp->hi_mr1 = MR1_NONE;
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val |= MR1_NONE;
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else
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ccbp->hi_mr1 = MR1_WITH;
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val |= MR1_WITH;
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if (cflag & PARODD)
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ccbp->hi_mr1 |= MR1_ODD;
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val |= MR1_ODD;
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if ((cflag & CS8) == CS8) { /* 8 data bits? */
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ccbp->hi_mr1 |= MR1_8_BITS;
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ccbp->hi_mask = 0xFF;
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val |= MR1_8_BITS;
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} else if ((cflag & CS7) == CS7) { /* 7 data bits? */
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ccbp->hi_mr1 |= MR1_7_BITS;
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ccbp->hi_mask = 0x7F;
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val |= MR1_7_BITS;
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} else if ((cflag & CS6) == CS6) { /* 6 data bits? */
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ccbp->hi_mr1 |= MR1_6_BITS;
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ccbp->hi_mask = 0x3F;
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val |= MR1_6_BITS;
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} else { /* Must be 5 */
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ccbp->hi_mr1 |= MR1_5_BITS;
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ccbp->hi_mask = 0x1F;
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val |= MR1_5_BITS;
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}
|
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/*
|
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* Enable H/W RTS/CTS handshaking. The default TA/MTA is
|
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* a DCE, hence the reverse sense of RTS and CTS
|
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*/
|
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/* Input Flow - CTS is raised when port is ready to receive data */
|
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if (cflag & CRTS_IFLOW)
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val |= MR1_CTSCONT;
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ccbp->hi_mr1 = val;
|
||||
|
||||
/* ========== set hi_mask ========== */
|
||||
val = 0xff;
|
||||
if ((cflag & CS8) == CS8) { /* 8 data bits? */
|
||||
val &= 0xFF;
|
||||
} else if ((cflag & CS7) == CS7) { /* 7 data bits? */
|
||||
val &= 0x7F;
|
||||
} else if ((cflag & CS6) == CS6) { /* 6 data bits? */
|
||||
val &= 0x3F;
|
||||
} else { /* Must be 5 */
|
||||
val &= 0x1F;
|
||||
}
|
||||
if (iflag & ISTRIP)
|
||||
ccbp->hi_mask &= 0x7F;
|
||||
val &= 0x7F;
|
||||
|
||||
ccbp->hi_mask = val;
|
||||
|
||||
/* ========== set hi_prtcl ========== */
|
||||
val = 0;
|
||||
/* Monitor DCD etc. if a modem */
|
||||
if (!(cflag & CLOCAL))
|
||||
ccbp->hi_prtcl = SP_DCEN;
|
||||
else
|
||||
ccbp->hi_prtcl = 0;
|
||||
val |= SP_DCEN;
|
||||
if (iflag & IXANY)
|
||||
val |= SP_TANY;
|
||||
if (iflag & IXON)
|
||||
val |= SP_TXEN;
|
||||
if (iflag & IXOFF)
|
||||
val |= SP_RXEN;
|
||||
if (iflag & INPCK)
|
||||
val |= SP_PAEN;
|
||||
|
||||
/* XXX: the card handles all the flow control... */
|
||||
ccbp->hi_prtcl = val;
|
||||
|
||||
|
||||
/* ========== set hi_{rx|tx}{on|off} ========== */
|
||||
/* XXX: the card TOTALLY shields us from the flow control... */
|
||||
ccbp->hi_txon = t->c_cc[VSTART];
|
||||
ccbp->hi_txoff = t->c_cc[VSTOP];
|
||||
|
||||
ccbp->hi_rxon = t->c_cc[VSTART];
|
||||
ccbp->hi_rxoff = t->c_cc[VSTOP];
|
||||
|
||||
if (iflag & IXANY)
|
||||
ccbp->hi_prtcl |= SP_TANY;
|
||||
if (iflag & IXON)
|
||||
ccbp->hi_prtcl |= SP_TXEN;
|
||||
if (iflag & IXOFF)
|
||||
ccbp->hi_prtcl |= SP_RXEN;
|
||||
if (iflag & INPCK)
|
||||
ccbp->hi_prtcl |= SP_PAEN;
|
||||
|
||||
/*
|
||||
* Enable H/W RTS/CTS handshaking. The default TA/MTA is
|
||||
* a DCE, hence the reverse sense of RTS and CTS
|
||||
*/
|
||||
|
||||
/* Output - RTS must be raised before data can be sent */
|
||||
if (cflag & CCTS_OFLOW)
|
||||
ccbp->hi_mr2 |= MR2_RTSCONT;
|
||||
/* Input - CTS is raised when port is ready to receive data */
|
||||
if (cflag & CRTS_IFLOW)
|
||||
ccbp->hi_mr1 |= MR1_CTSCONT;
|
||||
|
||||
/* ========== send settings to the card ========== */
|
||||
/* potential sleep here */
|
||||
if (ccbp->hi_stat == IDLE_CLOSE) /* Not yet open */
|
||||
si_command(pp, LOPEN, SI_WAIT); /* open it */
|
||||
else
|
||||
si_command(pp, CONFIG, SI_WAIT); /* change params */
|
||||
|
||||
/* ========== set DTR etc ========== */
|
||||
/* Hangup if ospeed == 0 */
|
||||
if (t->c_ospeed == 0) {
|
||||
(void) si_modem(pp, BIC, TIOCM_DTR|TIOCM_RTS);
|
||||
@ -1477,65 +1506,6 @@ siparam(tp, t)
|
||||
return(error);
|
||||
}
|
||||
|
||||
/*
|
||||
* Wait for buffered TX characters to drain away.
|
||||
* IT IS THE RESPONSIBILITY OF THE CALLER TO DISABLE/ENABLE WRITES.
|
||||
*/
|
||||
static int
|
||||
si_drainwait(pp, msg)
|
||||
register struct si_port *pp;
|
||||
char *msg;
|
||||
{
|
||||
register struct tty *tp = pp->sp_tty;
|
||||
volatile struct si_channel *ccbp = pp->sp_ccb;
|
||||
int error, oldspl, time;
|
||||
BYTE x;
|
||||
|
||||
DPRINT((pp, DBG_ENTRY|DBG_DRAIN, "si_drainwait(%x,%s)\n",
|
||||
pp, msg));
|
||||
error = 0;
|
||||
|
||||
oldspl = spltty();
|
||||
|
||||
/* number of pending characters in output buffer */
|
||||
x = (int)ccbp->hi_txipos - (int)ccbp->hi_txopos;
|
||||
|
||||
while ( (x != 0 && (tp->t_state & TS_BUSY))
|
||||
|| (ccbp->hi_stat == IDLE_BREAK)) {
|
||||
|
||||
DPRINT((pp, DBG_DRAIN,
|
||||
" x %d. t_state %x sp_state %x hi_stat %x\n",
|
||||
x, tp->t_state, pp->sp_state, ccbp->hi_stat));
|
||||
|
||||
/* else waiting got chars */
|
||||
/* guess how long */
|
||||
time = ttspeedtab(tp->t_ospeed, chartimes);
|
||||
|
||||
if (time == 0 || time > x)
|
||||
time = 1;
|
||||
else
|
||||
time = x/time + 1;
|
||||
|
||||
error = ttysleep(tp, (caddr_t)pp,
|
||||
TTOPRI|PCATCH, msg, time);
|
||||
|
||||
if (error != EWOULDBLOCK) {
|
||||
DPRINT((pp, DBG_DRAIN|DBG_FAIL,
|
||||
"%s, wait for drain broken by signal %d\n",
|
||||
msg, error));
|
||||
break;
|
||||
}
|
||||
error = 0;
|
||||
|
||||
/* reload count */
|
||||
x = (int)ccbp->hi_txipos - (int)ccbp->hi_txopos;
|
||||
}
|
||||
tp->t_state &= ~TS_BUSY;
|
||||
ttwwakeup(tp);
|
||||
splx(oldspl);
|
||||
return(error);
|
||||
}
|
||||
|
||||
/*
|
||||
* Enable or Disable the writes to this channel...
|
||||
* "state" -> enabled = 1; disabled = 0;
|
||||
@ -1688,7 +1658,7 @@ si_poll(void *nothing)
|
||||
* it is called.
|
||||
*/
|
||||
|
||||
static char rxbuf[SLXOS_BUFFERSIZE]; /* input staging area */
|
||||
static BYTE rxbuf[SLXOS_BUFFERSIZE]; /* input staging area */
|
||||
|
||||
int
|
||||
siintr(int bdnum)
|
||||
@ -1701,7 +1671,7 @@ siintr(int bdnum)
|
||||
register struct tty *tp;
|
||||
volatile caddr_t maddr;
|
||||
BYTE op, ip, cc;
|
||||
int x, card, port, n;
|
||||
int x, card, port, n, i;
|
||||
volatile BYTE *z;
|
||||
BYTE c;
|
||||
static int in_poll = 0;
|
||||
@ -1889,8 +1859,11 @@ siintr(int bdnum)
|
||||
}
|
||||
} else {
|
||||
for(x = 0; x < n; x++) {
|
||||
(*linesw[tp->t_line].l_rint)(
|
||||
rxbuf[x], tp);
|
||||
i = rxbuf[x];
|
||||
(*linesw[tp->t_line].l_rint)(rxbuf[x], tp);
|
||||
if (pp->sp_hotchar && i == pp->sp_hotchar) {
|
||||
setsofttty();
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@ -2187,6 +2160,7 @@ si_disc_optim(tp, t, pp)
|
||||
tp->t_state |= TS_CAN_BYPASS_L_RINT;
|
||||
else
|
||||
tp->t_state &= ~TS_CAN_BYPASS_L_RINT;
|
||||
|
||||
/*
|
||||
* Prepare to reduce input latency for packet
|
||||
* discplines with a end of packet character.
|
||||
@ -2197,6 +2171,10 @@ si_disc_optim(tp, t, pp)
|
||||
pp->sp_hotchar = 0x7e;
|
||||
else
|
||||
pp->sp_hotchar = 0;
|
||||
|
||||
DPRINT((pp, DBG_OPTIM, "bypass: %s, hotchar: %x\n",
|
||||
(tp->t_state & TS_CAN_BYPASS_L_RINT) ? "on" : "off",
|
||||
pp->sp_hotchar));
|
||||
}
|
||||
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user