mirror of
https://git.FreeBSD.org/src.git
synced 2024-12-19 10:53:58 +00:00
Mega update to the LSI MegaRAID driver:
1. Implement a large set of ioctl shims so that the Linux management apps from LSI will work. This includes infrastructure to support adding, deleting and rescanning arrays at runtime. This is based on work from Doug Ambrosko, heavily augmented by LSI and Yahoo. 2. Implement full 64-bit DMA support. Systems with more than 4GB of RAM can now operate without the cost of bounce buffers. Cards that cannot do 64-bit DMA will automatically revert to using bounce buffers. This option can be forced off by setting the 'hw.amr.force_sg32" tunable in the loader. It should only be turned off for debugging purposes. This work was sponsored by Yahoo. 3. Streamline the command delivery and interrupt handler paths after much discussion with Dell and LSI. The logic now closely matches the intended design, making it both more robust and much faster. Certain i/o failures under heavy load should be fixed with this. 4. Optimize the locking. In the interrupt handler, the card can be checked for completed commands without any locks held, due to the handler being implicitely serialized and there being no need to look at any shared data. Only grab the lock to return the command structure to the free pool. A small optimization can still be made to collect all of the completions together and then free them together under a single lock. Items 3 and 4 significantly increase the performance of the driver. On an LSI 320-2X card, transactions per second went from 13,000 to 31,000 in my testing with these changes. However, these changes are still fairly experimental and shouldn't be merged to 6.x until there is more testing. Thanks to Doug Ambrosko, LSI, Dell, and Yahoo for contributing towards this.
This commit is contained in:
parent
91f6764e93
commit
5351742ea2
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=153409
File diff suppressed because it is too large
Load Diff
@ -253,10 +253,10 @@ amr_cam_action(struct cam_sim *sim, union ccb *ccb)
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/* save the channel number in the ccb */
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csio->ccb_h.sim_priv.entries[0].field = cam_sim_bus(sim);
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mtx_lock(&sc->amr_io_lock);
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mtx_lock(&sc->amr_list_lock);
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amr_enqueue_ccb(sc, ccb);
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amr_startio(sc);
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mtx_unlock(&sc->amr_io_lock);
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mtx_unlock(&sc->amr_list_lock);
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return;
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}
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break;
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@ -456,11 +456,17 @@ amr_cam_command(struct amr_softc *sc, struct amr_command **acp)
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ac->ac_length = sizeof(*aep);
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ac->ac_complete = amr_cam_complete_extcdb;
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ac->ac_mailbox.mb_command = AMR_CMD_EXTPASS;
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if (AMR_IS_SG64(sc))
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ac->ac_flags |= AMR_CMD_SG64;
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} else {
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ac->ac_data = ap;
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ac->ac_length = sizeof(*ap);
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ac->ac_complete = amr_cam_complete;
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ac->ac_mailbox.mb_command = AMR_CMD_PASS;
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if (AMR_IS_SG64(sc)) {
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ac->ac_mailbox.mb_command = AMR_CMD_PASS_64;
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ac->ac_flags |= AMR_CMD_SG64;
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} else
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ac->ac_mailbox.mb_command = AMR_CMD_PASS;
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}
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out:
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@ -484,11 +490,8 @@ amr_cam_command(struct amr_softc *sc, struct amr_command **acp)
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static void
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amr_cam_poll(struct cam_sim *sim)
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{
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struct amr_softc *sc = cam_sim_softc(sim);
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mtx_lock(&sc->amr_io_lock);
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amr_done(cam_sim_softc(sim));
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mtx_unlock(&sc->amr_io_lock);
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}
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/********************************************************************************
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@ -89,7 +89,7 @@ static disk_strategy_t amrd_strategy;
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static devclass_t amrd_devclass;
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#ifdef FREEBSD_4
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static int disks_registered = 0;
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int amr_disks_registered = 0;
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#endif
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static device_method_t amrd_methods[] = {
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@ -257,7 +257,7 @@ amrd_detach(device_t dev)
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return(EBUSY);
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#ifdef FREEBSD_4
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if (--disks_registered == 0)
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if (--amr_disks_registered == 0)
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cdevsw_remove(&amrddisk_cdevsw);
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#else
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disk_destroy(sc->amrd_disk);
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@ -61,6 +61,7 @@ __FBSDID("$FreeBSD$");
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/sysctl.h>
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#include <sys/bio.h>
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#include <sys/bus.h>
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@ -90,6 +91,12 @@ static int amr_sglist_map(struct amr_softc *sc);
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static void amr_setup_mbox_helper(void *arg, bus_dma_segment_t *segs, int nseg, int error);
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static int amr_setup_mbox(struct amr_softc *sc);
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static u_int amr_force_sg32 = 0;
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TUNABLE_INT("hw.amr.force_sg32", &amr_force_sg32);
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SYSCTL_DECL(_hw_amr);
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SYSCTL_UINT(_hw_amr, OID_AUTO, force_sg32, CTLFLAG_RDTUN, &amr_force_sg32, 0,
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"Force the AMR driver to use 32bit scatter gather");
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static device_method_t amr_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, amr_pci_probe),
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@ -113,48 +120,61 @@ static driver_t amr_pci_driver = {
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static devclass_t amr_devclass;
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DRIVER_MODULE(amr, pci, amr_pci_driver, amr_devclass, 0, 0);
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static struct
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static struct amr_ident
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{
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int vendor;
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int device;
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int flag;
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#define PROBE_SIGNATURE (1<<0)
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int flags;
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#define AMR_ID_PROBE_SIG (1<<0) /* generic i960RD, check signature */
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#define AMR_ID_DO_SG64 (1<<1)
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#define AMR_ID_QUARTZ (1<<2)
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} amr_device_ids[] = {
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{0x101e, 0x9010, 0},
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{0x101e, 0x9060, 0},
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{0x8086, 0x1960, PROBE_SIGNATURE},/* generic i960RD, check for signature */
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{0x101e, 0x1960, 0},
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{0x1000, 0x1960, PROBE_SIGNATURE},
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{0x1000, 0x0407, 0},
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{0x1000, 0x0408, 0},
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{0x1000, 0x0409, 0},
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{0x1028, 0x000e, PROBE_SIGNATURE}, /* perc4/di i960 */
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{0x1028, 0x000f, 0}, /* perc4/di Verde*/
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{0x1028, 0x0013, 0}, /* perc4/di */
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{0x8086, 0x1960, AMR_ID_QUARTZ | AMR_ID_PROBE_SIG},
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{0x101e, 0x1960, AMR_ID_QUARTZ},
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{0x1000, 0x1960, AMR_ID_QUARTZ | AMR_ID_PROBE_SIG},
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{0x1000, 0x0407, AMR_ID_QUARTZ | AMR_ID_DO_SG64},
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{0x1000, 0x0408, AMR_ID_QUARTZ | AMR_ID_DO_SG64},
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{0x1000, 0x0409, AMR_ID_QUARTZ | AMR_ID_DO_SG64},
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{0x1028, 0x000e, AMR_ID_QUARTZ | AMR_ID_DO_SG64 | AMR_ID_PROBE_SIG}, /* perc4/di i960 */
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{0x1028, 0x000f, AMR_ID_QUARTZ | AMR_ID_DO_SG64}, /* perc4/di Verde*/
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{0x1028, 0x0013, AMR_ID_QUARTZ | AMR_ID_DO_SG64}, /* perc4/di */
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{0, 0, 0}
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};
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static int
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amr_pci_probe(device_t dev)
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static struct amr_ident *
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amr_find_ident(device_t dev)
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{
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int i, sig;
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struct amr_ident *id;
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int sig;
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debug_called(1);
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for (i = 0; amr_device_ids[i].vendor != 0; i++) {
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if ((pci_get_vendor(dev) == amr_device_ids[i].vendor) &&
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(pci_get_device(dev) == amr_device_ids[i].device)) {
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for (id = amr_device_ids; id->vendor != 0; id++) {
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if ((pci_get_vendor(dev) == id->vendor) &&
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(pci_get_device(dev) == id->device)) {
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/* do we need to test for a signature? */
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if (amr_device_ids[i].flag & PROBE_SIGNATURE) {
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if (id->flags & AMR_ID_PROBE_SIG) {
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sig = pci_read_config(dev, AMR_CFG_SIG, 2);
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if ((sig != AMR_SIGNATURE_1) && (sig != AMR_SIGNATURE_2))
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continue;
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}
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device_set_desc(dev, LSI_DESC_PCI);
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return(BUS_PROBE_DEFAULT);
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return (id);
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}
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}
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return (NULL);
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}
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static int
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amr_pci_probe(device_t dev)
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{
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debug_called(1);
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if (amr_find_ident(dev) != NULL) {
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device_set_desc(dev, LSI_DESC_PCI);
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return(BUS_PROBE_DEFAULT);
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}
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return(ENXIO);
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}
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@ -162,6 +182,7 @@ static int
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amr_pci_attach(device_t dev)
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{
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struct amr_softc *sc;
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struct amr_ident *id;
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int rid, rtype, error;
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u_int32_t command;
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@ -173,7 +194,6 @@ amr_pci_attach(device_t dev)
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sc = device_get_softc(dev);
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bzero(sc, sizeof(*sc));
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sc->amr_dev = dev;
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mtx_init(&sc->amr_io_lock, "AMR IO Lock", NULL, MTX_DEF);
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/* assume failure is 'not configured' */
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error = ENXIO;
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@ -181,30 +201,35 @@ amr_pci_attach(device_t dev)
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/*
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* Determine board type.
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*/
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if ((id = amr_find_ident(dev)) == NULL)
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return (ENXIO);
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command = pci_read_config(dev, PCIR_COMMAND, 1);
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if ((pci_get_device(dev) == 0x1960) || (pci_get_device(dev) == 0x0407) ||
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(pci_get_device(dev) == 0x0408) || (pci_get_device(dev) == 0x0409) ||
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(pci_get_device(dev) == 0x000e) || (pci_get_device(dev) == 0x000f) ||
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(pci_get_device(dev) == 0x0013)) {
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if (id->flags & AMR_ID_QUARTZ) {
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/*
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* Make sure we are going to be able to talk to this board.
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*/
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if ((command & PCIM_CMD_MEMEN) == 0) {
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device_printf(dev, "memory window not available\n");
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goto out;
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return (ENXIO);
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}
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sc->amr_type |= AMR_TYPE_QUARTZ;
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} else {
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/*
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* Make sure we are going to be able to talk to this board.
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*/
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if ((command & PCIM_CMD_PORTEN) == 0) {
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device_printf(dev, "I/O window not available\n");
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goto out;
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return (ENXIO);
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}
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}
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if ((amr_force_sg32 == 0) && (id->flags & AMR_ID_DO_SG64) &&
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(sizeof(vm_paddr_t) > 4)) {
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device_printf(dev, "Using 64-bit DMA\n");
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sc->amr_type |= AMR_TYPE_SG64;
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}
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/* force the busmaster enable bit on */
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if (!(command & PCIM_CMD_BUSMASTEREN)) {
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device_printf(dev, "busmaster bit not set, enabling\n");
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@ -235,7 +260,9 @@ amr_pci_attach(device_t dev)
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device_printf(sc->amr_dev, "can't allocate interrupt\n");
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goto out;
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}
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if (bus_setup_intr(sc->amr_dev, sc->amr_irq, INTR_TYPE_BIO | INTR_ENTROPY | INTR_MPSAFE, amr_pci_intr, sc, &sc->amr_intr)) {
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if (bus_setup_intr(sc->amr_dev, sc->amr_irq,
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INTR_TYPE_BIO | INTR_ENTROPY | INTR_MPSAFE, amr_pci_intr,
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sc, &sc->amr_intr)) {
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device_printf(sc->amr_dev, "can't set up interrupt\n");
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goto out;
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}
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@ -249,7 +276,9 @@ amr_pci_attach(device_t dev)
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* Allocate the parent bus DMA tag appropriate for PCI.
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*/
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if (bus_dma_tag_create(NULL, /* parent */
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1, 0, /* alignment, boundary */
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1, 0, /* alignment,boundary */
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AMR_IS_SG64(sc) ?
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BUS_SPACE_MAXADDR :
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BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
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BUS_SPACE_MAXADDR, /* highaddr */
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NULL, NULL, /* filter, filterarg */
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@ -266,24 +295,42 @@ amr_pci_attach(device_t dev)
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* Create DMA tag for mapping buffers into controller-addressable space.
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*/
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if (bus_dma_tag_create(sc->amr_parent_dmat, /* parent */
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1, 0, /* alignment, boundary */
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1, 0, /* alignment,boundary */
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BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
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BUS_SPACE_MAXADDR, /* highaddr */
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NULL, NULL, /* filter, filterarg */
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MAXBSIZE, AMR_NSEG, /* maxsize, nsegments */
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MAXBSIZE, /* maxsegsize */
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BUS_DMA_ALLOCNOW, /* flags */
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busdma_lock_mutex, &sc->amr_io_lock, /* lockfunc, lockarg */
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busdma_lock_mutex, /* lockfunc */
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&sc->amr_list_lock, /* lockarg */
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&sc->amr_buffer_dmat)) {
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device_printf(sc->amr_dev, "can't allocate buffer DMA tag\n");
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goto out;
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}
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if (bus_dma_tag_create(sc->amr_parent_dmat, /* parent */
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1, 0, /* alignment,boundary */
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BUS_SPACE_MAXADDR, /* lowaddr */
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BUS_SPACE_MAXADDR, /* highaddr */
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NULL, NULL, /* filter, filterarg */
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MAXBSIZE, AMR_NSEG, /* maxsize, nsegments */
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MAXBSIZE, /* maxsegsize */
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BUS_DMA_ALLOCNOW, /* flags */
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busdma_lock_mutex, /* lockfunc */
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&sc->amr_list_lock, /* lockarg */
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&sc->amr_buffer64_dmat)) {
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device_printf(sc->amr_dev, "can't allocate buffer DMA tag\n");
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goto out;
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}
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debug(2, "dma tag done");
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/*
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* Allocate and set up mailbox in a bus-visible fashion.
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*/
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mtx_init(&sc->amr_list_lock, "AMR List Lock", NULL, MTX_DEF);
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mtx_init(&sc->amr_hw_lock, "AMR HW Lock", NULL, MTX_DEF);
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if ((error = amr_setup_mbox(sc)) != 0)
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goto out;
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@ -423,9 +470,7 @@ amr_pci_intr(void *arg)
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debug_called(2);
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/* collect finished commands, queue anything waiting */
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mtx_lock(&sc->amr_io_lock);
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amr_done(sc);
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mtx_unlock(&sc->amr_io_lock);
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}
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/********************************************************************************
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@ -436,8 +481,8 @@ amr_pci_intr(void *arg)
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static void
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amr_pci_free(struct amr_softc *sc)
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{
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u_int8_t *p;
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u_int8_t *p
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debug_called(1);
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amr_free(sc);
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@ -445,6 +490,8 @@ amr_pci_free(struct amr_softc *sc)
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/* destroy data-transfer DMA tag */
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if (sc->amr_buffer_dmat)
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bus_dma_tag_destroy(sc->amr_buffer_dmat);
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if (sc->amr_buffer64_dmat)
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bus_dma_tag_destroy(sc->amr_buffer64_dmat);
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/* free and destroy DMA memory and tag for s/g lists */
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if (sc->amr_sgtable)
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@ -453,9 +500,10 @@ amr_pci_free(struct amr_softc *sc)
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bus_dma_tag_destroy(sc->amr_sg_dmat);
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/* free and destroy DMA memory and tag for mailbox */
|
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/* XXX Brain damaged GCC Alert! */
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p = (u_int8_t *)(uintptr_t)(volatile void *)sc->amr_mailbox64;
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if (sc->amr_mailbox) {
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p = (u_int8_t *)(uintptr_t)(volatile void *)sc->amr_mailbox;
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bus_dmamem_free(sc->amr_mailbox_dmat, p - 16, sc->amr_mailbox_dmamap);
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bus_dmamem_free(sc->amr_mailbox_dmat, p, sc->amr_mailbox_dmamap);
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}
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if (sc->amr_mailbox_dmat)
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bus_dma_tag_destroy(sc->amr_mailbox_dmat);
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@ -495,6 +543,7 @@ static int
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amr_sglist_map(struct amr_softc *sc)
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{
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size_t segsize;
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u_int8_t *p;
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int error;
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debug_called(1);
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@ -503,19 +552,23 @@ amr_sglist_map(struct amr_softc *sc)
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* Create a single tag describing a region large enough to hold all of
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* the s/g lists we will need.
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*
|
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* Note that we could probably use AMR_LIMITCMD here, but that may become tunable.
|
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* Note that we could probably use AMR_LIMITCMD here, but that may become
|
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* tunable.
|
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*/
|
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segsize = sizeof(struct amr_sgentry) * AMR_NSEG * AMR_MAXCMD;
|
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if (AMR_IS_SG64(sc))
|
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segsize = sizeof(struct amr_sg64entry) * AMR_NSEG * AMR_MAXCMD;
|
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else
|
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segsize = sizeof(struct amr_sgentry) * AMR_NSEG * AMR_MAXCMD;
|
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|
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error = bus_dma_tag_create(sc->amr_parent_dmat, /* parent */
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1, 0, /* alignment, boundary */
|
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1, 0, /* alignment,boundary */
|
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BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
|
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BUS_SPACE_MAXADDR, /* highaddr */
|
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NULL, NULL, /* filter, filterarg */
|
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segsize, 1, /* maxsize, nsegments */
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BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
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0, /* flags */
|
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busdma_lock_mutex, /* lockfunc */
|
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&Giant, /* lockarg */
|
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NULL, NULL, /* lockfunc, lockarg */
|
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&sc->amr_sg_dmat);
|
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if (error != 0) {
|
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device_printf(sc->amr_dev, "can't allocate scatter/gather DMA tag\n");
|
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@ -527,25 +580,32 @@ amr_sglist_map(struct amr_softc *sc)
|
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* controller-visible space.
|
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*
|
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* XXX this assumes we can get enough space for all the s/g maps in one
|
||||
* contiguous slab. We may need to switch to a more complex arrangement where
|
||||
* we allocate in smaller chunks and keep a lookup table from slot to bus address.
|
||||
* contiguous slab. We may need to switch to a more complex arrangement
|
||||
* where we allocate in smaller chunks and keep a lookup table from slot
|
||||
* to bus address.
|
||||
*
|
||||
* XXX HACK ALERT: at least some controllers don't like the s/g memory being
|
||||
* allocated below 0x2000. We leak some memory if we get some
|
||||
* below this mark and allocate again. We should be able to
|
||||
* avoid this with the tag setup, but that does't seem to work.
|
||||
* XXX HACK ALERT: at least some controllers don't like the s/g memory
|
||||
* being allocated below 0x2000. We leak some memory if
|
||||
* we get some below this mark and allocate again. We
|
||||
* should be able to avoid this with the tag setup, but
|
||||
* that does't seem to work.
|
||||
*/
|
||||
retry:
|
||||
error = bus_dmamem_alloc(sc->amr_sg_dmat, (void **)&sc->amr_sgtable, BUS_DMA_NOWAIT, &sc->amr_sg_dmamap);
|
||||
error = bus_dmamem_alloc(sc->amr_sg_dmat, (void **)&p, BUS_DMA_NOWAIT, &sc->amr_sg_dmamap);
|
||||
if (error) {
|
||||
device_printf(sc->amr_dev, "can't allocate s/g table\n");
|
||||
return(ENOMEM);
|
||||
}
|
||||
bus_dmamap_load(sc->amr_sg_dmat, sc->amr_sg_dmamap, sc->amr_sgtable, segsize, amr_sglist_map_helper, sc, 0);
|
||||
bus_dmamap_load(sc->amr_sg_dmat, sc->amr_sg_dmamap, p, segsize, amr_sglist_map_helper, sc, 0);
|
||||
if (sc->amr_sgbusaddr < 0x2000) {
|
||||
debug(1, "s/g table too low (0x%x), reallocating\n", sc->amr_sgbusaddr);
|
||||
goto retry;
|
||||
}
|
||||
|
||||
if (AMR_IS_SG64(sc))
|
||||
sc->amr_sg64table = (struct amr_sg64entry *)p;
|
||||
sc->amr_sgtable = (struct amr_sgentry *)p;
|
||||
|
||||
return(0);
|
||||
}
|
||||
|
||||
@ -563,7 +623,7 @@ amr_setup_mbox_helper(void *arg, bus_dma_segment_t *segs, int nseg, int error)
|
||||
debug_called(1);
|
||||
|
||||
/* save phsyical base of the basic mailbox structure */
|
||||
sc->amr_mailboxphys = segs->ds_addr + 16;
|
||||
sc->amr_mailboxphys = segs->ds_addr + offsetof(struct amr_mailbox64, mb);
|
||||
}
|
||||
|
||||
static int
|
||||
@ -579,15 +639,15 @@ amr_setup_mbox(struct amr_softc *sc)
|
||||
* mailbox.
|
||||
*/
|
||||
error = bus_dma_tag_create(sc->amr_parent_dmat, /* parent */
|
||||
16, 0, /* alignment, boundary */
|
||||
16, 0, /* alignment,boundary */
|
||||
BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
|
||||
BUS_SPACE_MAXADDR, /* highaddr */
|
||||
NULL, NULL, /* filter, filterarg */
|
||||
sizeof(struct amr_mailbox) + 16, 1, /* maxsize, nsegments */
|
||||
sizeof(struct amr_mailbox64), /* maxsize */
|
||||
1, /* nsegments */
|
||||
BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
|
||||
0, /* flags */
|
||||
busdma_lock_mutex, /* lockfunc */
|
||||
&Giant, /* lockarg */
|
||||
NULL, NULL, /* lockfunc, lockarg */
|
||||
&sc->amr_mailbox_dmat);
|
||||
if (error != 0) {
|
||||
device_printf(sc->amr_dev, "can't allocate mailbox tag\n");
|
||||
@ -610,8 +670,8 @@ amr_setup_mbox(struct amr_softc *sc)
|
||||
* Conventional mailbox is inside the mailbox64 region.
|
||||
*/
|
||||
bzero(p, sizeof(struct amr_mailbox64));
|
||||
sc->amr_mailbox64 = (struct amr_mailbox64 *)(p + 12);
|
||||
sc->amr_mailbox = (struct amr_mailbox *)(p + 16);
|
||||
sc->amr_mailbox64 = (struct amr_mailbox64 *)p;
|
||||
sc->amr_mailbox = &sc->amr_mailbox64->mb;
|
||||
|
||||
return(0);
|
||||
}
|
||||
|
@ -65,7 +65,7 @@
|
||||
/*
|
||||
* Fetch the driver's interface version.
|
||||
*/
|
||||
#define AMR_IO_VERSION_NUMBER 0x01
|
||||
#define AMR_IO_VERSION_NUMBER 153
|
||||
#define AMR_IO_VERSION _IOR('A', 0x200, int)
|
||||
|
||||
/*
|
||||
|
@ -119,12 +119,27 @@
|
||||
#define AMR_CMD_GET_MACHINEID 0x36
|
||||
#define AMR_CMD_GET_INITIATOR 0x7d /* returns one byte */
|
||||
#define AMR_CMD_CONFIG 0xa1
|
||||
#define AMR_CMD_LREAD64 0xa7
|
||||
#define AMR_CMD_LWRITE64 0xa8
|
||||
#define AMR_CMD_PASS_64 0xc3
|
||||
#define AMR_CMD_EXTPASS 0xe3
|
||||
|
||||
#define AMR_CONFIG_READ_NVRAM_CONFIG 0x04
|
||||
#define AMR_CONFIG_WRITE_NVRAM_CONFIG 0x0d
|
||||
#define AMR_CONFIG_ENQ3_SOLICITED_NOTIFY 0x01
|
||||
#define AMR_CONFIG_PRODUCT_INFO 0x0e
|
||||
#define AMR_CONFIG_ENQ3 0x0f
|
||||
#define AMR_CONFIG_ENQ3_SOLICITED_NOTIFY 0x01
|
||||
#define AMR_CONFIG_ENQ3_SOLICITED_FULL 0x02
|
||||
#define AMR_CONFIG_ENQ3_UNSOLICITED 0x03
|
||||
#define AMR_CMD_EXTPASS 0xe3
|
||||
|
||||
/*
|
||||
* Command for random deletion of logical drives
|
||||
*/
|
||||
#define FC_DEL_LOGDRV 0xA4
|
||||
#define OP_SUP_DEL_LOGDRV 0x2A
|
||||
#define OP_GET_LDID_MAP 0x18
|
||||
#define OP_DEL_LOGDRV 0x1C
|
||||
|
||||
/*
|
||||
* Command results
|
||||
@ -397,13 +412,14 @@ struct amr_mailbox
|
||||
{
|
||||
u_int8_t mb_command;
|
||||
u_int8_t mb_ident;
|
||||
u_int16_t mb_blkcount;
|
||||
u_int16_t mb_blkcount; /* u_int8_t opcode */
|
||||
/* u_int8_t subopcode */
|
||||
u_int32_t mb_lba;
|
||||
u_int32_t mb_physaddr;
|
||||
u_int8_t mb_drive;
|
||||
u_int8_t mb_nsgelem;
|
||||
u_int8_t res1;
|
||||
u_int8_t mb_busy;
|
||||
u_int8_t mb_nsgelem; /* u_int8_t rserv[0] */
|
||||
u_int8_t res1; /* u_int8_t rserv[1] */
|
||||
u_int8_t mb_busy; /* u_int8_t rserv[2] */
|
||||
u_int8_t mb_nstatus;
|
||||
u_int8_t mb_status;
|
||||
u_int8_t mb_completed[46];
|
||||
@ -414,7 +430,9 @@ struct amr_mailbox
|
||||
|
||||
struct amr_mailbox64
|
||||
{
|
||||
u_int32_t mb64_segment; /* for 64-bit controllers */
|
||||
u_int8_t pad[8]; /* Needed for alignment */
|
||||
u_int32_t sg64_lo; /* S/G pointer for 64-bit commands */
|
||||
u_int32_t sg64_hi; /* S/G pointer for 64-bit commands */
|
||||
struct amr_mailbox mb;
|
||||
} __packed;
|
||||
|
||||
@ -443,6 +461,12 @@ struct amr_sgentry
|
||||
u_int32_t sg_count;
|
||||
} __packed;
|
||||
|
||||
struct amr_sg64entry
|
||||
{
|
||||
u_int64_t sg_addr;
|
||||
u_int32_t sg_count;
|
||||
} __packed;
|
||||
|
||||
struct amr_passthrough
|
||||
{
|
||||
u_int8_t ap_timeout:3;
|
||||
@ -489,6 +513,26 @@ struct amr_ext_passthrough
|
||||
u_int32_t ap_data_transfer_length;
|
||||
} __packed;
|
||||
|
||||
struct amr_linux_ioctl {
|
||||
u_int32_t inlen;
|
||||
u_int32_t outlen;
|
||||
union {
|
||||
u_int8_t fca[16];
|
||||
struct {
|
||||
u_int8_t opcode;
|
||||
u_int8_t subopcode;
|
||||
u_int16_t adapno;
|
||||
u_int32_t buffer;
|
||||
u_int8_t pad[4];
|
||||
u_int32_t length;
|
||||
} __packed fcs;
|
||||
} __packed ui;
|
||||
u_int8_t mbox[18];
|
||||
struct amr_passthrough pthru;
|
||||
u_int32_t data;
|
||||
u_int8_t pad[4];
|
||||
} __packed;
|
||||
|
||||
#ifdef _KERNEL
|
||||
/********************************************************************************
|
||||
********************************************************************************
|
||||
|
@ -60,7 +60,7 @@
|
||||
#include <sys/lock.h>
|
||||
#include <sys/mutex.h>
|
||||
|
||||
#define LSI_DESC_PCI "LSILogic MegaRAID 1.51"
|
||||
#define LSI_DESC_PCI "LSILogic MegaRAID 1.53"
|
||||
|
||||
#ifdef AMR_DEBUG
|
||||
# define debug(level, fmt, args...) do {if (level <= AMR_DEBUG) printf("%s: " fmt "\n", __func__ , ##args);} while(0)
|
||||
@ -110,6 +110,13 @@ struct amr_command
|
||||
struct amr_softc *ac_sc;
|
||||
u_int8_t ac_slot;
|
||||
int ac_status; /* command completion status */
|
||||
union {
|
||||
struct amr_sgentry *sg32;
|
||||
struct amr_sg64entry *sg64;
|
||||
} ac_sg;
|
||||
u_int32_t ac_sgbusaddr;
|
||||
u_int32_t ac_sg64_lo;
|
||||
u_int32_t ac_sg64_hi;
|
||||
struct amr_mailbox ac_mailbox;
|
||||
int ac_flags;
|
||||
#define AMR_CMD_DATAIN (1<<0)
|
||||
@ -120,21 +127,23 @@ struct amr_command
|
||||
#define AMR_CMD_MAPPED (1<<5)
|
||||
#define AMR_CMD_SLEEP (1<<6)
|
||||
#define AMR_CMD_BUSY (1<<7)
|
||||
#define AMR_CMD_SG64 (1<<8)
|
||||
#define AC_IS_SG64(ac) ((ac)->ac_flags & AMR_CMD_SG64)
|
||||
|
||||
struct bio *ac_bio;
|
||||
void (* ac_complete)(struct amr_command *ac);
|
||||
void *ac_private;
|
||||
|
||||
void *ac_data;
|
||||
size_t ac_length;
|
||||
bus_dmamap_t ac_dmamap;
|
||||
u_int32_t ac_dataphys;
|
||||
bus_dmamap_t ac_dma64map;
|
||||
|
||||
void *ac_ccb_data;
|
||||
size_t ac_ccb_length;
|
||||
bus_dmamap_t ac_ccb_dmamap;
|
||||
u_int32_t ac_ccb_dataphys;
|
||||
bus_dmamap_t ac_ccb_dma64map;
|
||||
|
||||
void (* ac_complete)(struct amr_command *ac);
|
||||
void *ac_private;
|
||||
};
|
||||
|
||||
struct amr_command_cluster
|
||||
@ -158,6 +167,7 @@ struct amr_softc
|
||||
bus_space_tag_t amr_btag;
|
||||
bus_dma_tag_t amr_parent_dmat; /* parent DMA tag */
|
||||
bus_dma_tag_t amr_buffer_dmat; /* data buffer DMA tag */
|
||||
bus_dma_tag_t amr_buffer64_dmat;
|
||||
struct resource *amr_irq; /* interrupt */
|
||||
void *amr_intr;
|
||||
|
||||
@ -170,6 +180,7 @@ struct amr_softc
|
||||
|
||||
/* scatter/gather lists and their controller-visible mappings */
|
||||
struct amr_sgentry *amr_sgtable; /* s/g lists */
|
||||
struct amr_sg64entry *amr_sg64table; /* 64bit s/g lists */
|
||||
u_int32_t amr_sgbusaddr; /* s/g table base address in bus space */
|
||||
bus_dma_tag_t amr_sg_dmat; /* s/g buffer DMA tag */
|
||||
bus_dmamap_t amr_sg_dmamap; /* map for s/g buffers */
|
||||
@ -191,6 +202,8 @@ struct amr_softc
|
||||
#define AMR_STATE_SHUTDOWN (1<<3)
|
||||
#define AMR_STATE_CRASHDUMP (1<<4)
|
||||
#define AMR_STATE_QUEUE_FRZN (1<<5)
|
||||
#define AMR_STATE_LD_DELETE (1<<6)
|
||||
#define AMR_STATE_REMAP_LD (1<<7)
|
||||
|
||||
/* per-controller queues */
|
||||
struct bio_queue_head amr_bioq; /* pending I/O with no commands */
|
||||
@ -207,7 +220,8 @@ struct amr_softc
|
||||
struct cam_devq *amr_cam_devq;
|
||||
|
||||
/* control device */
|
||||
struct cdev *amr_dev_t;
|
||||
struct cdev *amr_dev_t;
|
||||
struct mtx amr_list_lock;
|
||||
|
||||
/* controller type-specific support */
|
||||
int amr_type;
|
||||
@ -215,6 +229,8 @@ struct amr_softc
|
||||
#define AMR_IS_QUARTZ(sc) ((sc)->amr_type & AMR_TYPE_QUARTZ)
|
||||
#define AMR_TYPE_40LD (1<<1)
|
||||
#define AMR_IS_40LD(sc) ((sc)->amr_type & AMR_TYPE_40LD)
|
||||
#define AMR_TYPE_SG64 (1<<2)
|
||||
#define AMR_IS_SG64(sc) ((sc)->amr_type & AMR_TYPE_SG64)
|
||||
int (* amr_submit_command)(struct amr_softc *sc);
|
||||
int (* amr_get_work)(struct amr_softc *sc, struct amr_mailbox *mbsave);
|
||||
int (*amr_poll_command)(struct amr_command *ac);
|
||||
@ -224,7 +240,10 @@ struct amr_softc
|
||||
/* misc glue */
|
||||
struct intr_config_hook amr_ich; /* wait-for-interrupts probe hook */
|
||||
struct callout_handle amr_timeout; /* periodic status check */
|
||||
struct mtx amr_io_lock;
|
||||
int amr_allow_vol_config;
|
||||
int amr_linux_no_adapters;
|
||||
int amr_ld_del_supported;
|
||||
struct mtx amr_hw_lock;
|
||||
};
|
||||
|
||||
/*
|
||||
@ -235,6 +254,8 @@ extern void amr_free(struct amr_softc *sc);
|
||||
extern int amr_flush(struct amr_softc *sc);
|
||||
extern int amr_done(struct amr_softc *sc);
|
||||
extern void amr_startio(struct amr_softc *sc);
|
||||
extern int amr_linux_ioctl_int(struct cdev *dev, u_long cmd, caddr_t addr,
|
||||
int32_t flag, d_thread_t *td);
|
||||
|
||||
/*
|
||||
* Command buffer allocation.
|
||||
|
Loading…
Reference in New Issue
Block a user