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Use RDMSR instruction instead of WRMSR.
This commit is contained in:
KATO Takenori
parent
197ea5e1a0
commit
53a76bb7ed
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=33320
@ -36,7 +36,7 @@
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* SUCH DAMAGE.
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*
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* from: Id: machdep.c,v 1.193 1996/06/18 01:22:04 bde Exp
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* $Id: identcpu.c,v 1.41 1998/01/25 23:45:33 kato Exp $
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* $Id: identcpu.c,v 1.42 1998/01/27 08:12:09 kato Exp $
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*/
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#include "opt_cpu.h"
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@ -535,12 +535,12 @@ panicifcpuunsupported(void)
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}
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static volatile u_int trap_by_wrmsr;
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static volatile u_int trap_by_rdmsr;
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/*
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* Special exception 6 handler.
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* The wrmsr instruction generates invalid opcodes fault on 486-class
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* Cyrix CPU. Stacked eip register points the wrmsr instruction in the
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* The rdmsr instruction generates invalid opcodes fault on 486-class
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* Cyrix CPU. Stacked eip register points the rdmsr instruction in the
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* function identblue() when this handler is called. Stacked eip should
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* be advanced.
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*/
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@ -551,8 +551,8 @@ asm
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.p2align 2,0x90
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" __XSTRING(CNAME(bluetrap6)) ":
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ss
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movl $0xa8c1d," __XSTRING(CNAME(trap_by_wrmsr)) "
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addl $2, (%esp) # I know wrmsr is a 2-bytes instruction.
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movl $0xa8c1d," __XSTRING(CNAME(trap_by_rdmsr)) "
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addl $2, (%esp) # I know rdmsr is a 2-bytes instruction.
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iret
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");
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@ -567,9 +567,9 @@ asm
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.p2align 2,0x90
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" __XSTRING(CNAME(bluetrap13)) ":
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ss
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movl $0xa89c4," __XSTRING(CNAME(trap_by_wrmsr)) "
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movl $0xa89c4," __XSTRING(CNAME(trap_by_rdmsr)) "
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popl %eax # discard errorcode.
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addl $2, (%esp) # I know wrmsr is a 2-bytes instruction.
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addl $2, (%esp) # I know rdmsr is a 2-bytes instruction.
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iret
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");
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@ -585,28 +585,28 @@ static int
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identblue(void)
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{
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trap_by_wrmsr = 0;
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trap_by_rdmsr = 0;
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/*
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* Cyrix 486-class CPU does not support wrmsr instruction.
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* The wrmsr instruction generates invalid opcode fault, and exception
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* Cyrix 486-class CPU does not support rdmsr instruction.
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* The rdmsr instruction generates invalid opcode fault, and exception
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* will be trapped by bluetrap6() on Cyrix 486-class CPU. The
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* bluetrap6() set the magic number to trap_by_wrmsr.
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* bluetrap6() set the magic number to trap_by_rdmsr.
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*/
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setidt(6, bluetrap6, SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
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/*
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* Certain BIOS disables cpuid instructnion of Cyrix 6x86MX CPU.
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* In this case, wrmsr generates general protection fault, and
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* In this case, rdmsr generates general protection fault, and
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* exception will be trapped by bluetrap13().
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*/
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setidt(13, bluetrap13, SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
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wrmsr(0x1002, 0x03000000LL); /* Cyrix CPU generates fault. */
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rdmsr(0x1002); /* Cyrix CPU generates fault. */
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if (trap_by_wrmsr == 0xa8c1d)
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if (trap_by_rdmsr == 0xa8c1d)
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return IDENTBLUE_CYRIX486;
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else if (trap_by_wrmsr == 0xa89c4)
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else if (trap_by_rdmsr == 0xa89c4)
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return IDENTBLUE_CYRIXM2;
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return IDENTBLUE_IBMCPU;
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}
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@ -36,7 +36,7 @@
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* SUCH DAMAGE.
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*
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* from: Id: machdep.c,v 1.193 1996/06/18 01:22:04 bde Exp
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* $Id: identcpu.c,v 1.41 1998/01/25 23:45:33 kato Exp $
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* $Id: identcpu.c,v 1.42 1998/01/27 08:12:09 kato Exp $
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*/
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#include "opt_cpu.h"
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@ -535,12 +535,12 @@ panicifcpuunsupported(void)
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}
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static volatile u_int trap_by_wrmsr;
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static volatile u_int trap_by_rdmsr;
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/*
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* Special exception 6 handler.
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* The wrmsr instruction generates invalid opcodes fault on 486-class
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* Cyrix CPU. Stacked eip register points the wrmsr instruction in the
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* The rdmsr instruction generates invalid opcodes fault on 486-class
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* Cyrix CPU. Stacked eip register points the rdmsr instruction in the
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* function identblue() when this handler is called. Stacked eip should
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* be advanced.
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*/
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@ -551,8 +551,8 @@ asm
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.p2align 2,0x90
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" __XSTRING(CNAME(bluetrap6)) ":
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ss
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movl $0xa8c1d," __XSTRING(CNAME(trap_by_wrmsr)) "
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addl $2, (%esp) # I know wrmsr is a 2-bytes instruction.
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movl $0xa8c1d," __XSTRING(CNAME(trap_by_rdmsr)) "
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addl $2, (%esp) # I know rdmsr is a 2-bytes instruction.
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iret
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");
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@ -567,9 +567,9 @@ asm
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.p2align 2,0x90
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" __XSTRING(CNAME(bluetrap13)) ":
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ss
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movl $0xa89c4," __XSTRING(CNAME(trap_by_wrmsr)) "
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movl $0xa89c4," __XSTRING(CNAME(trap_by_rdmsr)) "
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popl %eax # discard errorcode.
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addl $2, (%esp) # I know wrmsr is a 2-bytes instruction.
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addl $2, (%esp) # I know rdmsr is a 2-bytes instruction.
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iret
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");
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@ -585,28 +585,28 @@ static int
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identblue(void)
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{
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trap_by_wrmsr = 0;
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trap_by_rdmsr = 0;
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/*
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* Cyrix 486-class CPU does not support wrmsr instruction.
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* The wrmsr instruction generates invalid opcode fault, and exception
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* Cyrix 486-class CPU does not support rdmsr instruction.
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* The rdmsr instruction generates invalid opcode fault, and exception
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* will be trapped by bluetrap6() on Cyrix 486-class CPU. The
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* bluetrap6() set the magic number to trap_by_wrmsr.
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* bluetrap6() set the magic number to trap_by_rdmsr.
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*/
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setidt(6, bluetrap6, SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
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/*
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* Certain BIOS disables cpuid instructnion of Cyrix 6x86MX CPU.
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* In this case, wrmsr generates general protection fault, and
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* In this case, rdmsr generates general protection fault, and
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* exception will be trapped by bluetrap13().
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*/
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setidt(13, bluetrap13, SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
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wrmsr(0x1002, 0x03000000LL); /* Cyrix CPU generates fault. */
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rdmsr(0x1002); /* Cyrix CPU generates fault. */
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if (trap_by_wrmsr == 0xa8c1d)
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if (trap_by_rdmsr == 0xa8c1d)
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return IDENTBLUE_CYRIX486;
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else if (trap_by_wrmsr == 0xa89c4)
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else if (trap_by_rdmsr == 0xa89c4)
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return IDENTBLUE_CYRIXM2;
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return IDENTBLUE_IBMCPU;
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}
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