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Use RDMSR instruction instead of WRMSR.

This commit is contained in:
KATO Takenori 1998-02-13 09:34:42 +00:00
parent 197ea5e1a0
commit 53a76bb7ed
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=33320
2 changed files with 32 additions and 32 deletions
sys
amd64/amd64
i386/i386

View File

@ -36,7 +36,7 @@
* SUCH DAMAGE. * SUCH DAMAGE.
* *
* from: Id: machdep.c,v 1.193 1996/06/18 01:22:04 bde Exp * from: Id: machdep.c,v 1.193 1996/06/18 01:22:04 bde Exp
* $Id: identcpu.c,v 1.41 1998/01/25 23:45:33 kato Exp $ * $Id: identcpu.c,v 1.42 1998/01/27 08:12:09 kato Exp $
*/ */
#include "opt_cpu.h" #include "opt_cpu.h"
@ -535,12 +535,12 @@ panicifcpuunsupported(void)
} }
static volatile u_int trap_by_wrmsr; static volatile u_int trap_by_rdmsr;
/* /*
* Special exception 6 handler. * Special exception 6 handler.
* The wrmsr instruction generates invalid opcodes fault on 486-class * The rdmsr instruction generates invalid opcodes fault on 486-class
* Cyrix CPU. Stacked eip register points the wrmsr instruction in the * Cyrix CPU. Stacked eip register points the rdmsr instruction in the
* function identblue() when this handler is called. Stacked eip should * function identblue() when this handler is called. Stacked eip should
* be advanced. * be advanced.
*/ */
@ -551,8 +551,8 @@ asm
.p2align 2,0x90 .p2align 2,0x90
" __XSTRING(CNAME(bluetrap6)) ": " __XSTRING(CNAME(bluetrap6)) ":
ss ss
movl $0xa8c1d," __XSTRING(CNAME(trap_by_wrmsr)) " movl $0xa8c1d," __XSTRING(CNAME(trap_by_rdmsr)) "
addl $2, (%esp) # I know wrmsr is a 2-bytes instruction. addl $2, (%esp) # I know rdmsr is a 2-bytes instruction.
iret iret
"); ");
@ -567,9 +567,9 @@ asm
.p2align 2,0x90 .p2align 2,0x90
" __XSTRING(CNAME(bluetrap13)) ": " __XSTRING(CNAME(bluetrap13)) ":
ss ss
movl $0xa89c4," __XSTRING(CNAME(trap_by_wrmsr)) " movl $0xa89c4," __XSTRING(CNAME(trap_by_rdmsr)) "
popl %eax # discard errorcode. popl %eax # discard errorcode.
addl $2, (%esp) # I know wrmsr is a 2-bytes instruction. addl $2, (%esp) # I know rdmsr is a 2-bytes instruction.
iret iret
"); ");
@ -585,28 +585,28 @@ static int
identblue(void) identblue(void)
{ {
trap_by_wrmsr = 0; trap_by_rdmsr = 0;
/* /*
* Cyrix 486-class CPU does not support wrmsr instruction. * Cyrix 486-class CPU does not support rdmsr instruction.
* The wrmsr instruction generates invalid opcode fault, and exception * The rdmsr instruction generates invalid opcode fault, and exception
* will be trapped by bluetrap6() on Cyrix 486-class CPU. The * will be trapped by bluetrap6() on Cyrix 486-class CPU. The
* bluetrap6() set the magic number to trap_by_wrmsr. * bluetrap6() set the magic number to trap_by_rdmsr.
*/ */
setidt(6, bluetrap6, SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); setidt(6, bluetrap6, SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
/* /*
* Certain BIOS disables cpuid instructnion of Cyrix 6x86MX CPU. * Certain BIOS disables cpuid instructnion of Cyrix 6x86MX CPU.
* In this case, wrmsr generates general protection fault, and * In this case, rdmsr generates general protection fault, and
* exception will be trapped by bluetrap13(). * exception will be trapped by bluetrap13().
*/ */
setidt(13, bluetrap13, SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); setidt(13, bluetrap13, SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
wrmsr(0x1002, 0x03000000LL); /* Cyrix CPU generates fault. */ rdmsr(0x1002); /* Cyrix CPU generates fault. */
if (trap_by_wrmsr == 0xa8c1d) if (trap_by_rdmsr == 0xa8c1d)
return IDENTBLUE_CYRIX486; return IDENTBLUE_CYRIX486;
else if (trap_by_wrmsr == 0xa89c4) else if (trap_by_rdmsr == 0xa89c4)
return IDENTBLUE_CYRIXM2; return IDENTBLUE_CYRIXM2;
return IDENTBLUE_IBMCPU; return IDENTBLUE_IBMCPU;
} }

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@ -36,7 +36,7 @@
* SUCH DAMAGE. * SUCH DAMAGE.
* *
* from: Id: machdep.c,v 1.193 1996/06/18 01:22:04 bde Exp * from: Id: machdep.c,v 1.193 1996/06/18 01:22:04 bde Exp
* $Id: identcpu.c,v 1.41 1998/01/25 23:45:33 kato Exp $ * $Id: identcpu.c,v 1.42 1998/01/27 08:12:09 kato Exp $
*/ */
#include "opt_cpu.h" #include "opt_cpu.h"
@ -535,12 +535,12 @@ panicifcpuunsupported(void)
} }
static volatile u_int trap_by_wrmsr; static volatile u_int trap_by_rdmsr;
/* /*
* Special exception 6 handler. * Special exception 6 handler.
* The wrmsr instruction generates invalid opcodes fault on 486-class * The rdmsr instruction generates invalid opcodes fault on 486-class
* Cyrix CPU. Stacked eip register points the wrmsr instruction in the * Cyrix CPU. Stacked eip register points the rdmsr instruction in the
* function identblue() when this handler is called. Stacked eip should * function identblue() when this handler is called. Stacked eip should
* be advanced. * be advanced.
*/ */
@ -551,8 +551,8 @@ asm
.p2align 2,0x90 .p2align 2,0x90
" __XSTRING(CNAME(bluetrap6)) ": " __XSTRING(CNAME(bluetrap6)) ":
ss ss
movl $0xa8c1d," __XSTRING(CNAME(trap_by_wrmsr)) " movl $0xa8c1d," __XSTRING(CNAME(trap_by_rdmsr)) "
addl $2, (%esp) # I know wrmsr is a 2-bytes instruction. addl $2, (%esp) # I know rdmsr is a 2-bytes instruction.
iret iret
"); ");
@ -567,9 +567,9 @@ asm
.p2align 2,0x90 .p2align 2,0x90
" __XSTRING(CNAME(bluetrap13)) ": " __XSTRING(CNAME(bluetrap13)) ":
ss ss
movl $0xa89c4," __XSTRING(CNAME(trap_by_wrmsr)) " movl $0xa89c4," __XSTRING(CNAME(trap_by_rdmsr)) "
popl %eax # discard errorcode. popl %eax # discard errorcode.
addl $2, (%esp) # I know wrmsr is a 2-bytes instruction. addl $2, (%esp) # I know rdmsr is a 2-bytes instruction.
iret iret
"); ");
@ -585,28 +585,28 @@ static int
identblue(void) identblue(void)
{ {
trap_by_wrmsr = 0; trap_by_rdmsr = 0;
/* /*
* Cyrix 486-class CPU does not support wrmsr instruction. * Cyrix 486-class CPU does not support rdmsr instruction.
* The wrmsr instruction generates invalid opcode fault, and exception * The rdmsr instruction generates invalid opcode fault, and exception
* will be trapped by bluetrap6() on Cyrix 486-class CPU. The * will be trapped by bluetrap6() on Cyrix 486-class CPU. The
* bluetrap6() set the magic number to trap_by_wrmsr. * bluetrap6() set the magic number to trap_by_rdmsr.
*/ */
setidt(6, bluetrap6, SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); setidt(6, bluetrap6, SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
/* /*
* Certain BIOS disables cpuid instructnion of Cyrix 6x86MX CPU. * Certain BIOS disables cpuid instructnion of Cyrix 6x86MX CPU.
* In this case, wrmsr generates general protection fault, and * In this case, rdmsr generates general protection fault, and
* exception will be trapped by bluetrap13(). * exception will be trapped by bluetrap13().
*/ */
setidt(13, bluetrap13, SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); setidt(13, bluetrap13, SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
wrmsr(0x1002, 0x03000000LL); /* Cyrix CPU generates fault. */ rdmsr(0x1002); /* Cyrix CPU generates fault. */
if (trap_by_wrmsr == 0xa8c1d) if (trap_by_rdmsr == 0xa8c1d)
return IDENTBLUE_CYRIX486; return IDENTBLUE_CYRIX486;
else if (trap_by_wrmsr == 0xa89c4) else if (trap_by_rdmsr == 0xa89c4)
return IDENTBLUE_CYRIXM2; return IDENTBLUE_CYRIXM2;
return IDENTBLUE_IBMCPU; return IDENTBLUE_IBMCPU;
} }