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Prepare the radeon driver for MSI support.

MFC after:	2 weeks
This commit is contained in:
Robert Noland 2009-02-25 18:50:35 +00:00
parent 82369f9166
commit 5493c70e90
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=189051

View File

@ -192,6 +192,7 @@ irqreturn_t radeon_driver_irq_handler(DRM_IRQ_ARGS)
(drm_radeon_private_t *) dev->dev_private;
u32 stat;
u32 r500_disp_int;
u32 tmp;
/* Only consider the bits we're interested in - others could be used
* outside the DRM
@ -218,6 +219,33 @@ irqreturn_t radeon_driver_irq_handler(DRM_IRQ_ARGS)
if (stat & RADEON_CRTC2_VBLANK_STAT)
drm_handle_vblank(dev, 1);
}
if (dev->msi_enabled) {
switch(dev_priv->flags & RADEON_FAMILY_MASK) {
case CHIP_RS400:
case CHIP_RS480:
tmp = RADEON_READ(RADEON_AIC_CNTL) &
~RS400_MSI_REARM;
RADEON_WRITE(RADEON_AIC_CNTL, tmp);
RADEON_WRITE(RADEON_AIC_CNTL,
tmp | RS400_MSI_REARM);
break;
case CHIP_RS690:
case CHIP_RS740:
tmp = RADEON_READ(RADEON_BUS_CNTL) &
~RS600_MSI_REARM;
RADEON_WRITE(RADEON_BUS_CNTL, tmp);
RADEON_WRITE(RADEON_BUS_CNTL, tmp |
RS600_MSI_REARM);
break;
default:
tmp = RADEON_READ(RADEON_MSI_REARM_EN) &
~RV370_MSI_REARM_EN;
RADEON_WRITE(RADEON_MSI_REARM_EN, tmp);
RADEON_WRITE(RADEON_MSI_REARM_EN,
tmp | RV370_MSI_REARM_EN);
break;
}
}
return IRQ_HANDLED;
}