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Fix card/device names, no functional change
The ADMtek AN985 is the cardbus variant of ADMtek AN983 The Netgear FA511 is just a relabled ADMtek AN985 PR: kern/50574 MFC after: 1 month
This commit is contained in:
parent
9dfc434d60
commit
593a1aea1a
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=201430
@ -43,8 +43,9 @@ __FBSDID("$FreeBSD$");
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* ASIX Electronics AX88140A (www.asix.com.tw)
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* ASIX Electronics AX88140A (www.asix.com.tw)
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* ASIX Electronics AX88141 (www.asix.com.tw)
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* ASIX Electronics AX88141 (www.asix.com.tw)
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* ADMtek AL981 (www.admtek.com.tw)
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* ADMtek AL981 (www.admtek.com.tw)
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* ADMtek AN985 (www.admtek.com.tw)
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* ADMtek AN983 (www.admtek.com.tw)
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* Netgear FA511 (www.netgear.com) Appears to be rebadged ADMTek AN985
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* ADMtek cardbus AN985 (www.admtek.com.tw)
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* Netgear FA511 (www.netgear.com) Appears to be rebadged ADMTek cardbus AN985
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* Davicom DM9100, DM9102, DM9102A (www.davicom8.com)
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* Davicom DM9100, DM9102, DM9102A (www.davicom8.com)
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* Accton EN1217 (www.accton.com)
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* Accton EN1217 (www.accton.com)
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* Xircom X3201 (www.xircom.com)
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* Xircom X3201 (www.xircom.com)
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@ -161,14 +162,14 @@ static const struct dc_type dc_devs[] = {
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"Davicom DM9102 10/100BaseTX" },
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"Davicom DM9102 10/100BaseTX" },
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{ DC_DEVID(DC_VENDORID_ADMTEK, DC_DEVICEID_AL981), 0,
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{ DC_DEVID(DC_VENDORID_ADMTEK, DC_DEVICEID_AL981), 0,
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"ADMtek AL981 10/100BaseTX" },
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"ADMtek AL981 10/100BaseTX" },
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{ DC_DEVID(DC_VENDORID_ADMTEK, DC_DEVICEID_AN983), 0,
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"ADMtek AN983 10/100BaseTX" },
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{ DC_DEVID(DC_VENDORID_ADMTEK, DC_DEVICEID_AN985), 0,
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{ DC_DEVID(DC_VENDORID_ADMTEK, DC_DEVICEID_AN985), 0,
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"ADMtek AN985 10/100BaseTX" },
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"ADMtek AN985 cardBus 10/100BaseTX or clone" },
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{ DC_DEVID(DC_VENDORID_ADMTEK, DC_DEVICEID_ADM9511), 0,
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{ DC_DEVID(DC_VENDORID_ADMTEK, DC_DEVICEID_ADM9511), 0,
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"ADMtek ADM9511 10/100BaseTX" },
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"ADMtek ADM9511 10/100BaseTX" },
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{ DC_DEVID(DC_VENDORID_ADMTEK, DC_DEVICEID_ADM9513), 0,
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{ DC_DEVID(DC_VENDORID_ADMTEK, DC_DEVICEID_ADM9513), 0,
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"ADMtek ADM9513 10/100BaseTX" },
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"ADMtek ADM9513 10/100BaseTX" },
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{ DC_DEVID(DC_VENDORID_ADMTEK, DC_DEVICEID_FA511), 0,
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"Netgear FA511 10/100BaseTX" },
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{ DC_DEVID(DC_VENDORID_ASIX, DC_DEVICEID_AX88140A), DC_REVISION_88141,
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{ DC_DEVID(DC_VENDORID_ASIX, DC_DEVICEID_AX88140A), DC_REVISION_88141,
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"ASIX AX88141 10/100BaseTX" },
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"ASIX AX88141 10/100BaseTX" },
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{ DC_DEVID(DC_VENDORID_ASIX, DC_DEVICEID_AX88140A), 0,
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{ DC_DEVID(DC_VENDORID_ASIX, DC_DEVICEID_AX88140A), 0,
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@ -778,10 +779,10 @@ dc_miibus_readreg(device_t dev, int phy, int reg)
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bzero(&frame, sizeof(frame));
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bzero(&frame, sizeof(frame));
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/*
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/*
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* Note: both the AL981 and AN985 have internal PHYs,
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* Note: both the AL981 and AN983 have internal PHYs,
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* however the AL981 provides direct access to the PHY
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* however the AL981 provides direct access to the PHY
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* registers while the AN985 uses a serial MII interface.
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* registers while the AN983 uses a serial MII interface.
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* The AN985's MII interface is also buggy in that you
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* The AN983's MII interface is also buggy in that you
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* can read from any MII address (0 to 31), but only address 1
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* can read from any MII address (0 to 31), but only address 1
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* behaves normally. To deal with both cases, we pretend
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* behaves normally. To deal with both cases, we pretend
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* that the PHY is at MII address 1.
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* that the PHY is at MII address 1.
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@ -1895,11 +1896,11 @@ dc_attach(device_t dev)
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sc->dc_pmode = DC_PMODE_MII;
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sc->dc_pmode = DC_PMODE_MII;
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dc_read_srom(sc, sc->dc_romwidth);
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dc_read_srom(sc, sc->dc_romwidth);
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break;
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break;
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case DC_DEVID(DC_VENDORID_ADMTEK, DC_DEVICEID_AN983):
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case DC_DEVID(DC_VENDORID_ADMTEK, DC_DEVICEID_AN985):
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case DC_DEVID(DC_VENDORID_ADMTEK, DC_DEVICEID_AN985):
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case DC_DEVID(DC_VENDORID_ADMTEK, DC_DEVICEID_ADM9511):
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case DC_DEVID(DC_VENDORID_ADMTEK, DC_DEVICEID_ADM9511):
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case DC_DEVID(DC_VENDORID_ADMTEK, DC_DEVICEID_ADM9513):
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case DC_DEVID(DC_VENDORID_ADMTEK, DC_DEVICEID_ADM9513):
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case DC_DEVID(DC_VENDORID_DLINK, DC_DEVICEID_DRP32TXD):
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case DC_DEVID(DC_VENDORID_DLINK, DC_DEVICEID_DRP32TXD):
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case DC_DEVID(DC_VENDORID_ADMTEK, DC_DEVICEID_FA511):
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case DC_DEVID(DC_VENDORID_ABOCOM, DC_DEVICEID_FE2500):
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case DC_DEVID(DC_VENDORID_ABOCOM, DC_DEVICEID_FE2500):
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case DC_DEVID(DC_VENDORID_ABOCOM, DC_DEVICEID_FE2500MX):
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case DC_DEVID(DC_VENDORID_ABOCOM, DC_DEVICEID_FE2500MX):
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case DC_DEVID(DC_VENDORID_ACCTON, DC_DEVICEID_EN2242):
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case DC_DEVID(DC_VENDORID_ACCTON, DC_DEVICEID_EN2242):
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@ -1910,7 +1911,7 @@ dc_attach(device_t dev)
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case DC_DEVID(DC_VENDORID_MICROSOFT, DC_DEVICEID_MSMN130):
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case DC_DEVID(DC_VENDORID_MICROSOFT, DC_DEVICEID_MSMN130):
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case DC_DEVID(DC_VENDORID_LINKSYS, DC_DEVICEID_PCMPC200_AB08):
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case DC_DEVID(DC_VENDORID_LINKSYS, DC_DEVICEID_PCMPC200_AB08):
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case DC_DEVID(DC_VENDORID_LINKSYS, DC_DEVICEID_PCMPC200_AB09):
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case DC_DEVID(DC_VENDORID_LINKSYS, DC_DEVICEID_PCMPC200_AB09):
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sc->dc_type = DC_TYPE_AN985;
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sc->dc_type = DC_TYPE_AN983;
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sc->dc_flags |= DC_64BIT_HASH;
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sc->dc_flags |= DC_64BIT_HASH;
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sc->dc_flags |= DC_TX_USE_TX_INTR;
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sc->dc_flags |= DC_TX_USE_TX_INTR;
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sc->dc_flags |= DC_TX_ADMTEK_WAR;
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sc->dc_flags |= DC_TX_ADMTEK_WAR;
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@ -2057,7 +2058,7 @@ dc_attach(device_t dev)
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dc_read_eeprom(sc, (caddr_t)&eaddr, DC_EE_NODEADDR, 3, 0);
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dc_read_eeprom(sc, (caddr_t)&eaddr, DC_EE_NODEADDR, 3, 0);
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break;
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break;
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case DC_TYPE_AL981:
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case DC_TYPE_AL981:
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case DC_TYPE_AN985:
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case DC_TYPE_AN983:
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reg = CSR_READ_4(sc, DC_AL_PAR0);
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reg = CSR_READ_4(sc, DC_AL_PAR0);
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mac = (uint8_t *)&eaddr[0];
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mac = (uint8_t *)&eaddr[0];
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mac[0] = (reg >> 0) & 0xff;
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mac[0] = (reg >> 0) & 0xff;
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@ -72,7 +72,7 @@
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#define DC_TYPE_21143 0x4 /* Intel 21143 */
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#define DC_TYPE_21143 0x4 /* Intel 21143 */
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#define DC_TYPE_ASIX 0x5 /* ASIX AX88140A/AX88141 */
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#define DC_TYPE_ASIX 0x5 /* ASIX AX88140A/AX88141 */
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#define DC_TYPE_AL981 0x6 /* ADMtek AL981 Comet */
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#define DC_TYPE_AL981 0x6 /* ADMtek AL981 Comet */
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#define DC_TYPE_AN985 0x7 /* ADMtek AN985 Centaur */
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#define DC_TYPE_AN983 0x7 /* ADMtek AN983 Centaur */
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#define DC_TYPE_DM9102 0x8 /* Davicom DM9102 */
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#define DC_TYPE_DM9102 0x8 /* Davicom DM9102 */
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#define DC_TYPE_PNICII 0x9 /* 82c115 PNIC II */
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#define DC_TYPE_PNICII 0x9 /* 82c115 PNIC II */
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#define DC_TYPE_PNIC 0xA /* 82c168/82c169 PNIC I */
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#define DC_TYPE_PNIC 0xA /* 82c168/82c169 PNIC I */
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@ -86,12 +86,12 @@
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#define DC_IS_ADMTEK(x) \
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#define DC_IS_ADMTEK(x) \
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(x->dc_type == DC_TYPE_AL981 || \
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(x->dc_type == DC_TYPE_AL981 || \
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x->dc_type == DC_TYPE_AN985)
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x->dc_type == DC_TYPE_AN983)
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#define DC_IS_INTEL(x) (x->dc_type == DC_TYPE_21143)
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#define DC_IS_INTEL(x) (x->dc_type == DC_TYPE_21143)
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#define DC_IS_ASIX(x) (x->dc_type == DC_TYPE_ASIX)
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#define DC_IS_ASIX(x) (x->dc_type == DC_TYPE_ASIX)
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#define DC_IS_COMET(x) (x->dc_type == DC_TYPE_AL981)
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#define DC_IS_COMET(x) (x->dc_type == DC_TYPE_AL981)
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#define DC_IS_CENTAUR(x) (x->dc_type == DC_TYPE_AN985)
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#define DC_IS_CENTAUR(x) (x->dc_type == DC_TYPE_AN983)
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#define DC_IS_DAVICOM(x) (x->dc_type == DC_TYPE_DM9102)
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#define DC_IS_DAVICOM(x) (x->dc_type == DC_TYPE_DM9102)
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#define DC_IS_PNICII(x) (x->dc_type == DC_TYPE_PNICII)
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#define DC_IS_PNICII(x) (x->dc_type == DC_TYPE_PNICII)
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#define DC_IS_PNIC(x) (x->dc_type == DC_TYPE_PNIC)
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#define DC_IS_PNIC(x) (x->dc_type == DC_TYPE_PNIC)
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@ -543,8 +543,8 @@ struct dc_mii_frame {
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*/
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*/
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/*
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/*
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* ADMtek specific registers and constants for the AL981 and AN985.
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* ADMtek specific registers and constants for the AL981 and AN983.
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* The AN985 doesn't use the magic PHY registers.
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* The AN983 doesn't use the magic PHY registers.
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*/
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*/
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#define DC_AL_CR 0x88 /* command register */
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#define DC_AL_CR 0x88 /* command register */
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#define DC_AL_PAR0 0xA4 /* station address */
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#define DC_AL_PAR0 0xA4 /* station address */
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@ -890,8 +890,8 @@ struct dc_softc {
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* ADMtek device IDs.
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* ADMtek device IDs.
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*/
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*/
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#define DC_DEVICEID_AL981 0x0981
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#define DC_DEVICEID_AL981 0x0981
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#define DC_DEVICEID_AN985 0x0985
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#define DC_DEVICEID_AN983 0x0985
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#define DC_DEVICEID_FA511 0x1985
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#define DC_DEVICEID_AN985 0x1985
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#define DC_DEVICEID_ADM9511 0x9511
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#define DC_DEVICEID_ADM9511 0x9511
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#define DC_DEVICEID_ADM9513 0x9513
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#define DC_DEVICEID_ADM9513 0x9513
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