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mirror of https://git.FreeBSD.org/src.git synced 2024-12-20 11:11:24 +00:00

Query and cache PCAM, MCAM registers on initialization in mlx5core.

On load_one, we now cache our capabilities registers internally, similar
to QUERY_HCA_CAP. Capabilities can later be queried using macros
introduced in this patch.

Linux commit:
71862561f3a62015a11de16d1c306481e8415c08

Submitted by:	slavash@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
This commit is contained in:
Hans Petter Selasky 2019-05-08 10:39:53 +00:00
parent 0358212d37
commit 5a8145f6f2
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=347272
3 changed files with 22 additions and 0 deletions

View File

@ -1050,6 +1050,12 @@ enum mlx5_mcam_feature_groups {
MLX5_GET(qos_cap,\
mdev->hca_caps_max[MLX5_CAP_QOS], cap)
#define MLX5_CAP_PCAM_FEATURE(mdev, fld) \
MLX5_GET(pcam_reg, (mdev)->caps.pcam, feature_cap_mask.enhanced_features.fld)
#define MLX5_CAP_MCAM_FEATURE(mdev, fld) \
MLX5_GET(mcam_reg, (mdev)->caps.mcam, mng_feature_cap_mask.enhanced_features.fld)
#define MLX5_CAP_QCAM_REG(mdev, fld) \
MLX5_GET(qcam_reg, (mdev)->caps.qcam, qos_access_reg_cap_mask.reg_cap.fld)

View File

@ -699,6 +699,8 @@ struct mlx5_core_dev {
u32 hca_caps_cur[MLX5_CAP_NUM][MLX5_UN_SZ_DW(hca_cap_union)];
u32 hca_caps_max[MLX5_CAP_NUM][MLX5_UN_SZ_DW(hca_cap_union)];
struct {
u32 pcam[MLX5_ST_SZ_DW(pcam_reg)];
u32 mcam[MLX5_ST_SZ_DW(mcam_reg)];
u32 qcam[MLX5_ST_SZ_DW(qcam_reg)];
u32 fpga[MLX5_ST_SZ_DW(fpga_cap)];
} caps;

View File

@ -117,6 +117,20 @@ static int mlx5_get_qcam_reg(struct mlx5_core_dev *dev)
MLX5_QCAM_REGS_FIRST_128);
}
static int mlx5_get_pcam_reg(struct mlx5_core_dev *dev)
{
return mlx5_query_pcam_reg(dev, dev->caps.pcam,
MLX5_PCAM_FEATURE_ENHANCED_FEATURES,
MLX5_PCAM_REGS_5000_TO_507F);
}
static int mlx5_get_mcam_reg(struct mlx5_core_dev *dev)
{
return mlx5_query_mcam_reg(dev, dev->caps.mcam,
MLX5_MCAM_FEATURE_ENHANCED_FEATURES,
MLX5_MCAM_REGS_FIRST_128);
}
int mlx5_query_hca_caps(struct mlx5_core_dev *dev)
{
int err;