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x86: Adjust base addr for PCI MCFG regions
Each bus gets 1 MB of address space; the actual base address for an
MCFG bus range is the address from the table plus the starting bus
number times 1 MB.
The PCI spec is unclear on this point, but this change matches what
Linux does, which is likely enough of a de facto standard regardless
of what any de jure standard might attempt to say.
Fixes: f54a3890b1
("x86: Support multiple PCI MCFG regions")
Reviewed by: jhb
Differential Revision: https://reviews.freebsd.org/D43206
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parent
b46c7b1ed4
commit
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@ -296,7 +296,7 @@ pcie_cfgregopen(uint64_t base, uint16_t domain, uint8_t minbus, uint8_t maxbus)
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region = &mcfg_regions[mcfg_numregions];
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/* XXX: We should make sure this really fits into the direct map. */
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region->base = pmap_mapdev_pciecfg(base, (maxbus + 1 - minbus) << 20);
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region->base = pmap_mapdev_pciecfg(base + (minbus << 20), (maxbus + 1 - minbus) << 20);
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region->domain = domain;
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region->minbus = minbus;
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region->maxbus = maxbus;
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@ -574,7 +574,7 @@ pcie_cfgregopen(uint64_t base, uint16_t domain, uint8_t minbus, uint8_t maxbus)
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sizeof(*mcfg_regions) * (mcfg_numregions + 1), M_DEVBUF, M_WAITOK);
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region = &mcfg_regions[mcfg_numregions];
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region->base = base;
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region->base = base + (minbus << 20);
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region->domain = domain;
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region->minbus = minbus;
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region->maxbus = maxbus;
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