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Pull in r164132 from upstream llvm trunk:

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When creating MCAsmBackend pass the CPU string as well. In X86AsmBackend
  store this and use it to not emit long nops when the CPU is geode which
  doesnt support them.

  Fixes PR11212.

Pull in r164133 from upstream clang trunk:

  Follow up on llvm r164132.

This should prevent illegal instructions when building world on Geode
CPUs (e.g. Soekris).

MFC after:	3 days
This commit is contained in:
Dimitry Andric 2012-10-10 21:37:21 +00:00
parent 4802a8772c
commit 6239851166
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=241430
14 changed files with 73 additions and 52 deletions
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13
contrib/llvm/include/llvm/Support/TargetRegistry.h
View File

@ -93,7 +93,9 @@ namespace llvm {
CodeGenOpt::Level OL);
typedef AsmPrinter *(*AsmPrinterCtorTy)(TargetMachine &TM,
MCStreamer &Streamer);
typedef MCAsmBackend *(*MCAsmBackendCtorTy)(const Target &T, StringRef TT);
typedef MCAsmBackend *(*MCAsmBackendCtorTy)(const Target &T,
StringRef TT,
StringRef CPU);
typedef MCTargetAsmLexer *(*MCAsmLexerCtorTy)(const Target &T,
const MCRegisterInfo &MRI,
const MCAsmInfo &MAI);
@ -353,10 +355,10 @@ namespace llvm {
///
/// \arg Triple - The target triple string.
/// \arg Backend - The target independent assembler object.
MCAsmBackend *createMCAsmBackend(StringRef Triple) const {
MCAsmBackend *createMCAsmBackend(StringRef Triple, StringRef CPU) const {
if (!MCAsmBackendCtorFn)
return 0;
return MCAsmBackendCtorFn(*this, Triple);
return MCAsmBackendCtorFn(*this, Triple, CPU);
}
/// createMCAsmLexer - Create a target specific assembly lexer.
@ -1063,8 +1065,9 @@ namespace llvm {
}
private:
static MCAsmBackend *Allocator(const Target &T, StringRef Triple) {
return new MCAsmBackendImpl(T, Triple);
static MCAsmBackend *Allocator(const Target &T, StringRef Triple,
StringRef CPU) {
return new MCAsmBackendImpl(T, Triple, CPU);
}
};

6
contrib/llvm/lib/CodeGen/LLVMTargetMachine.cpp
View File

@ -172,7 +172,7 @@ bool LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
const MCSubtargetInfo &STI = getSubtarget<MCSubtargetInfo>();
MCE = getTarget().createMCCodeEmitter(*getInstrInfo(), MRI, STI,
*Context);
MAB = getTarget().createMCAsmBackend(getTargetTriple());
MAB = getTarget().createMCAsmBackend(getTargetTriple(), TargetCPU);
}
MCStreamer *S = getTarget().createAsmStreamer(*Context, Out,
@ -191,7 +191,7 @@ bool LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
// emission fails.
MCCodeEmitter *MCE = getTarget().createMCCodeEmitter(*getInstrInfo(), MRI,
STI, *Context);
MCAsmBackend *MAB = getTarget().createMCAsmBackend(getTargetTriple());
MCAsmBackend *MAB = getTarget().createMCAsmBackend(getTargetTriple(), TargetCPU);
if (MCE == 0 || MAB == 0)
return true;
@ -266,7 +266,7 @@ bool LLVMTargetMachine::addPassesToEmitMC(PassManagerBase &PM,
const MCSubtargetInfo &STI = getSubtarget<MCSubtargetInfo>();
MCCodeEmitter *MCE = getTarget().createMCCodeEmitter(*getInstrInfo(), MRI,
STI, *Ctx);
MCAsmBackend *MAB = getTarget().createMCAsmBackend(getTargetTriple());
MCAsmBackend *MAB = getTarget().createMCAsmBackend(getTargetTriple(), TargetCPU);
if (MCE == 0 || MAB == 0)
return true;

2
contrib/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
View File

@ -674,7 +674,7 @@ void DarwinARMAsmBackend::applyFixup(const MCFixup &Fixup, char *Data,
} // end anonymous namespace
MCAsmBackend *llvm::createARMAsmBackend(const Target &T, StringRef TT) {
MCAsmBackend *llvm::createARMAsmBackend(const Target &T, StringRef TT, StringRef CPU) {
Triple TheTriple(TT);
if (TheTriple.isOSDarwin()) {

2
contrib/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.h
View File

@ -46,7 +46,7 @@ MCCodeEmitter *createARMMCCodeEmitter(const MCInstrInfo &MCII,
const MCSubtargetInfo &STI,
MCContext &Ctx);
MCAsmBackend *createARMAsmBackend(const Target &T, StringRef TT);
MCAsmBackend *createARMAsmBackend(const Target &T, StringRef TT, StringRef CPU);
/// createARMELFObjectWriter - Construct an ELF Mach-O object writer.
MCObjectWriter *createARMELFObjectWriter(raw_ostream &OS,

3
contrib/llvm/lib/Target/MBlaze/MCTargetDesc/MBlazeAsmBackend.cpp
View File

@ -156,7 +156,8 @@ void ELFMBlazeAsmBackend::applyFixup(const MCFixup &Fixup, char *Data,
}
} // end anonymous namespace
MCAsmBackend *llvm::createMBlazeAsmBackend(const Target &T, StringRef TT) {
MCAsmBackend *llvm::createMBlazeAsmBackend(const Target &T, StringRef TT,
StringRef CPU) {
Triple TheTriple(TT);
if (TheTriple.isOSDarwin())

3
contrib/llvm/lib/Target/MBlaze/MCTargetDesc/MBlazeMCTargetDesc.h
View File

@ -35,7 +35,8 @@ MCCodeEmitter *createMBlazeMCCodeEmitter(const MCInstrInfo &MCII,
const MCSubtargetInfo &STI,
MCContext &Ctx);
MCAsmBackend *createMBlazeAsmBackend(const Target &T, StringRef TT);
MCAsmBackend *createMBlazeAsmBackend(const Target &T, StringRef TT,
StringRef CPU);
MCObjectWriter *createMBlazeELFObjectWriter(raw_ostream &OS, uint8_t OSABI);
} // End llvm namespace

12
contrib/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
View File

@ -244,22 +244,26 @@ class MipsAsmBackend : public MCAsmBackend {
} // namespace
// MCAsmBackend
MCAsmBackend *llvm::createMipsAsmBackendEL32(const Target &T, StringRef TT) {
MCAsmBackend *llvm::createMipsAsmBackendEL32(const Target &T, StringRef TT,
StringRef CPU) {
return new MipsAsmBackend(T, Triple(TT).getOS(),
/*IsLittle*/true, /*Is64Bit*/false);
}
MCAsmBackend *llvm::createMipsAsmBackendEB32(const Target &T, StringRef TT) {
MCAsmBackend *llvm::createMipsAsmBackendEB32(const Target &T, StringRef TT,
StringRef CPU) {
return new MipsAsmBackend(T, Triple(TT).getOS(),
/*IsLittle*/false, /*Is64Bit*/false);
}
MCAsmBackend *llvm::createMipsAsmBackendEL64(const Target &T, StringRef TT) {
MCAsmBackend *llvm::createMipsAsmBackendEL64(const Target &T, StringRef TT,
StringRef CPU) {
return new MipsAsmBackend(T, Triple(TT).getOS(),
/*IsLittle*/true, /*Is64Bit*/true);
}
MCAsmBackend *llvm::createMipsAsmBackendEB64(const Target &T, StringRef TT) {
MCAsmBackend *llvm::createMipsAsmBackendEB64(const Target &T, StringRef TT,
StringRef CPU) {
return new MipsAsmBackend(T, Triple(TT).getOS(),
/*IsLittle*/false, /*Is64Bit*/true);
}

12
contrib/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h
View File

@ -42,10 +42,14 @@ MCCodeEmitter *createMipsMCCodeEmitterEL(const MCInstrInfo &MCII,
const MCSubtargetInfo &STI,
MCContext &Ctx);
MCAsmBackend *createMipsAsmBackendEB32(const Target &T, StringRef TT);
MCAsmBackend *createMipsAsmBackendEL32(const Target &T, StringRef TT);
MCAsmBackend *createMipsAsmBackendEB64(const Target &T, StringRef TT);
MCAsmBackend *createMipsAsmBackendEL64(const Target &T, StringRef TT);
MCAsmBackend *createMipsAsmBackendEB32(const Target &T, StringRef TT,
StringRef CPU);
MCAsmBackend *createMipsAsmBackendEL32(const Target &T, StringRef TT,
StringRef CPU);
MCAsmBackend *createMipsAsmBackendEB64(const Target &T, StringRef TT,
StringRef CPU);
MCAsmBackend *createMipsAsmBackendEL64(const Target &T, StringRef TT,
StringRef CPU);
MCObjectWriter *createMipsELFObjectWriter(raw_ostream &OS,
uint8_t OSABI,

2
contrib/llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
View File

@ -181,7 +181,7 @@ namespace {
MCAsmBackend *llvm::createPPCAsmBackend(const Target &T, StringRef TT) {
MCAsmBackend *llvm::createPPCAsmBackend(const Target &T, StringRef TT, StringRef CPU) {
if (Triple(TT).isOSDarwin())
return new DarwinPPCAsmBackend(T);

2
contrib/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h
View File

@ -36,7 +36,7 @@ MCCodeEmitter *createPPCMCCodeEmitter(const MCInstrInfo &MCII,
const MCSubtargetInfo &STI,
MCContext &Ctx);
MCAsmBackend *createPPCAsmBackend(const Target &T, StringRef TT);
MCAsmBackend *createPPCAsmBackend(const Target &T, StringRef TT, StringRef CPU);
/// createPPCELFObjectWriter - Construct an PPC ELF object writer.
MCObjectWriter *createPPCELFObjectWriter(raw_ostream &OS,

56
contrib/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
View File

@ -66,9 +66,10 @@ class X86ELFObjectWriter : public MCELFObjectTargetWriter {
};
class X86AsmBackend : public MCAsmBackend {
StringRef CPU;
public:
X86AsmBackend(const Target &T)
: MCAsmBackend() {}
X86AsmBackend(const Target &T, StringRef _CPU)
: MCAsmBackend(), CPU(_CPU) {}
unsigned getNumFixupKinds() const {
return X86::NumTargetFixupKinds;
@ -305,6 +306,13 @@ bool X86AsmBackend::writeNopData(uint64_t Count, MCObjectWriter *OW) const {
{0x66, 0x2e, 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00},
};
// This CPU doesnt support long nops. If needed add more.
if (CPU == "geode") {
for (uint64_t i = 0; i < Count; ++i)
OW->Write8(0x90);
return true;
}
// Write an optimal sequence for the first 15 bytes.
const uint64_t OptimalCount = (Count < 16) ? Count : 15;
const uint64_t Prefixes = OptimalCount <= 10 ? 0 : OptimalCount - 10;
@ -327,8 +335,8 @@ namespace {
class ELFX86AsmBackend : public X86AsmBackend {
public:
uint8_t OSABI;
ELFX86AsmBackend(const Target &T, uint8_t _OSABI)
: X86AsmBackend(T), OSABI(_OSABI) {
ELFX86AsmBackend(const Target &T, uint8_t _OSABI, StringRef CPU)
: X86AsmBackend(T, CPU), OSABI(_OSABI) {
HasReliableSymbolDifference = true;
}
@ -340,8 +348,8 @@ class ELFX86AsmBackend : public X86AsmBackend {
class ELFX86_32AsmBackend : public ELFX86AsmBackend {
public:
ELFX86_32AsmBackend(const Target &T, uint8_t OSABI)
: ELFX86AsmBackend(T, OSABI) {}
ELFX86_32AsmBackend(const Target &T, uint8_t OSABI, StringRef CPU)
: ELFX86AsmBackend(T, OSABI, CPU) {}
MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
return createX86ELFObjectWriter(OS, /*Is64Bit*/ false, OSABI);
@ -350,8 +358,8 @@ class ELFX86_32AsmBackend : public ELFX86AsmBackend {
class ELFX86_64AsmBackend : public ELFX86AsmBackend {
public:
ELFX86_64AsmBackend(const Target &T, uint8_t OSABI)
: ELFX86AsmBackend(T, OSABI) {}
ELFX86_64AsmBackend(const Target &T, uint8_t OSABI, StringRef CPU)
: ELFX86AsmBackend(T, OSABI, CPU) {}
MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
return createX86ELFObjectWriter(OS, /*Is64Bit*/ true, OSABI);
@ -362,8 +370,8 @@ class WindowsX86AsmBackend : public X86AsmBackend {
bool Is64Bit;
public:
WindowsX86AsmBackend(const Target &T, bool is64Bit)
: X86AsmBackend(T)
WindowsX86AsmBackend(const Target &T, bool is64Bit, StringRef CPU)
: X86AsmBackend(T, CPU)
, Is64Bit(is64Bit) {
}
@ -374,14 +382,14 @@ class WindowsX86AsmBackend : public X86AsmBackend {
class DarwinX86AsmBackend : public X86AsmBackend {
public:
DarwinX86AsmBackend(const Target &T)
: X86AsmBackend(T) { }
DarwinX86AsmBackend(const Target &T, StringRef CPU)
: X86AsmBackend(T, CPU) { }
};
class DarwinX86_32AsmBackend : public DarwinX86AsmBackend {
public:
DarwinX86_32AsmBackend(const Target &T)
: DarwinX86AsmBackend(T) {}
DarwinX86_32AsmBackend(const Target &T, StringRef CPU)
: DarwinX86AsmBackend(T, CPU) {}
MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
return createX86MachObjectWriter(OS, /*Is64Bit=*/false,
@ -392,8 +400,8 @@ class DarwinX86_32AsmBackend : public DarwinX86AsmBackend {
class DarwinX86_64AsmBackend : public DarwinX86AsmBackend {
public:
DarwinX86_64AsmBackend(const Target &T)
: DarwinX86AsmBackend(T) {
DarwinX86_64AsmBackend(const Target &T, StringRef CPU)
: DarwinX86AsmBackend(T, CPU) {
HasReliableSymbolDifference = true;
}
@ -439,28 +447,28 @@ class DarwinX86_64AsmBackend : public DarwinX86AsmBackend {
} // end anonymous namespace
MCAsmBackend *llvm::createX86_32AsmBackend(const Target &T, StringRef TT) {
MCAsmBackend *llvm::createX86_32AsmBackend(const Target &T, StringRef TT, StringRef CPU) {
Triple TheTriple(TT);
if (TheTriple.isOSDarwin() || TheTriple.getEnvironment() == Triple::MachO)
return new DarwinX86_32AsmBackend(T);
return new DarwinX86_32AsmBackend(T, CPU);
if (TheTriple.isOSWindows())
return new WindowsX86AsmBackend(T, false);
return new WindowsX86AsmBackend(T, false, CPU);
uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TheTriple.getOS());
return new ELFX86_32AsmBackend(T, OSABI);
return new ELFX86_32AsmBackend(T, OSABI, CPU);
}
MCAsmBackend *llvm::createX86_64AsmBackend(const Target &T, StringRef TT) {
MCAsmBackend *llvm::createX86_64AsmBackend(const Target &T, StringRef TT, StringRef CPU) {
Triple TheTriple(TT);
if (TheTriple.isOSDarwin() || TheTriple.getEnvironment() == Triple::MachO)
return new DarwinX86_64AsmBackend(T);
return new DarwinX86_64AsmBackend(T, CPU);
if (TheTriple.isOSWindows())
return new WindowsX86AsmBackend(T, true);
return new WindowsX86AsmBackend(T, true, CPU);
uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TheTriple.getOS());
return new ELFX86_64AsmBackend(T, OSABI);
return new ELFX86_64AsmBackend(T, OSABI, CPU);
}

4
contrib/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h
View File

@ -80,8 +80,8 @@ MCCodeEmitter *createX86MCCodeEmitter(const MCInstrInfo &MCII,
const MCSubtargetInfo &STI,
MCContext &Ctx);
MCAsmBackend *createX86_32AsmBackend(const Target &T, StringRef TT);
MCAsmBackend *createX86_64AsmBackend(const Target &T, StringRef TT);
MCAsmBackend *createX86_32AsmBackend(const Target &T, StringRef TT, StringRef CPU);
MCAsmBackend *createX86_64AsmBackend(const Target &T, StringRef TT, StringRef CPU);
/// createX86MachObjectWriter - Construct an X86 Mach-O object writer.
MCObjectWriter *createX86MachObjectWriter(raw_ostream &OS,

4
contrib/llvm/tools/clang/tools/driver/cc1as_main.cpp
View File

@ -329,7 +329,7 @@ static bool ExecuteAssembler(AssemblerInvocation &Opts,
MCAsmBackend *MAB = 0;
if (Opts.ShowEncoding) {
CE = TheTarget->createMCCodeEmitter(*MCII, *MRI, *STI, Ctx);
MAB = TheTarget->createMCAsmBackend(Opts.Triple);
MAB = TheTarget->createMCAsmBackend(Opts.Triple, Opts.CPU);
}
Str.reset(TheTarget->createAsmStreamer(Ctx, *Out, /*asmverbose*/true,
/*useLoc*/ true,
@ -343,7 +343,7 @@ static bool ExecuteAssembler(AssemblerInvocation &Opts,
assert(Opts.OutputType == AssemblerInvocation::FT_Obj &&
"Invalid file type!");
MCCodeEmitter *CE = TheTarget->createMCCodeEmitter(*MCII, *MRI, *STI, Ctx);
MCAsmBackend *MAB = TheTarget->createMCAsmBackend(Opts.Triple);
MCAsmBackend *MAB = TheTarget->createMCAsmBackend(Opts.Triple, Opts.CPU);
Str.reset(TheTarget->createMCObjectStreamer(Opts.Triple, Ctx, *MAB, *Out,
CE, Opts.RelaxAll,
Opts.NoExecStack));

4
contrib/llvm/tools/llvm-mc/llvm-mc.cpp
View File

@ -409,7 +409,7 @@ int main(int argc, char **argv) {
MCAsmBackend *MAB = 0;
if (ShowEncoding) {
CE = TheTarget->createMCCodeEmitter(*MCII, *MRI, *STI, Ctx);
MAB = TheTarget->createMCAsmBackend(TripleName);
MAB = TheTarget->createMCAsmBackend(TripleName, MCPU);
}
Str.reset(TheTarget->createAsmStreamer(Ctx, FOS, /*asmverbose*/true,
/*useLoc*/ true,
@ -422,7 +422,7 @@ int main(int argc, char **argv) {
} else {
assert(FileType == OFT_ObjectFile && "Invalid file type!");
MCCodeEmitter *CE = TheTarget->createMCCodeEmitter(*MCII, *MRI, *STI, Ctx);
MCAsmBackend *MAB = TheTarget->createMCAsmBackend(TripleName);
MCAsmBackend *MAB = TheTarget->createMCAsmBackend(TripleName, MCPU);
Str.reset(TheTarget->createMCObjectStreamer(TripleName, Ctx, *MAB,
FOS, CE, RelaxAll,
NoExecStack));