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- Use bus_dmamap_unload(), it is not optional.
- The new allocator won't return coherent memory for any size > PAGE_SIZE, so don't assume we have coherent memory, and explicitely use bus_dmamap_sync().
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parent
6958ef4ef5
commit
63e950fe80
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=256943
@ -507,7 +507,6 @@ npe_dma_setup(struct npe_softc *sc, struct npedma *dma,
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dma->name, error);
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return error;
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}
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/* XXX COHERENT for now */
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if (bus_dmamem_alloc(dma->buf_tag, (void **)&dma->hwbuf,
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BUS_DMA_NOWAIT | BUS_DMA_ZERO | BUS_DMA_COHERENT,
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&dma->buf_map) != 0) {
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@ -1073,6 +1072,7 @@ npe_rxbuf_init(struct npe_softc *sc, struct npebuf *npe, struct mbuf *m)
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m->m_pkthdr.len = m->m_len = 1536;
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/* backload payload and align ip hdr */
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m->m_data = m->m_ext.ext_buf + (m->m_ext.ext_size - (1536+ETHER_ALIGN));
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bus_dmamap_unload(dma->mtag, npe->ix_map);
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error = bus_dmamap_load_mbuf_sg(dma->mtag, npe->ix_map, m,
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segs, &nseg, 0);
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if (error != 0) {
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@ -1085,6 +1085,8 @@ npe_rxbuf_init(struct npe_softc *sc, struct npebuf *npe, struct mbuf *m)
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/* NB: buffer length is shifted in word */
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hw->ix_ne[0].len = htobe32(segs[0].ds_len << 16);
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hw->ix_ne[0].next = 0;
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bus_dmamap_sync(dma->buf_tag, dma->buf_map,
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BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
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npe->ix_m = m;
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/* Flush the memory in the mbuf */
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bus_dmamap_sync(dma->mtag, npe->ix_map, BUS_DMASYNC_PREREAD);
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@ -1110,6 +1112,8 @@ npe_rxdone(int qid, void *arg)
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struct npebuf *npe = P2V(NPE_QM_Q_ADDR(entry), dma);
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struct mbuf *m;
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bus_dmamap_sync(dma->buf_tag, dma->buf_map,
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BUS_DMASYNC_POSTREAD);
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DPRINTF(sc, "%s: entry 0x%x neaddr 0x%x ne_len 0x%x\n",
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__func__, entry, npe->ix_neaddr, npe->ix_hw->ix_ne[0].len);
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/*
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@ -1130,7 +1134,6 @@ npe_rxdone(int qid, void *arg)
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bus_dmamap_sync(dma->mtag, npe->ix_map,
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BUS_DMASYNC_POSTREAD);
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/* XXX flush hw buffer; works now 'cuz coherent */
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/* set m_len etc. per rx frame size */
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mrx->m_len = be32toh(hw->ix_ne[0].len) & 0xffff;
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mrx->m_pkthdr.len = mrx->m_len;
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@ -1313,6 +1316,7 @@ npestart_locked(struct ifnet *ifp)
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return;
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}
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npe = sc->tx_free;
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bus_dmamap_unload(dma->mtag, npe->ix_map);
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error = bus_dmamap_load_mbuf_sg(dma->mtag, npe->ix_map,
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m, segs, &nseg, 0);
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if (error == EFBIG) {
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@ -1355,7 +1359,8 @@ npestart_locked(struct ifnet *ifp)
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next += sizeof(hw->ix_ne[0]);
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}
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hw->ix_ne[i-1].next = 0; /* zero last in chain */
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/* XXX flush descriptor instead of using uncached memory */
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bus_dmamap_sync(dma->buf_tag, dma->buf_map,
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BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
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DPRINTF(sc, "%s: qwrite(%u, 0x%x) ne_data %x ne_len 0x%x\n",
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__func__, sc->tx_qid, npe->ix_neaddr,
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