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powerpc/booke: Use the 'tlbilx' instruction on newer cores

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Newer cores have the 'tlbilx' instruction, which doesn't broadcast over
CoreNet.  This is significantly faster than walking the TLB to invalidate
the PID mappings.  tlbilx with the arguments given takes 131 clock cycles to
complete, as opposed to 512 iterations through the loop plus tlbre/tlbwe at
each iteration.

MFC after:	3 weeks
This commit is contained in:
Justin Hibbits 2019-02-13 03:11:12 +00:00
parent a73b2e25e1
commit 64143619ab
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=344083
1 changed files with 15 additions and 0 deletions
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15
sys/powerpc/booke/pmap.c
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@ -4325,6 +4325,21 @@ tid_flush(tlbtid_t tid)
msr = mfmsr();
__asm __volatile("wrteei 0");
/*
* Newer (e500mc and later) have tlbilx, which doesn't broadcast, so use
* it for PID invalidation.
*/
switch ((mfpvr() >> 16) & 0xffff) {
case FSL_E500mc:
case FSL_E5500:
case FSL_E6500:
mtspr(SPR_MAS6, tid << MAS6_SPID0_SHIFT);
/* tlbilxpid */
__asm __volatile("isync; .long 0x7c000024; isync; msync");
mtmsr(msr);
return;
}
for (way = 0; way < TLB0_WAYS; way++)
for (entry = 0; entry < TLB0_ENTRIES_PER_WAY; entry++) {