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Fix a handful of issues with via agp support.
* Read the pci capability register to identify AGP 3 support * Add missing smaller aperture sizes for AGP3 chips. * Fix the aperture size calculation on AGP2 chips. All sizes between 32M and 256M reported as 256M. * Add \n to error string. This all seems to get the CLE266 EPIA-M board agp working properly, now back to work on drm. MFC after: 2 weeks
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parent
907b48bc05
commit
66ab1230f1
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=200764
@ -165,39 +165,16 @@ agp_via_attach(device_t dev)
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struct agp_gatt *gatt;
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int error;
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u_int32_t agpsel;
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u_int32_t capid;
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/* XXX: This should be keying off of whether the bridge is AGP3 capable,
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* rather than a bunch of device ids for chipsets that happen to do 8x.
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*/
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switch (pci_get_devid(dev)) {
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case 0x01981106:
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case 0x02591106:
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case 0x02691106:
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case 0x02961106:
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case 0x03141106:
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case 0x03241106:
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case 0x03271106:
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case 0x03641106:
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case 0x31231106:
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case 0x31681106:
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case 0x31891106:
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case 0x32051106:
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case 0x32581106:
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case 0xb1981106:
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/* The newer VIA chipsets will select the AGP version based on
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* what AGP versions the card supports. We still have to
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* program it using the v2 registers if it has chosen to use
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* compatibility mode.
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*/
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sc->regs = via_v2_regs;
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/* Look at the capability register to see if we handle AGP3 */
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capid = pci_read_config(dev, agp_find_caps(dev) + AGP_CAPID, 4);
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if (((capid >> 20) & 0x0f) >= 3) {
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agpsel = pci_read_config(dev, AGP_VIA_AGPSEL, 1);
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if ((agpsel & (1 << 1)) == 0)
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sc->regs = via_v3_regs;
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else
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sc->regs = via_v2_regs;
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break;
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default:
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sc->regs = via_v2_regs;
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break;
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}
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error = agp_generic_attach(dev);
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@ -235,7 +212,7 @@ agp_via_attach(device_t dev)
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pci_write_config(dev, sc->regs[REG_ATTBASE], gatt->ag_physical, 4);
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/* Enable the aperture. */
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gartctrl = pci_read_config(dev, sc->regs[REG_ATTBASE], 4);
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gartctrl = pci_read_config(dev, sc->regs[REG_GARTCTRL], 4);
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pci_write_config(dev, sc->regs[REG_GARTCTRL], gartctrl | (3 << 7), 4);
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}
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@ -268,7 +245,7 @@ agp_via_get_aperture(device_t dev)
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u_int32_t apsize;
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if (sc->regs == via_v2_regs) {
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apsize = pci_read_config(dev, sc->regs[REG_APSIZE], 1) & 0x1f;
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apsize = pci_read_config(dev, sc->regs[REG_APSIZE], 1);
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/*
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* The size is determined by the number of low bits of
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@ -295,8 +272,14 @@ agp_via_get_aperture(device_t dev)
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return 0x04000000;
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case 0xf38:
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return 0x02000000;
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case 0xf3c:
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return 0x01000000;
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case 0xf3e:
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return 0x00800000;
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case 0xf3f:
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return 0x00400000;
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default:
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device_printf(dev, "Invalid aperture setting 0x%x",
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device_printf(dev, "Invalid aperture setting 0x%x\n",
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pci_read_config(dev, sc->regs[REG_APSIZE], 2));
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return 0;
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}
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@ -345,6 +328,15 @@ agp_via_set_aperture(device_t dev, u_int32_t aperture)
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case 0x02000000:
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key = 0xf38;
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break;
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case 0x01000000:
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key = 0xf3c;
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break;
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case 0x00800000:
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key = 0xf3e;
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break;
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case 0x00400000:
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key = 0xf3f;
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break;
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default:
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device_printf(dev, "Invalid aperture size (%dMb)\n",
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aperture / 1024 / 1024);
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