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Add a comment documenting where the WMAC hangs off of.
At some point it would be nice to correctly update the bus glue to make this "correct", including having the DDR flush occur in the right spot (ie, any AHB interrupt.)
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=227919
@ -32,6 +32,7 @@ hint.arge.1.maddr=0x1a000000
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hint.arge.1.msize=0x1000
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hint.arge.1.irq=3
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# XXX The ath device hangs off of the AHB, rather than the Nexus.
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hint.ath.0.at="nexus0"
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hint.ath.0.maddr=0x180c0000
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hint.ath.0.msize=0x30000
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