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- Fixed DMA engine errors by increasing timeouts to 200ms for reads/writes.
- Improved some error reporting calls to include file name/line number. - Various style(9) fixes. MFC after: One week.
This commit is contained in:
parent
04af6e9603
commit
68f867e9e1
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=220228
@ -458,9 +458,7 @@ SYSCTL_UINT(_hw_bxe, OID_AUTO, tpa_enable, CTLFLAG_RDTUN, &bxe_tpa_enable,
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/*
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* Specifies the number of queues that will be used when a multi-queue
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* RSS mode is selected using bxe_multi_mode below. Some RSS modes
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* require additional queue configuration which may conflict with this
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* setting. In that case this value will be overriden.
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* RSS mode is selected using bxe_multi_mode below.
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*
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* Allowable values are 0 (Auto) or 1 to MAX_CONTEXT (fixed queue number).
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*/
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@ -1145,7 +1143,7 @@ bxe_interrupt_allocate(struct bxe_softc *sc)
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break;
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}
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} else {
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/* User has forced INTx mode. */
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/* User has forced INTx mode. */
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sc->multi_mode = ETH_RSS_MODE_DISABLED;
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sc->num_queues = 1;
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}
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@ -1451,7 +1449,7 @@ bxe_interrupt_attach(struct bxe_softc *sc)
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"%s(): Enabling slowpath MSI[0] vector.\n",
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__FUNCTION__);
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/*
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* Setup the interrupt handler. Note that we pass the driver
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* Setup the interrupt handler. Note that we pass the driver
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* instance to the interrupt handler for the slowpath.
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*/
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rc = bus_setup_intr(sc->bxe_dev,sc->bxe_msi_res[0],
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@ -1477,7 +1475,7 @@ bxe_interrupt_attach(struct bxe_softc *sc)
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"%s(): Enabling MSI[%d] vector.\n",
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__FUNCTION__, i + 1);
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/*
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* Setup the interrupt handler. Note that we pass the
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* Setup the interrupt handler. Note that we pass the
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* fastpath context to the interrupt handler in this
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* case.
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*/
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@ -1762,7 +1760,7 @@ bxe_attach(device_t dev)
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/* Put indirect address registers into a sane state. */
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pci_write_config(sc->bxe_dev, PCICFG_GRC_ADDRESS,
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PCICFG_VENDOR_ID_OFFSET, 4);
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PCICFG_VENDOR_ID_OFFSET, 4);
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REG_WR(sc, PXP2_REG_PGL_ADDR_88_F0 + BP_PORT(sc) * 16, 0);
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REG_WR(sc, PXP2_REG_PGL_ADDR_8C_F0 + BP_PORT(sc) * 16, 0);
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REG_WR(sc, PXP2_REG_PGL_ADDR_90_F0 + BP_PORT(sc) * 16, 0);
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@ -1829,7 +1827,8 @@ bxe_attach(device_t dev)
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/* Set init arrays */
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rc = bxe_init_firmware(sc);
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if (rc) {
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BXE_PRINTF("Error loading firmware\n");
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BXE_PRINTF("%s(%d): Error loading firmware\n",
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__FILE__, __LINE__);
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goto bxe_attach_fail;
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}
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@ -1846,8 +1845,8 @@ bxe_attach(device_t dev)
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/* Check that NVRAM contents are valid.*/
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if (bxe_nvram_test(sc)) {
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DBPRINT(sc, BXE_WARN, "%s(): Failed NVRAM test!\n",
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__FUNCTION__);
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BXE_PRINTF("%s(%d): Failed NVRAM test!\n",
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__FILE__, __LINE__);
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rc = ENODEV;
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goto bxe_attach_fail;
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}
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@ -1855,7 +1854,7 @@ bxe_attach(device_t dev)
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/* Allocate the appropriate interrupts.*/
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if (bxe_interrupt_allocate(sc)) {
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BXE_PRINTF("%s(%d): Interrupt allocation failed!\n",
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__FILE__, __LINE__);
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__FILE__, __LINE__);
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rc = ENODEV;
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goto bxe_attach_fail;
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}
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@ -1902,10 +1901,13 @@ bxe_attach(device_t dev)
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/* Disable WoL. */
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sc->wol = 0;
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/* Assume a standard 1500 byte MTU size for mbuf allocations. */
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sc->mbuf_alloc_size = MCLBYTES;
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/* Allocate DMA memory resources. */
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if (bxe_dma_alloc(sc->bxe_dev)) {
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BXE_PRINTF("%s(%d): DMA allocation failed!\n",
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__FILE__, __LINE__);
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__FILE__, __LINE__);
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rc = ENOMEM;
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goto bxe_attach_fail;
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}
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@ -1914,7 +1916,7 @@ bxe_attach(device_t dev)
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ifp = sc->bxe_ifp = if_alloc(IFT_ETHER);
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if (ifp == NULL) {
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BXE_PRINTF("%s(%d): Interface allocation failed!\n",
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__FILE__, __LINE__);
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__FILE__, __LINE__);
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rc = ENXIO;
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goto bxe_attach_fail;
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}
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@ -1935,8 +1937,6 @@ bxe_attach(device_t dev)
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ifp->if_capenable = ifp->if_capabilities;
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ifp->if_baudrate = IF_Gbps(10UL);
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/* Assume a standard 1500 byte MTU size for mbuf allocations. */
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sc->mbuf_alloc_size = MCLBYTES;
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ifp->if_snd.ifq_drv_maxlen = sc->tx_ring_size;
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IFQ_SET_MAXLEN(&ifp->if_snd, ifp->if_snd.ifq_drv_maxlen);
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@ -1947,8 +1947,8 @@ bxe_attach(device_t dev)
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/* Attach the interrupts to the interrupt handlers. */
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if (bxe_interrupt_attach(sc)) {
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BXE_PRINTF("%s(%d): Interrupt allocation failed!\n", __FILE__,
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__LINE__);
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BXE_PRINTF("%s(%d): Interrupt allocation failed!\n",
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__FILE__, __LINE__);
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goto bxe_attach_fail;
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}
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@ -2901,6 +2901,9 @@ bxe_setup_leading(struct bxe_softc *sc)
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DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | BXE_VERBOSE_RAMROD);
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DBPRINT(sc, BXE_INFO_LOAD, "%s(): Setup leading connection "
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"on fp[00].\n", __FUNCTION__);
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/* Reset IGU state for the leading connection. */
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bxe_ack_sb(sc, sc->fp[0].sb_id, CSTORM_ID, 0, IGU_INT_ENABLE, 0);
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@ -2929,6 +2932,9 @@ bxe_stop_leading(struct bxe_softc *sc)
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DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | BXE_VERBOSE_RAMROD);
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DBPRINT(sc, BXE_INFO_LOAD, "%s(): Stop client connection "
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"on fp[00].\n", __FUNCTION__);
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/* Send the ETH_HALT ramrod. */
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sc->fp[0].state = BXE_FP_STATE_HALTING;
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bxe_sp_post(sc,RAMROD_CMD_ID_ETH_HALT, 0, 0, sc->fp[0].cl_id, 0);
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@ -2987,6 +2993,9 @@ bxe_setup_multi(struct bxe_softc *sc, int index)
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DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | BXE_VERBOSE_RAMROD);
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DBPRINT(sc, BXE_INFO_LOAD, "%s(): Setup client connection "
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"on fp[%02d].\n", __FUNCTION__, index);
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fp = &sc->fp[index];
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/* Reset IGU state. */
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bxe_ack_sb(sc, fp->sb_id, CSTORM_ID, 0, IGU_INT_ENABLE, 0);
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@ -3019,7 +3028,11 @@ bxe_stop_multi(struct bxe_softc *sc, int index)
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DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | BXE_VERBOSE_RAMROD);
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DBPRINT(sc, BXE_INFO_LOAD, "%s(): Stop client connection "
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"on fp[%02d].\n", __FUNCTION__, index);
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fp = &sc->fp[index];
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/* Halt the client connection. */
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fp->state = BXE_FP_STATE_HALTING;
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bxe_sp_post(sc, RAMROD_CMD_ID_ETH_HALT, index, 0, fp->cl_id, 0);
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@ -4398,7 +4411,7 @@ bxe_write_dmae(struct bxe_softc *sc, bus_addr_t dma_addr, uint32_t dst_addr,
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bxe_post_dmae(sc, &dmae, INIT_DMAE_C(sc));
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DELAY(5);
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DELAY(50);
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timeout = 4000;
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while (*wb_comp != BXE_WB_COMP_VAL) {
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@ -4409,7 +4422,7 @@ bxe_write_dmae(struct bxe_softc *sc, bus_addr_t dma_addr, uint32_t dst_addr,
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break;
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}
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timeout--;
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DELAY(5);
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DELAY(50);
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}
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BXE_DMAE_UNLOCK(sc);
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@ -4485,9 +4498,9 @@ bxe_read_dmae(struct bxe_softc *sc, uint32_t src_addr,
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bxe_post_dmae(sc, &dmae, INIT_DMAE_C(sc));
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DELAY(5);
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DELAY(50);
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timeout = 200;
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timeout = 4000;
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while (*wb_comp != BXE_WB_COMP_VAL) {
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if (!timeout) {
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DBPRINT(sc, 1,
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@ -4496,7 +4509,7 @@ bxe_read_dmae(struct bxe_softc *sc, uint32_t src_addr,
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break;
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}
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timeout--;
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DELAY(5);
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DELAY(50);
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}
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BXE_DMAE_UNLOCK(sc);
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@ -8527,8 +8540,7 @@ bxe_chktso_window(struct bxe_softc* sc, int nsegs, bus_dma_segment_t *segs,
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}
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/*
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* bxe_tx_encap()
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* Encapsultes an mbuf cluster into the bxe tx_bd chain structure and
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* Encapsultes an mbuf cluster into the tx_bd chain structure and
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* makes the memory visible to the controller.
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*
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* If an mbuf is submitted to this routine and cannot be given to the
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@ -10769,6 +10781,7 @@ bxe_init_context(struct bxe_softc *sc)
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U64_HI(fp->rx_bd_chain_paddr[0]);
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context->ustorm_st_context.common.bd_page_base_lo =
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U64_LO(fp->rx_bd_chain_paddr[0]);
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if (TPA_ENABLED(sc) && !(fp->disable_tpa)) {
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/* Enable TPA and SGE chain support. */
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context->ustorm_st_context.common.flags |=
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@ -11333,7 +11346,7 @@ bxe_init_nic(struct bxe_softc *sc, uint32_t load_code)
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fp->sb_id = fp->cl_id;
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DBPRINT(sc, (BXE_INFO_LOAD | BXE_INFO_RESET),
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"%s(): fp[%d]: cl_id = %d, sb_id = %d,\n",
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"%s(): fp[%d]: cl_id = %d, sb_id = %d\n",
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__FUNCTION__, fp->index, fp->cl_id, fp->sb_id);
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/* Initialize the fastpath status block. */
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@ -14761,7 +14774,8 @@ bxe_rxeof(struct bxe_fastpath *fp)
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__FUNCTION__));
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/* Check the CQE type for slowpath or fastpath completion. */
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if (__predict_false(CQE_TYPE(cqe_fp_flags) == 1)) {
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if (__predict_false(CQE_TYPE(cqe_fp_flags) ==
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RX_ETH_CQE_TYPE_ETH_RAMROD)) {
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/* This is a slowpath completion. */
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bxe_sp_event(fp, cqe);
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goto bxe_rxeof_next_cqe;
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@ -14891,6 +14905,7 @@ bxe_rxeof(struct bxe_fastpath *fp)
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DBRUN(bxe_breakpoint(sc));
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/* ToDo: Find alterntive to panic(). */
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panic(
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"bxe%d: Double mbuf allocation failure!\n",
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sc->bxe_unit);
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@ -15352,6 +15367,7 @@ bxe_sysctl_driver_state(SYSCTL_HANDLER_ARGS)
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fp = &sc->fp[i];
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bxe_dump_fp_state(fp);
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}
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bxe_dump_status_block(sc);
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}
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return (error);
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