mirror of
https://git.FreeBSD.org/src.git
synced 2024-12-16 10:20:30 +00:00
Turn off and remove the 'old' if_ep ISA/EISA/PCCARD driver.
Turn on the 'new' if_ep driver which supports: ISA 3c509 MCA 3c529 EISA 3c579 PCCARD 3c589 I think all we're missing is support for the VME bus and S-100 bus Etherlink III cards. The new code has been tested by a number of people and all the important bits work. I've not been able to test the EISA code but will do so once my hardware arrives. Since I've changed nothing in the EISA code I suspect it will perform the same manner as before. Future changes involve whacking the ISA and PCCARD front ends to use newbus and to convert the driver to bus_space and make it use ifmedia. This is the first working network driver that supports MCA bus devices btw. Enjoy.
This commit is contained in:
Matthew N. Dodd
parent
288778409b
commit
6a025a98a6
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=51831
@ -94,11 +94,17 @@ dev/aic7xxx/aic7xxx.c optional ahc \
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dependency "aic7xxx_{reg,seq}.h"
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dev/aic7xxx/93cx6.c optional ahc
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dev/buslogic/bt.c optional bt
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dev/buslogic/bt_mca.c optional bt mca
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dev/ccd/ccd.c optional ccd
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#dev/dpt/dpt_control.c optional dpt
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dev/dpt/dpt_scsi.c optional dpt
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dev/ed/if_ed_pci.c optional ed pci
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dev/en/midway.c optional en
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dev/ep/if_ep.c optional ep
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dev/ep/if_ep_isa.c optional ep isa
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dev/ep/if_ep_eisa.c optional ep eisa
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dev/ep/if_ep_mca.c optional ep mca
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dev/ep/if_ep_pccard.c optional ep card
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dev/hea/eni.c optional hea
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dev/hea/eni_buffer.c optional hea
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dev/hea/eni_globals.c optional hea
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@ -125,6 +131,7 @@ dev/ida/ida.c optional ida
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dev/ida/ida_disk.c optional id
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dev/isp/isp_freebsd.c optional isp
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dev/isp/isp.c optional isp
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dev/mca/mca_bus.c optional mca
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dev/md/md.c optional md
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dev/mii/mii.c optional miibus
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dev/mii/mii_physubr.c optional miibus
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@ -794,5 +801,3 @@ dev/pcm/isa/sb.c optional pcm isa
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dev/pcm/pci/es1370.c optional pcm pci
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dev/pcm/pci/t4dwave.c optional pcm pci
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#dev/pcm/pci/aureal.c optional pcm pci
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dev/mca/mca_bus.c optional mca
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dev/buslogic/bt_mca.c optional bt mca
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@ -110,7 +110,6 @@ gnu/i386/isa/dgb.c optional dgb
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gnu/i386/isa/dgm.c optional dgm
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gnu/i386/isa/sound/awe_wave.c optional awe
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i386/apm/apm.c optional apm
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i386/eisa/3c5x9.c optional ep
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i386/eisa/adv_eisa.c optional adv
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i386/eisa/ahb.c optional ahb
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i386/eisa/ahc_eisa.c optional eisa ahc \
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@ -199,7 +198,6 @@ i386/isa/if_ar.c optional ar
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i386/isa/if_cs.c optional cs
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i386/isa/if_cx.c optional cx
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i386/isa/if_el.c optional el
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i386/isa/if_ep.c optional ep
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i386/isa/if_ex.c optional ex
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i386/isa/if_fe.c optional fe
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i386/isa/if_ie.c optional ie
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@ -110,7 +110,6 @@ gnu/i386/isa/dgb.c optional dgb
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gnu/i386/isa/dgm.c optional dgm
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gnu/i386/isa/sound/awe_wave.c optional awe
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i386/apm/apm.c optional apm
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i386/eisa/3c5x9.c optional ep
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i386/eisa/adv_eisa.c optional adv
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i386/eisa/ahb.c optional ahb
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i386/eisa/ahc_eisa.c optional eisa ahc \
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@ -199,7 +198,6 @@ i386/isa/if_ar.c optional ar
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i386/isa/if_cs.c optional cs
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i386/isa/if_cx.c optional cx
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i386/isa/if_el.c optional el
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i386/isa/if_ep.c optional ep
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i386/isa/if_ex.c optional ex
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i386/isa/if_fe.c optional fe
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i386/isa/if_ie.c optional ie
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@ -1,309 +0,0 @@
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/*
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* Product specific probe and attach routines for:
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* 3COM 3C579 and 3C509(in eisa config mode) ethernet controllers
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*
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* Copyright (c) 1996 Justin T. Gibbs
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice immediately at the beginning of the file, without modification,
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* this list of conditions, and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Absolutely no warranty of function or purpose is made by the author
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* Justin T. Gibbs.
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* 4. Modifications may be freely made to this file if the above conditions
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* are met.
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*
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* $FreeBSD$
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*/
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#include "eisa.h"
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#if NEISA > 0
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/socket.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <machine/clock.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <sys/rman.h>
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#include <net/if.h>
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#include <netinet/in.h>
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#include <netinet/if_ether.h>
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#include <i386/isa/if_epreg.h>
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#include <i386/eisa/eisaconf.h>
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#define EISA_DEVICE_ID_3COM_3C509_TP 0x506d5090
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#define EISA_DEVICE_ID_3COM_3C509_BNC 0x506d5091
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#define EISA_DEVICE_ID_3COM_3C579_TP 0x506d5092
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#define EISA_DEVICE_ID_3COM_3C579_BNC 0x506d5093
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#define EISA_DEVICE_ID_3COM_3C509_COMBO 0x506d5094
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#define EISA_DEVICE_ID_3COM_3C509_TPO 0x506d5095
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#define EP_EISA_SLOT_OFFSET 0x0c80
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#define EP_EISA_IOSIZE 0x000a
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#define EISA_IOCONF 0x0008
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#define IRQ_CHANNEL 0xf000
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#define INT_3 0x3000
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#define INT_5 0x5000
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#define INT_7 0x7000
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#define INT_9 0x9000
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#define INT_10 0xa000
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#define INT_11 0xb000
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#define INT_12 0xc000
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#define INT_15 0xf000
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#define EISA_BPROM_MEDIA_CONF 0x0006
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#define TRANS_TYPE 0xc000
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#define TRANS_TP 0x0000
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#define TRANS_AUI 0x4000
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#define TRANS_BNC 0xc000
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static const char *ep_match __P((eisa_id_t type));
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static const char*
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ep_match(eisa_id_t type)
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{
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switch(type) {
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case EISA_DEVICE_ID_3COM_3C509_TP:
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return "3Com 3C509-TP Network Adapter";
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break;
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case EISA_DEVICE_ID_3COM_3C509_BNC:
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return "3Com 3C509-BNC Network Adapter";
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break;
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case EISA_DEVICE_ID_3COM_3C579_TP:
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return "3Com 3C579-TP EISA Network Adapter";
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break;
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case EISA_DEVICE_ID_3COM_3C579_BNC:
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return "3Com 3C579-BNC EISA Network Adapter";
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break;
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case EISA_DEVICE_ID_3COM_3C509_COMBO:
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return "3Com 3C509-Combo Network Adapter";
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break;
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case EISA_DEVICE_ID_3COM_3C509_TPO:
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return "3Com 3C509-TPO Network Adapter";
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break;
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default:
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break;
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}
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return (NULL);
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}
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static int
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ep_eisa_probe(device_t dev)
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{
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const char *desc;
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u_long iobase;
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u_short conf;
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u_long port;
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int irq;
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desc = ep_match(eisa_get_id(dev));
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if (!desc)
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return (ENXIO);
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device_set_desc(dev, desc);
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port = (eisa_get_slot(dev) * EISA_SLOT_SIZE);
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iobase = port + EP_EISA_SLOT_OFFSET;
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/* We must be in EISA configuration mode */
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if ((inw(iobase + EP_W0_ADDRESS_CFG) & 0x1f) != 0x1f)
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return ENXIO;
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eisa_add_iospace(dev, iobase, EP_EISA_IOSIZE, RESVADDR_NONE);
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eisa_add_iospace(dev, port, EP_IOSIZE, RESVADDR_NONE);
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conf = inw(iobase + EISA_IOCONF);
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/* Determine our IRQ */
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switch (conf & IRQ_CHANNEL) {
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case INT_3:
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irq = 3;
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break;
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case INT_5:
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irq = 5;
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break;
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case INT_7:
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irq = 7;
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break;
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case INT_9:
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irq = 9;
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break;
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case INT_10:
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irq = 10;
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break;
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case INT_11:
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irq = 11;
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break;
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case INT_12:
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irq = 12;
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break;
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case INT_15:
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irq = 15;
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break;
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default:
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/* Disabled */
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printf("ep: 3COM Network Adapter at "
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"slot %d has its IRQ disabled. "
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"Probe failed.\n",
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eisa_get_slot(dev));
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return ENXIO;
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}
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eisa_add_intr(dev, irq, EISA_TRIGGER_EDGE);
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return 0;
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}
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static int
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ep_eisa_attach(device_t dev)
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{
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struct ep_softc *sc;
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struct ep_board *epb;
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struct resource *io = 0;
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struct resource *eisa_io = 0;
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struct resource *irq = 0;
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int unit = device_get_unit(dev);
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u_char level_intr;
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int i, rid, shared;
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void *ih;
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/*
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* The addresses are sorted in increasing order
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* so we know the port to pass to the core ep
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* driver comes first.
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*/
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rid = 0;
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io = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
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0, ~0, 1, RF_ACTIVE);
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if (!io) {
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device_printf(dev, "No I/O space?!\n");
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goto bad;
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}
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rid = 1;
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eisa_io = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
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0, ~0, 1, RF_ACTIVE);
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if (!eisa_io) {
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device_printf(dev, "No I/O space?!\n");
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goto bad;
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}
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epb = &ep_board[ep_boards];
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epb->epb_addr = rman_get_start(io);
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epb->epb_used = 1;
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if(!(sc = ep_alloc(unit, epb)))
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goto bad;
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ep_boards++;
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sc->stat = 0;
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level_intr = FALSE;
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switch(eisa_get_id(dev)) {
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case EISA_DEVICE_ID_3COM_3C509_TP:
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sc->ep_connectors = UTP|AUI;
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break;
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case EISA_DEVICE_ID_3COM_3C509_BNC:
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sc->ep_connectors = BNC|AUI;
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break;
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case EISA_DEVICE_ID_3COM_3C579_TP:
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sc->ep_connectors = UTP|AUI;
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sc->stat = F_ACCESS_32_BITS;
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level_intr = TRUE;
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break;
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case EISA_DEVICE_ID_3COM_3C579_BNC:
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sc->ep_connectors = BNC|AUI;
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sc->stat = F_ACCESS_32_BITS;
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level_intr = TRUE;
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break;
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case EISA_DEVICE_ID_3COM_3C509_COMBO:
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sc->ep_connectors = UTP|BNC|AUI;
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break;
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case EISA_DEVICE_ID_3COM_3C509_TPO:
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sc->ep_connectors = UTP;
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break;
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default:
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break;
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}
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/*
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* Set the eisa config selected media type
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*/
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sc->ep_connector = inw(rman_get_start(eisa_io) + EISA_BPROM_MEDIA_CONF)
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>> ACF_CONNECTOR_BITS;
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shared = level_intr ? RF_SHAREABLE : 0;
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rid = 0;
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irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid,
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0, ~0, 1, shared | RF_ACTIVE);
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if (!irq) {
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device_printf(dev, "No irq?!\n");
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goto bad;
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}
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/* Reset and Enable the card */
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outb(rman_get_start(eisa_io) + EP_W0_CONFIG_CTRL, W0_P4_CMD_RESET_ADAPTER);
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DELAY(1000); /* we must wait at least 1 ms */
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outb(rman_get_start(eisa_io) + EP_W0_CONFIG_CTRL, W0_P4_CMD_ENABLE_ADAPTER);
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/* Now the registers are availible through the lower ioport */
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/*
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* Retrieve our ethernet address
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*/
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GO_WINDOW(0);
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for(i = 0; i < 3; i++)
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sc->epb->eth_addr[i] = get_e(sc, i);
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/* Even we get irq number from board, we should tell him..
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Otherwise we never get a H/W interrupt anymore...*/
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if ( rman_get_start(irq) == 9 )
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rman_get_start(irq) = 2;
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SET_IRQ(rman_get_start(eisa_io), rman_get_start(irq));
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ep_attach(sc);
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bus_setup_intr(dev, irq, INTR_TYPE_NET, ep_intr, sc, &ih);
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return 0;
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bad:
|
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if (io)
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bus_release_resource(dev, SYS_RES_IOPORT, 0, io);
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if (eisa_io)
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bus_release_resource(dev, SYS_RES_IOPORT, 0, eisa_io);
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if (irq)
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bus_release_resource(dev, SYS_RES_IRQ, 0, irq);
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return -1;
|
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}
|
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|
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static device_method_t ep_eisa_methods[] = {
|
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/* Device interface */
|
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DEVMETHOD(device_probe, ep_eisa_probe),
|
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DEVMETHOD(device_attach, ep_eisa_attach),
|
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|
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{ 0, 0 }
|
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};
|
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|
||||
static driver_t ep_eisa_driver = {
|
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"ep",
|
||||
ep_eisa_methods,
|
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1, /* unused */
|
||||
};
|
||||
|
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static devclass_t ep_devclass;
|
||||
|
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DRIVER_MODULE(ep, eisa, ep_eisa_driver, ep_devclass, 0, 0);
|
||||
|
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#endif /* NEISA > 0 */
|
||||
1387
sys/i386/isa/if_ep.c
1387
sys/i386/isa/if_ep.c
File diff suppressed because it is too large
Load Diff
@ -1,471 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 1993 Herb Peyerl (hpeyerl@novatel.ca) All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are
|
||||
* met: 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer. 2. The name
|
||||
* of the author may not be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO
|
||||
* EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
|
||||
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
|
||||
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* if_epreg.h,v 1.4 1994/11/13 10:12:37 gibbs Exp Modified by:
|
||||
*
|
||||
October 2, 1994
|
||||
|
||||
Modified by: Andres Vega Garcia
|
||||
|
||||
INRIA - Sophia Antipolis, France
|
||||
e-mail: avega@sophia.inria.fr
|
||||
finger: avega@pax.inria.fr
|
||||
|
||||
*/
|
||||
/*
|
||||
* $FreeBSD$
|
||||
*
|
||||
* Promiscuous mode added and interrupt logic slightly changed
|
||||
* to reduce the number of adapter failures. Transceiver select
|
||||
* logic changed to use value from EEPROM. Autoconfiguration
|
||||
* features added.
|
||||
* Done by:
|
||||
* Serge Babkin
|
||||
* Chelindbank (Chelyabinsk, Russia)
|
||||
* babkin@hq.icb.chel.su
|
||||
*/
|
||||
|
||||
/*
|
||||
* Pccard support for 3C589 by:
|
||||
* HAMADA Naoki
|
||||
* nao@tom-yam.or.jp
|
||||
*/
|
||||
|
||||
/*
|
||||
* Ethernet software status per interface.
|
||||
*/
|
||||
struct ep_softc {
|
||||
struct arpcom arpcom; /* Ethernet common part */
|
||||
int ep_io_addr; /* i/o bus address */
|
||||
struct mbuf *top, *mcur;
|
||||
short cur_len;
|
||||
u_short ep_connectors; /* Connectors on this card. */
|
||||
u_char ep_connector; /* Configured connector. */
|
||||
int stat; /* some flags */
|
||||
int gone; /* adapter is not present (for PCCARD) */
|
||||
#define F_RX_FIRST 0x1
|
||||
#define F_PROMISC 0x8
|
||||
|
||||
#define F_ACCESS_32_BITS 0x100
|
||||
|
||||
struct ep_board *epb;
|
||||
|
||||
int unit;
|
||||
|
||||
#ifdef EP_LOCAL_STATS
|
||||
short tx_underrun;
|
||||
short rx_no_first;
|
||||
short rx_no_mbuf;
|
||||
short rx_bpf_disc;
|
||||
short rx_overrunf;
|
||||
short rx_overrunl;
|
||||
#endif
|
||||
};
|
||||
|
||||
struct ep_board {
|
||||
int epb_addr; /* address of this board */
|
||||
char epb_used; /* was this entry already used for configuring ? */
|
||||
/* data from EEPROM for later use */
|
||||
u_short eth_addr[3]; /* Ethernet address */
|
||||
u_short prod_id; /* product ID */
|
||||
int cmd_off; /* command offset (bit shift) */
|
||||
int mii_trans; /* activate MII transiever */
|
||||
u_short res_cfg; /* resource configuration */
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* Some global constants
|
||||
*/
|
||||
#define TX_INIT_RATE 16
|
||||
#define TX_INIT_MAX_RATE 64
|
||||
#define RX_INIT_LATENCY 64
|
||||
#define RX_INIT_EARLY_THRESH 208 /* not less than MINCLSIZE */
|
||||
#define RX_NEXT_EARLY_THRESH 500
|
||||
|
||||
#define EEPROMSIZE 0x40
|
||||
#define MAX_EEPROMBUSY 1000
|
||||
#define EP_LAST_TAG 0xd7
|
||||
#define EP_MAX_BOARDS 16
|
||||
/*
|
||||
* This `ID' port is a mere hack. There's currently no chance to register
|
||||
* it with config's idea of the ports that are in use.
|
||||
*
|
||||
* "After the automatic configuration is completed, the IDS is in its initial
|
||||
* state (ID-WAIT), and it monitors all write access to I/O port 01x0h, where
|
||||
* 'x' is any hex digit. If a zero is written to any one of these ports, then
|
||||
* that address is remembered and becomes the ID port. A second zero written
|
||||
* to that port resets the ID sequence to its initial state. The IDS watches
|
||||
* for the ID sequence to be written to the ID port."
|
||||
*
|
||||
* We prefer 0x110 over 0x100 so to not conflict with the Plaque&Pray
|
||||
* ports.
|
||||
*/
|
||||
#define EP_ID_PORT 0x110
|
||||
#define EP_IOSIZE 16 /* 16 bytes of I/O space used. */
|
||||
|
||||
/*
|
||||
* some macros to acces long named fields
|
||||
*/
|
||||
#define IS_BASE (is->id_iobase)
|
||||
#define BASE (sc->ep_io_addr)
|
||||
|
||||
/*
|
||||
* Commands to read/write EEPROM trough EEPROM command register (Window 0,
|
||||
* Offset 0xa)
|
||||
*/
|
||||
#define EEPROM_CMD_RD 0x0080 /* Read: Address required (5 bits) */
|
||||
#define EEPROM_CMD_WR 0x0040 /* Write: Address required (5 bits) */
|
||||
#define EEPROM_CMD_ERASE 0x00c0 /* Erase: Address required (5 bits) */
|
||||
#define EEPROM_CMD_EWEN 0x0030 /* Erase/Write Enable: No data required */
|
||||
|
||||
#define EEPROM_BUSY (1<<15)
|
||||
#define EEPROM_TST_MODE (1<<14)
|
||||
|
||||
/*
|
||||
* Some short functions, worth to let them be a macro
|
||||
*/
|
||||
#define is_eeprom_busy(b) (inw((b)+EP_W0_EEPROM_COMMAND)&EEPROM_BUSY)
|
||||
#define GO_WINDOW(x) outw(BASE+EP_COMMAND, WINDOW_SELECT|(x))
|
||||
|
||||
/**************************************************************************
|
||||
* *
|
||||
* These define the EEPROM data structure. They are used in the probe
|
||||
* function to verify the existence of the adapter after having sent
|
||||
* the ID_Sequence.
|
||||
*
|
||||
* There are others but only the ones we use are defined here.
|
||||
*
|
||||
**************************************************************************/
|
||||
|
||||
#define EEPROM_NODE_ADDR_0 0x0 /* Word */
|
||||
#define EEPROM_NODE_ADDR_1 0x1 /* Word */
|
||||
#define EEPROM_NODE_ADDR_2 0x2 /* Word */
|
||||
#define EEPROM_PROD_ID 0x3 /* 0x9[0-f]50 */
|
||||
#define EEPROM_MFG_ID 0x7 /* 0x6d50 */
|
||||
#define EEPROM_ADDR_CFG 0x8 /* Base addr */
|
||||
#define EEPROM_RESOURCE_CFG 0x9 /* IRQ. Bits 12-15 */
|
||||
|
||||
/**************************************************************************
|
||||
* *
|
||||
* These are the registers for the 3Com 3c509 and their bit patterns when *
|
||||
* applicable. They have been taken out the the "EtherLink III Parallel *
|
||||
* Tasking EISA and ISA Technical Reference" "Beta Draft 10/30/92" manual *
|
||||
* from 3com. *
|
||||
* *
|
||||
**************************************************************************/
|
||||
|
||||
#define EP_COMMAND 0x0e /* Write. BASE+0x0e is always a
|
||||
* command reg. */
|
||||
#define EP_STATUS 0x0e /* Read. BASE+0x0e is always status
|
||||
* reg. */
|
||||
#define EP_WINDOW 0x0f /* Read. BASE+0x0f is always window
|
||||
* reg. */
|
||||
/*
|
||||
* Window 0 registers. Setup.
|
||||
*/
|
||||
/* Write */
|
||||
#define EP_W0_EEPROM_DATA 0x0c
|
||||
#define EP_W0_EEPROM_COMMAND 0x0a
|
||||
#define EP_W0_RESOURCE_CFG 0x08
|
||||
#define EP_W0_ADDRESS_CFG 0x06
|
||||
#define EP_W0_CONFIG_CTRL 0x04
|
||||
/* Read */
|
||||
#define EP_W0_PRODUCT_ID 0x02
|
||||
#define EP_W0_MFG_ID 0x00
|
||||
|
||||
/*
|
||||
* Window 1 registers. Operating Set.
|
||||
*/
|
||||
/* Write */
|
||||
#define EP_W1_TX_PIO_WR_2 0x02
|
||||
#define EP_W1_TX_PIO_WR_1 0x00
|
||||
/* Read */
|
||||
#define EP_W1_FREE_TX 0x0c
|
||||
#define EP_W1_TX_STATUS 0x0b /* byte */
|
||||
#define EP_W1_TIMER 0x0a /* byte */
|
||||
#define EP_W1_RX_STATUS 0x08
|
||||
#define EP_W1_RX_PIO_RD_2 0x02
|
||||
#define EP_W1_RX_PIO_RD_1 0x00
|
||||
|
||||
/*
|
||||
* Window 2 registers. Station Address Setup/Read
|
||||
*/
|
||||
/* Read/Write */
|
||||
#define EP_W2_ADDR_5 0x05
|
||||
#define EP_W2_ADDR_4 0x04
|
||||
#define EP_W2_ADDR_3 0x03
|
||||
#define EP_W2_ADDR_2 0x02
|
||||
#define EP_W2_ADDR_1 0x01
|
||||
#define EP_W2_ADDR_0 0x00
|
||||
|
||||
/*
|
||||
* Window 3 registers. FIFO Management.
|
||||
*/
|
||||
/* Read */
|
||||
#define EP_W3_FREE_TX 0x0c
|
||||
#define EP_W3_FREE_RX 0x0a
|
||||
#define EP_W3_OPTIONS 0x08
|
||||
|
||||
/*
|
||||
* Window 4 registers. Diagnostics.
|
||||
*/
|
||||
/* Read/Write */
|
||||
#define EP_W4_MEDIA_TYPE 0x0a
|
||||
#define EP_W4_CTRLR_STATUS 0x08
|
||||
#define EP_W4_NET_DIAG 0x06
|
||||
#define EP_W4_FIFO_DIAG 0x04
|
||||
#define EP_W4_HOST_DIAG 0x02
|
||||
#define EP_W4_TX_DIAG 0x00
|
||||
|
||||
/*
|
||||
* Window 5 Registers. Results and Internal status.
|
||||
*/
|
||||
/* Read */
|
||||
#define EP_W5_READ_0_MASK 0x0c
|
||||
#define EP_W5_INTR_MASK 0x0a
|
||||
#define EP_W5_RX_FILTER 0x08
|
||||
#define EP_W5_RX_EARLY_THRESH 0x06
|
||||
#define EP_W5_TX_AVAIL_THRESH 0x02
|
||||
#define EP_W5_TX_START_THRESH 0x00
|
||||
|
||||
/*
|
||||
* Window 6 registers. Statistics.
|
||||
*/
|
||||
/* Read/Write */
|
||||
#define TX_TOTAL_OK 0x0c
|
||||
#define RX_TOTAL_OK 0x0a
|
||||
#define TX_DEFERRALS 0x08
|
||||
#define RX_FRAMES_OK 0x07
|
||||
#define TX_FRAMES_OK 0x06
|
||||
#define RX_OVERRUNS 0x05
|
||||
#define TX_COLLISIONS 0x04
|
||||
#define TX_AFTER_1_COLLISION 0x03
|
||||
#define TX_AFTER_X_COLLISIONS 0x02
|
||||
#define TX_NO_SQE 0x01
|
||||
#define TX_CD_LOST 0x00
|
||||
|
||||
/****************************************
|
||||
*
|
||||
* Register definitions.
|
||||
*
|
||||
****************************************/
|
||||
|
||||
/*
|
||||
* Command register. All windows.
|
||||
*
|
||||
* 16 bit register.
|
||||
* 15-11: 5-bit code for command to be executed.
|
||||
* 10-0: 11-bit arg if any. For commands with no args;
|
||||
* this can be set to anything.
|
||||
*/
|
||||
#define GLOBAL_RESET (u_short) 0x0000 /* Wait at least 1ms
|
||||
* after issuing */
|
||||
#define WINDOW_SELECT (u_short) (0x1<<11)
|
||||
#define START_TRANSCEIVER (u_short) (0x2<<11) /* Read ADDR_CFG reg to
|
||||
* determine whether
|
||||
* this is needed. If
|
||||
* so; wait 800 uSec
|
||||
* before using trans-
|
||||
* ceiver. */
|
||||
#define RX_DISABLE (u_short) (0x3<<11) /* state disabled on
|
||||
* power-up */
|
||||
#define RX_ENABLE (u_short) (0x4<<11)
|
||||
#define RX_RESET (u_short) (0x5<<11)
|
||||
#define RX_DISCARD_TOP_PACK (u_short) (0x8<<11)
|
||||
#define TX_ENABLE (u_short) (0x9<<11)
|
||||
#define TX_DISABLE (u_short) (0xa<<11)
|
||||
#define TX_RESET (u_short) (0xb<<11)
|
||||
#define REQ_INTR (u_short) (0xc<<11)
|
||||
#define SET_INTR_MASK (u_short) (0xe<<11)
|
||||
#define SET_RD_0_MASK (u_short) (0xf<<11)
|
||||
#define SET_RX_FILTER (u_short) (0x10<<11)
|
||||
#define FIL_INDIVIDUAL (u_short) (0x1)
|
||||
#define FIL_GROUP (u_short) (0x2)
|
||||
#define FIL_BRDCST (u_short) (0x4)
|
||||
#define FIL_ALL (u_short) (0x8)
|
||||
#define SET_RX_EARLY_THRESH (u_short) (0x11<<11)
|
||||
#define SET_TX_AVAIL_THRESH (u_short) (0x12<<11)
|
||||
#define SET_TX_START_THRESH (u_short) (0x13<<11)
|
||||
#define STATS_ENABLE (u_short) (0x15<<11)
|
||||
#define STATS_DISABLE (u_short) (0x16<<11)
|
||||
#define STOP_TRANSCEIVER (u_short) (0x17<<11)
|
||||
/*
|
||||
* The following C_* acknowledge the various interrupts. Some of them don't
|
||||
* do anything. See the manual.
|
||||
*/
|
||||
#define ACK_INTR (u_short) (0x6800)
|
||||
#define C_INTR_LATCH (u_short) (ACK_INTR|0x1)
|
||||
#define C_CARD_FAILURE (u_short) (ACK_INTR|0x2)
|
||||
#define C_TX_COMPLETE (u_short) (ACK_INTR|0x4)
|
||||
#define C_TX_AVAIL (u_short) (ACK_INTR|0x8)
|
||||
#define C_RX_COMPLETE (u_short) (ACK_INTR|0x10)
|
||||
#define C_RX_EARLY (u_short) (ACK_INTR|0x20)
|
||||
#define C_INT_RQD (u_short) (ACK_INTR|0x40)
|
||||
#define C_UPD_STATS (u_short) (ACK_INTR|0x80)
|
||||
#define C_MASK (u_short) 0xFF /* mask of C_* */
|
||||
|
||||
/*
|
||||
* Status register. All windows.
|
||||
*
|
||||
* 15-13: Window number(0-7).
|
||||
* 12: Command_in_progress.
|
||||
* 11: reserved.
|
||||
* 10: reserved.
|
||||
* 9: reserved.
|
||||
* 8: reserved.
|
||||
* 7: Update Statistics.
|
||||
* 6: Interrupt Requested.
|
||||
* 5: RX Early.
|
||||
* 4: RX Complete.
|
||||
* 3: TX Available.
|
||||
* 2: TX Complete.
|
||||
* 1: Adapter Failure.
|
||||
* 0: Interrupt Latch.
|
||||
*/
|
||||
#define S_INTR_LATCH (u_short) (0x1)
|
||||
#define S_CARD_FAILURE (u_short) (0x2)
|
||||
#define S_TX_COMPLETE (u_short) (0x4)
|
||||
#define S_TX_AVAIL (u_short) (0x8)
|
||||
#define S_RX_COMPLETE (u_short) (0x10)
|
||||
#define S_RX_EARLY (u_short) (0x20)
|
||||
#define S_INT_RQD (u_short) (0x40)
|
||||
#define S_UPD_STATS (u_short) (0x80)
|
||||
#define S_MASK (u_short) 0xFF /* mask of S_* */
|
||||
#define S_5_INTS (S_CARD_FAILURE|S_TX_COMPLETE|\
|
||||
S_TX_AVAIL|S_RX_COMPLETE|S_RX_EARLY)
|
||||
#define S_COMMAND_IN_PROGRESS (u_short) (0x1000)
|
||||
|
||||
/* Address Config. Register.
|
||||
* Window 0/Port 06
|
||||
*/
|
||||
|
||||
#define ACF_CONNECTOR_BITS 14
|
||||
#define ACF_CONNECTOR_UTP 0
|
||||
#define ACF_CONNECTOR_AUI 1
|
||||
#define ACF_CONNECTOR_BNC 3
|
||||
|
||||
/* Resource configuration register.
|
||||
* Window 0/Port 08
|
||||
*
|
||||
*/
|
||||
|
||||
#define SET_IRQ(base,irq) outw((base) + EP_W0_RESOURCE_CFG, \
|
||||
((inw((base) + EP_W0_RESOURCE_CFG) & 0x0fff) | \
|
||||
((u_short)(irq)<<12)) ) /* set IRQ i */
|
||||
|
||||
/*
|
||||
* FIFO Registers.
|
||||
* RX Status. Window 1/Port 08
|
||||
*
|
||||
* 15: Incomplete or FIFO empty.
|
||||
* 14: 1: Error in RX Packet 0: Incomplete or no error.
|
||||
* 13-11: Type of error.
|
||||
* 1000 = Overrun.
|
||||
* 1011 = Run Packet Error.
|
||||
* 1100 = Alignment Error.
|
||||
* 1101 = CRC Error.
|
||||
* 1001 = Oversize Packet Error (>1514 bytes)
|
||||
* 0010 = Dribble Bits.
|
||||
* (all other error codes, no errors.)
|
||||
*
|
||||
* 10-0: RX Bytes (0-1514)
|
||||
*/
|
||||
#define ERR_RX_INCOMPLETE (u_short) (0x1<<15)
|
||||
#define ERR_RX (u_short) (0x1<<14)
|
||||
#define ERR_RX_OVERRUN (u_short) (0x8<<11)
|
||||
#define ERR_RX_RUN_PKT (u_short) (0xb<<11)
|
||||
#define ERR_RX_ALIGN (u_short) (0xc<<11)
|
||||
#define ERR_RX_CRC (u_short) (0xd<<11)
|
||||
#define ERR_RX_OVERSIZE (u_short) (0x9<<11)
|
||||
#define ERR_RX_DRIBBLE (u_short) (0x2<<11)
|
||||
|
||||
/*
|
||||
* FIFO Registers.
|
||||
* TX Status. Window 1/Port 0B
|
||||
*
|
||||
* Reports the transmit status of a completed transmission. Writing this
|
||||
* register pops the transmit completion stack.
|
||||
*
|
||||
* Window 1/Port 0x0b.
|
||||
*
|
||||
* 7: Complete
|
||||
* 6: Interrupt on successful transmission requested.
|
||||
* 5: Jabber Error (TP Only, TX Reset required. )
|
||||
* 4: Underrun (TX Reset required. )
|
||||
* 3: Maximum Collisions.
|
||||
* 2: TX Status Overflow.
|
||||
* 1-0: Undefined.
|
||||
*
|
||||
*/
|
||||
#define TXS_COMPLETE 0x80
|
||||
#define TXS_SUCCES_INTR_REQ 0x40
|
||||
#define TXS_JABBER 0x20
|
||||
#define TXS_UNDERRUN 0x10
|
||||
#define TXS_MAX_COLLISION 0x8
|
||||
#define TXS_STATUS_OVERFLOW 0x4
|
||||
|
||||
/*
|
||||
* Configuration control register.
|
||||
* Window 0/Port 04
|
||||
*/
|
||||
/* Read */
|
||||
#define IS_AUI (1<<13)
|
||||
#define IS_BNC (1<<12)
|
||||
#define IS_UTP (1<<9)
|
||||
/* Write */
|
||||
#define ENABLE_DRQ_IRQ 0x0001
|
||||
#define W0_P4_CMD_RESET_ADAPTER 0x4
|
||||
#define W0_P4_CMD_ENABLE_ADAPTER 0x1
|
||||
/*
|
||||
* Media type and status.
|
||||
* Window 4/Port 0A
|
||||
*/
|
||||
#define ENABLE_UTP 0xc0
|
||||
#define DISABLE_UTP 0x0
|
||||
|
||||
/*
|
||||
* Misc defines for various things.
|
||||
*/
|
||||
#define ACTIVATE_ADAPTER_TO_CONFIG 0xff /* to the id_port */
|
||||
#define MFG_ID 0x6d50 /* in EEPROM and W0 ADDR_CONFIG */
|
||||
#define PROD_ID 0x9150
|
||||
|
||||
#define AUI 0x1
|
||||
#define BNC 0x2
|
||||
#define UTP 0x4
|
||||
|
||||
#define RX_BYTES_MASK (u_short) (0x07ff)
|
||||
|
||||
extern struct ep_board ep_board[];
|
||||
extern int ep_boards;
|
||||
extern u_long ep_unit;
|
||||
extern struct ep_softc *ep_alloc __P((int unit, struct ep_board *epb));
|
||||
extern void ep_free __P((struct ep_softc *sc));
|
||||
extern void ep_intr __P((void *sc));
|
||||
extern int ep_attach __P((struct ep_softc *sc));
|
||||
|
||||
extern u_int16_t get_e __P((struct ep_softc *sc, int offset));
|
||||
|
||||
/*
|
||||
* Config flags
|
||||
*/
|
||||
#define EP_FLAGS_100TX 0x1
|
||||
@ -71,6 +71,7 @@
|
||||
#include <sys/dkbad.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/sysctl.h>
|
||||
#include <sys/conf.h>
|
||||
#include <sys/bus.h>
|
||||
#include <sys/disklabel.h>
|
||||
@ -258,6 +259,12 @@ static int atapictrlr;
|
||||
static int eide_quirks;
|
||||
|
||||
|
||||
static char wd_ident[NWD][62] = { NULL, NULL, NULL, NULL };
|
||||
SYSCTL_STRING(_hw, OID_AUTO, wd0_ident, CTLFLAG_RD, wd_ident[0], 0, "");
|
||||
SYSCTL_STRING(_hw, OID_AUTO, wd1_ident, CTLFLAG_RD, wd_ident[1], 0, "");
|
||||
SYSCTL_STRING(_hw, OID_AUTO, wd2_ident, CTLFLAG_RD, wd_ident[2], 0, "");
|
||||
SYSCTL_STRING(_hw, OID_AUTO, wd3_ident, CTLFLAG_RD, wd_ident[3], 0, "");
|
||||
|
||||
/*
|
||||
* Here we use the pci-subsystem to find out, whether there is
|
||||
* a cmd640b-chip attached on this pci-bus. This public routine
|
||||
@ -459,6 +466,13 @@ wdattach(struct isa_device *dvp)
|
||||
((dvp->id_flags) >> (16 * unit));
|
||||
|
||||
if (wdgetctlr(du) == 0) {
|
||||
|
||||
bzero(wd_ident[lunit], sizeof(wd_ident[lunit]);
|
||||
snprintf(wd_ident[lunit], sizeof(wd_ident[lunit]),
|
||||
"%s %s",
|
||||
du->dk_params.wdp_model,
|
||||
du->dk_params.wdp_serial);
|
||||
|
||||
/*
|
||||
* Print out description of drive.
|
||||
* wdp_model may not be null terminated.
|
||||
@ -478,6 +492,10 @@ wdattach(struct isa_device *dvp)
|
||||
if (du->cfg_flags & WDOPT_SLEEPHACK)
|
||||
printf(", sleep-hack");
|
||||
printf("\n");
|
||||
if (bootverbose) {
|
||||
printf("wd%d: Serial Number %s\n", lunit,
|
||||
du->dk_params.wdp_serial);
|
||||
}
|
||||
if (du->dk_params.wdp_heads == 0)
|
||||
printf("wd%d: size unknown, using %s values\n",
|
||||
lunit, du->dk_dd.d_secperunit > 17
|
||||
|
||||
Loading…
Reference in New Issue
Block a user