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Update the comment regarding the workaround for the BlackBird

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TICK_COMPARE bug and the instruction alignment used for it based
on information found in the OpenSolaris source.

MFC after:	3 days
This commit is contained in:
Marius Strobl 2008-08-23 20:53:27 +00:00
parent a4e1d2d2cf
commit 6adb632eeb
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=182078
1 changed files with 5 additions and 3 deletions
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8
sys/sparc64/include/cpufunc.h
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@ -177,14 +177,16 @@ int fasword32(u_long asi, void *addr, uint32_t *val);
* Macro intended to be used instead of wr(asr23, val, xor) for writing to
* the TICK_COMPARE register in order to avoid a bug in BlackBird CPUs that
* can cause these writes to fail under certain condidtions which in turn
* causes the hardclock to stop. The workaround is to perform the write
* at the beginning of an I-Cache line directly followed by a dummy read.
* causes the hardclock to stop. The workaround is to read the TICK_COMPARE
* register back immediately after writing to it with these two instructions
* aligned to a quadword boundary in order to ensure that I$ misses won't
* split them up.
*/
#define wrtickcmpr(val, xor) ({ \
__asm __volatile( \
" ba,pt %%xcc, 1f ; " \
" nop ; " \
" .align 64 ; " \
" .align 128 ; " \
"1: wr %0, %1, %%asr23 ; " \
" rd %%asr23, %%g0 ; " \
: : "r" (val), "rI" (xor)); \