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Add the s3c24x0 real time clock driver
Approved by: imp (mentor)
This commit is contained in:
Andrew Turner
parent
6eae6892da
commit
6fc08f19a6
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=210397
@ -2,6 +2,7 @@
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arm/arm/cpufunc_asm_arm9.S standard
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arm/arm/irq_dispatch.S standard
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arm/s3c2xx0/board_ln2410sbc.c optional board_ln2410sbc
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arm/s3c2xx0/s3c24x0_rtc.c standard
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arm/s3c2xx0/s3c24x0_machdep.c standard
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arm/s3c2xx0/s3c24x0.c standard
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arm/s3c2xx0/s3c2xx0_space.c standard
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@ -80,6 +80,10 @@ static struct {
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u_long count;
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} res[2];
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} s3c24x0_children[] = {
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{ "rtc", 0, -1, {
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{ SYS_RES_IOPORT, S3C24X0_RTC_PA_BASE, S3C24X0_RTC_SIZE },
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{ 0 },
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} },
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{ "timer", 0, -1, { { 0 }, } },
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{ "uart", 1, 0, {
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{ SYS_RES_IRQ, S3C24X0_INT_UART0, 1 },
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162
sys/arm/s3c2xx0/s3c24x0_rtc.c
Normal file
162
sys/arm/s3c2xx0/s3c24x0_rtc.c
Normal file
@ -0,0 +1,162 @@
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/*
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* Copyright (C) 2010 Andrew Turner
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/time.h>
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#include <sys/clock.h>
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#include <sys/resource.h>
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#include <sys/systm.h>
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#include <sys/rman.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <machine/bus.h>
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#include <arm/s3c2xx0/s3c24x0reg.h>
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#include "clock_if.h"
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#define YEAR_BASE 2000
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struct s3c2xx0_rtc_softc {
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struct resource *mem_res;
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};
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static int
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s3c2xx0_rtc_probe(device_t dev)
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{
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device_set_desc(dev, "Samsung Integrated RTC");
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return (0);
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}
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static int
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s3c2xx0_rtc_attach(device_t dev)
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{
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struct s3c2xx0_rtc_softc *sc;
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int error, rid;
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sc = device_get_softc(dev);
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error = 0;
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rid = 0;
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sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid,
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RF_ACTIVE);
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if (sc->mem_res == NULL) {
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error = ENOMEM;
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goto out;
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}
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bus_write_1(sc->mem_res, RTC_RTCCON, RTCCON_RTCEN);
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clock_register(dev, 1000000);
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out:
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return (error);
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}
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static int
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s3c2xx0_rtc_gettime(device_t dev, struct timespec *ts)
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{
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struct s3c2xx0_rtc_softc *sc;
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struct clocktime ct;
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#define READ_TIME() do { \
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ct.year = YEAR_BASE + FROMBCD(bus_read_1(sc->mem_res, RTC_BCDYEAR)); \
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ct.mon = FROMBCD(bus_read_1(sc->mem_res, RTC_BCDMON)); \
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ct.dow = FROMBCD(bus_read_1(sc->mem_res, RTC_BCDDAY)); \
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ct.day = FROMBCD(bus_read_1(sc->mem_res, RTC_BCDDATE)); \
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ct.hour = FROMBCD(bus_read_1(sc->mem_res, RTC_BCDHOUR)); \
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ct.min = FROMBCD(bus_read_1(sc->mem_res, RTC_BCDMIN)); \
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ct.sec = FROMBCD(bus_read_1(sc->mem_res, RTC_BCDSEC)); \
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} while (0)
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sc = device_get_softc(dev);
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ct.nsec = 0;
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READ_TIME();
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/*
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* Check if we could have read incorrect values
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* as the values could have changed.
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*/
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if (ct.sec == 0) {
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READ_TIME();
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}
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ct.dow = -1;
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#undef READ_TIME
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return (clock_ct_to_ts(&ct, ts));
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}
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static int
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s3c2xx0_rtc_settime(device_t dev, struct timespec *ts)
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{
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struct s3c2xx0_rtc_softc *sc;
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struct clocktime ct;
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sc = device_get_softc(dev);
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/* Resolution: 1 sec */
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if (ts->tv_nsec >= 500000000)
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ts->tv_sec++;
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ts->tv_nsec = 0;
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clock_ts_to_ct(ts, &ct);
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bus_write_1(sc->mem_res, RTC_BCDSEC, TOBCD(ct.sec));
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bus_write_1(sc->mem_res, RTC_BCDMIN, TOBCD(ct.min));
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bus_write_1(sc->mem_res, RTC_BCDHOUR, TOBCD(ct.hour));
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bus_write_1(sc->mem_res, RTC_BCDDATE, TOBCD(ct.day));
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bus_write_1(sc->mem_res, RTC_BCDDAY, TOBCD(ct.dow));
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bus_write_1(sc->mem_res, RTC_BCDMON, TOBCD(ct.mon));
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bus_write_1(sc->mem_res, RTC_BCDYEAR, TOBCD(ct.year - YEAR_BASE));
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return (0);
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}
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static device_method_t s3c2xx0_rtc_methods[] = {
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DEVMETHOD(device_probe, s3c2xx0_rtc_probe),
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DEVMETHOD(device_attach, s3c2xx0_rtc_attach),
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DEVMETHOD(clock_gettime, s3c2xx0_rtc_gettime),
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DEVMETHOD(clock_settime, s3c2xx0_rtc_settime),
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{ 0, 0 },
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};
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static driver_t s3c2xx0_rtc_driver = {
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"rtc",
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s3c2xx0_rtc_methods,
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sizeof(struct s3c2xx0_rtc_softc),
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};
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static devclass_t s3c2xx0_rtc_devclass;
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DRIVER_MODULE(s3c2xx0_rtc, s3c24x0, s3c2xx0_rtc_driver, s3c2xx0_rtc_devclass,
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0, 0);
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@ -99,6 +99,9 @@
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#define S3C24X0_IIS_BASE S3C24X0_DEV_PA_TO_VA(S3C24X0_IIS_PA_BASE)
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#define S3C24X0_GPIO_PA_BASE 0x56000000
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#define S3C24X0_GPIO_BASE S3C24X0_DEV_PA_TO_VA(S3C24X0_GPIO_PA_BASE)
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#define S3C24X0_RTC_PA_BASE 0x57000000
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#define S3C24X0_RTC_BASE S3C24X0_DEV_PA_TO_VA(S3C24X0_RTC_PA_BASE)
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#define S3C24X0_RTC_SIZE 0x8C
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#define S3C24X0_ADC_PA_BASE 0x58000000
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#define S3C24X0_ADC_BASE S3C24X0_DEV_PA_TO_VA(S3C24X0_ADC_PA_BASE)
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#define S3C24X0_SPI0_PA_BASE 0x59000000
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@ -642,7 +645,30 @@
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#define ADCDAT_DATAMASK 0x3ff
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/* RTC */ /* XXX */
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/* RTC */
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#define RTC_RTCCON 0x40
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#define RTCCON_RTCEN (1<<0)
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#define RTCCON_CLKSEL (1<<1)
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#define RTCCON_CNTSEL (1<<2)
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#define RTCCON_CLKRST (1<<3)
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#define RTC_TICNT0 0x44
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/* TICNT1 on 2440 */
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#define RTC_RTCALM 0x50
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#define RTC_ALMSEC 0x54
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#define RTC_ALMMIN 0x58
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#define RTC_ALMHOUR 0x5C
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#define RTC_ALMDATE 0x60
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#define RTC_ALMMON 0x64
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#define RTC_ALMYEAR 0x68
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/* RTCRST on 2410 */
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#define RTC_BCDSEC 0x70
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#define RTC_BCDMIN 0x74
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#define RTC_BCDHOUR 0x78
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#define RTC_BCDDATE 0x7C
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#define RTC_BCDDAY 0x80
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#define RTC_BCDMON 0x84
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#define RTC_BCDYEAR 0x88
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/* SPI */
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#define S3C24X0_SPI_SIZE 0x20
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