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Code Issues Releases Activity

Disable 32-bit PIO for 6Gbit/s Intel SATA controllers.

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For some reason 32-bit PIO writes are not working on 6Gbit/s Intel SATA
ports, while 16/32-bit PIO reads and 16-bit PIO writes are working fine.
3Gbit/s ports on the same controllers have no this problem.

Workaround this by disabling 32-bit PIO for all Intel controllers that may
have 6Gbit/s ports.  It halves PIO performance from 6MB/s to 3MB/s, but
who bother about speed of such rare and slow mode, which is also highly
discouraged by SATA specifications?

MFC after:	2 weeks
This commit is contained in:
Alexander Motin 2015-08-08 11:48:11 +00:00
parent bac1eac93c
commit 709c835a5a
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=286448
3 changed files with 25 additions and 21 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
sys/dev/ata/ata-all.c
View File

@ -572,6 +572,7 @@ ata_mode2str(int mode)
case ATA_UDMA6: return "UDMA133";
case ATA_SA150: return "SATA150";
case ATA_SA300: return "SATA300";
case ATA_SA600: return "SATA600";
default:
if (mode & ATA_DMA_MASK)
return "BIOSDMA";

44
sys/dev/ata/chipsets/ata-intel.c
View File

@ -155,34 +155,34 @@ ata_intel_probe(device_t dev)
{ ATA_5Series_S4, 0, INTEL_6CH, 0, ATA_SA300, "5 Series/3400 Series PCH" },
{ ATA_5Series_S5, 0, INTEL_6CH2, 0, ATA_SA300, "5 Series/3400 Series PCH" },
{ ATA_5Series_S6, 0, INTEL_6CH, 0, ATA_SA300, "5 Series/3400 Series PCH" },
{ ATA_CPT_S1, 0, INTEL_6CH, 0, ATA_SA300, "Cougar Point" },
{ ATA_CPT_S2, 0, INTEL_6CH, 0, ATA_SA300, "Cougar Point" },
{ ATA_CPT_S1, 0, INTEL_6CH, 0, ATA_SA600, "Cougar Point" },
{ ATA_CPT_S2, 0, INTEL_6CH, 0, ATA_SA600, "Cougar Point" },
{ ATA_CPT_S3, 0, INTEL_6CH2, 0, ATA_SA300, "Cougar Point" },
{ ATA_CPT_S4, 0, INTEL_6CH2, 0, ATA_SA300, "Cougar Point" },
{ ATA_PBG_S1, 0, INTEL_6CH, 0, ATA_SA300, "Patsburg" },
{ ATA_PBG_S1, 0, INTEL_6CH, 0, ATA_SA600, "Patsburg" },
{ ATA_PBG_S2, 0, INTEL_6CH2, 0, ATA_SA300, "Patsburg" },
{ ATA_PPT_S1, 0, INTEL_6CH, 0, ATA_SA300, "Panther Point" },
{ ATA_PPT_S2, 0, INTEL_6CH, 0, ATA_SA300, "Panther Point" },
{ ATA_PPT_S1, 0, INTEL_6CH, 0, ATA_SA600, "Panther Point" },
{ ATA_PPT_S2, 0, INTEL_6CH, 0, ATA_SA600, "Panther Point" },
{ ATA_PPT_S3, 0, INTEL_6CH2, 0, ATA_SA300, "Panther Point" },
{ ATA_PPT_S4, 0, INTEL_6CH2, 0, ATA_SA300, "Panther Point" },
{ ATA_AVOTON_S1, 0, INTEL_6CH, 0, ATA_SA300, "Avoton" },
{ ATA_AVOTON_S2, 0, INTEL_6CH, 0, ATA_SA300, "Avoton" },
{ ATA_AVOTON_S1, 0, INTEL_6CH, 0, ATA_SA600, "Avoton" },
{ ATA_AVOTON_S2, 0, INTEL_6CH, 0, ATA_SA600, "Avoton" },
{ ATA_AVOTON_S3, 0, INTEL_6CH2, 0, ATA_SA300, "Avoton" },
{ ATA_AVOTON_S4, 0, INTEL_6CH2, 0, ATA_SA300, "Avoton" },
{ ATA_LPT_S1, 0, INTEL_6CH, 0, ATA_SA300, "Lynx Point" },
{ ATA_LPT_S2, 0, INTEL_6CH, 0, ATA_SA300, "Lynx Point" },
{ ATA_LPT_S3, 0, INTEL_6CH2, 0, ATA_SA300, "Lynx Point" },
{ ATA_LPT_S4, 0, INTEL_6CH2, 0, ATA_SA300, "Lynx Point" },
{ ATA_WCPT_S1, 0, INTEL_6CH, 0, ATA_SA300, "Wildcat Point" },
{ ATA_WCPT_S2, 0, INTEL_6CH, 0, ATA_SA300, "Wildcat Point" },
{ ATA_WCPT_S3, 0, INTEL_6CH2, 0, ATA_SA300, "Wildcat Point" },
{ ATA_WCPT_S4, 0, INTEL_6CH2, 0, ATA_SA300, "Wildcat Point" },
{ ATA_WELLS_S1, 0, INTEL_6CH, 0, ATA_SA300, "Wellsburg" },
{ ATA_WELLS_S2, 0, INTEL_6CH2, 0, ATA_SA300, "Wellsburg" },
{ ATA_WELLS_S3, 0, INTEL_6CH, 0, ATA_SA300, "Wellsburg" },
{ ATA_WELLS_S4, 0, INTEL_6CH2, 0, ATA_SA300, "Wellsburg" },
{ ATA_LPTLP_S1, 0, INTEL_6CH, 0, ATA_SA300, "Lynx Point-LP" },
{ ATA_LPTLP_S2, 0, INTEL_6CH, 0, ATA_SA300, "Lynx Point-LP" },
{ ATA_LPT_S1, 0, INTEL_6CH, 0, ATA_SA600, "Lynx Point" },
{ ATA_LPT_S2, 0, INTEL_6CH, 0, ATA_SA600, "Lynx Point" },
{ ATA_LPT_S3, 0, INTEL_6CH2, 0, ATA_SA600, "Lynx Point" },
{ ATA_LPT_S4, 0, INTEL_6CH2, 0, ATA_SA600, "Lynx Point" },
{ ATA_WCPT_S1, 0, INTEL_6CH, 0, ATA_SA600, "Wildcat Point" },
{ ATA_WCPT_S2, 0, INTEL_6CH, 0, ATA_SA600, "Wildcat Point" },
{ ATA_WCPT_S3, 0, INTEL_6CH2, 0, ATA_SA600, "Wildcat Point" },
{ ATA_WCPT_S4, 0, INTEL_6CH2, 0, ATA_SA600, "Wildcat Point" },
{ ATA_WELLS_S1, 0, INTEL_6CH, 0, ATA_SA600, "Wellsburg" },
{ ATA_WELLS_S2, 0, INTEL_6CH2, 0, ATA_SA600, "Wellsburg" },
{ ATA_WELLS_S3, 0, INTEL_6CH, 0, ATA_SA600, "Wellsburg" },
{ ATA_WELLS_S4, 0, INTEL_6CH2, 0, ATA_SA600, "Wellsburg" },
{ ATA_LPTLP_S1, 0, INTEL_6CH, 0, ATA_SA600, "Lynx Point-LP" },
{ ATA_LPTLP_S2, 0, INTEL_6CH, 0, ATA_SA600, "Lynx Point-LP" },
{ ATA_LPTLP_S3, 0, INTEL_6CH2, 0, ATA_SA300, "Lynx Point-LP" },
{ ATA_LPTLP_S4, 0, INTEL_6CH2, 0, ATA_SA300, "Lynx Point-LP" },
{ ATA_I31244, 0, 0, 2, ATA_SA150, "31244" },
@ -394,6 +394,8 @@ ata_intel_ch_attach(device_t dev)
}
} else
ctlr->setmode = ata_intel_new_setmode;
if (ctlr->chip->max_dma >= ATA_SA600)
ch->flags |= ATA_USE_16BIT;
} else if (ctlr->chip->chipid != ATA_ISCH)
ch->flags |= ATA_CHECKS_CABLE;
return (0);

1
sys/sys/ata.h
View File

@ -335,6 +335,7 @@ struct ata_params {
#define ATA_UDMA6 0x46
#define ATA_SA150 0x47
#define ATA_SA300 0x48
#define ATA_SA600 0x49
#define ATA_DMA_MAX 0x4f