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Code Issues Releases Activity

PowerNV: move LPCR and LPID altering to cpudep_ap_early_bootstrap

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It turns out that under some circumstances we can get DSI or DSE before we set
LPCR and LPID so we should set it as early as possible.

Authored by:           Patryk Duda <pdk@semihalf.com>
Submitted by:          Wojciech Macek <wma@semihalf.com>
Obtained from:         Semihalf
Sponsored by:          IBM, QCM Technologies
This commit is contained in:
Wojciech Macek 2018-01-29 09:27:02 +00:00
parent 8de1ad0b9b
commit 70bb600a0a
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=328537
2 changed files with 27 additions and 18 deletions
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16
sys/powerpc/aim/mp_cpudep.c
View File

@ -64,9 +64,6 @@ cpudep_ap_early_bootstrap(void)
register_t reg;
#endif
__asm __volatile("mtsprg 0, %0" :: "r"(ap_pcpu));
powerpc_sync();
switch (mfpvr() >> 16) {
case IBM970:
case IBM970FX:
@ -86,7 +83,20 @@ cpudep_ap_early_bootstrap(void)
#endif
powerpc_sync();
break;
case IBMPOWER8:
case IBMPOWER8E:
isync();
/* Direct interrupts to SRR instead of HSRR and reset LPCR otherwise */
mtspr(SPR_LPID, 0);
isync();
mtspr(SPR_LPCR, LPCR_LPES);
isync();
break;
}
__asm __volatile("mtsprg 0, %0" :: "r"(ap_pcpu));
powerpc_sync();
}
uintptr_t

29
sys/powerpc/powernv/platform_powernv.c
View File

@ -128,6 +128,7 @@ powernv_attach(platform_t plat)
pcell_t prop;
phandle_t cpu;
int res, len, node, idx;
register_t msr;
/* Ping OPAL again just to make sure */
opal_check();
@ -141,6 +142,19 @@ powernv_attach(platform_t plat)
cpu_idle_hook = powernv_cpu_idle;
powernv_boot_pir = mfspr(SPR_PIR);
/* LPID must not be altered when PSL_DR or PSL_IR is set */
msr = mfmsr();
mtmsr(msr & ~(PSL_DR | PSL_IR));
/* Direct interrupts to SRR instead of HSRR and reset LPCR otherwise */
mtspr(SPR_LPID, 0);
isync();
mtmsr(msr);
mtspr(SPR_LPCR, LPCR_LPES);
isync();
/* Init CPU bits */
powernv_smp_ap_init(plat);
@ -444,21 +458,6 @@ powernv_reset(platform_t platform)
static void
powernv_smp_ap_init(platform_t platform)
{
register_t msr;
/* LPID must not be altered when PSL_DR or PSL_IR is set */
msr = mfmsr();
mtmsr(msr & ~(PSL_DR | PSL_IR));
isync();
/* Direct interrupts to SRR instead of HSRR and reset LPCR otherwise */
mtspr(SPR_LPID, 0);
isync();
mtmsr(msr);
mtspr(SPR_LPCR, LPCR_LPES);
isync();
}
static void