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Merge llvm-project release/19.x llvmorg-19.1.5-0-gab4b5a2db582
This updates llvm, clang, compiler-rt, libc++, libunwind, lld, lldb and openmp to llvm-project release/19.x llvmorg-19.1.5-0-gab4b5a2db582, a.k.a. 19.1.5 release. PR: 280562 MFC after: 3 days
This commit is contained in:
commit
71ac745d76
@ -294,9 +294,10 @@ constructHexagonLinkArgs(Compilation &C, const JobAction &JA,
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bool IncStartFiles = !Args.hasArg(options::OPT_nostartfiles);
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bool IncDefLibs = !Args.hasArg(options::OPT_nodefaultlibs);
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bool UseG0 = false;
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const char *Exec = Args.MakeArgString(HTC.GetLinkerPath());
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bool UseLLD = (llvm::sys::path::filename(Exec).equals_insensitive("ld.lld") ||
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llvm::sys::path::stem(Exec).equals_insensitive("ld.lld"));
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bool UseLLD = false;
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const char *Exec = Args.MakeArgString(HTC.GetLinkerPath(&UseLLD));
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UseLLD = UseLLD || llvm::sys::path::filename(Exec).ends_with("ld.lld") ||
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llvm::sys::path::stem(Exec).ends_with("ld.lld");
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bool UseShared = IsShared && !IsStatic;
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StringRef CpuVer = toolchains::HexagonToolChain::GetTargetCPUVersion(Args);
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@ -56,7 +56,7 @@ class IncrementalExecutor {
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virtual llvm::Error addModule(PartialTranslationUnit &PTU);
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virtual llvm::Error removeModule(PartialTranslationUnit &PTU);
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virtual llvm::Error runCtors() const;
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llvm::Error cleanUp();
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virtual llvm::Error cleanUp();
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llvm::Expected<llvm::orc::ExecutorAddr>
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getSymbolAddress(llvm::StringRef Name, SymbolNameKind NameKind) const;
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@ -192,8 +192,8 @@ IncrementalCompilerBuilder::CreateCpp() {
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#ifdef __EMSCRIPTEN__
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Argv.push_back("-target");
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Argv.push_back("wasm32-unknown-emscripten");
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Argv.push_back("-pie");
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Argv.push_back("-shared");
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Argv.push_back("-fvisibility=default");
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#endif
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Argv.insert(Argv.end(), UserArgs.begin(), UserArgs.end());
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@ -23,6 +23,31 @@
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#include <string>
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namespace lld {
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enum Flavor {
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Invalid,
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Gnu, // -flavor gnu
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MinGW, // -flavor gnu MinGW
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WinLink, // -flavor link
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Darwin, // -flavor darwin
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Wasm, // -flavor wasm
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};
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using Driver = bool (*)(llvm::ArrayRef<const char *>, llvm::raw_ostream &,
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llvm::raw_ostream &, bool, bool);
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struct DriverDef {
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Flavor f;
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Driver d;
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};
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struct Result {
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int retCode;
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bool canRunAgain;
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};
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Result lldMain(llvm::ArrayRef<const char *> args, llvm::raw_ostream &stdoutOS,
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llvm::raw_ostream &stderrOS, llvm::ArrayRef<DriverDef> drivers);
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namespace wasm {
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bool link(llvm::ArrayRef<const char *> args, llvm::raw_ostream &stdoutOS,
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llvm::raw_ostream &stderrOS, bool exitEarly, bool disableOutput);
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@ -51,13 +76,14 @@ llvm::Error WasmIncrementalExecutor::addModule(PartialTranslationUnit &PTU) {
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llvm::TargetMachine *TargetMachine = Target->createTargetMachine(
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PTU.TheModule->getTargetTriple(), "", "", TO, llvm::Reloc::Model::PIC_);
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PTU.TheModule->setDataLayout(TargetMachine->createDataLayout());
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std::string OutputFileName = PTU.TheModule->getName().str() + ".wasm";
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std::string ObjectFileName = PTU.TheModule->getName().str() + ".o";
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std::string BinaryFileName = PTU.TheModule->getName().str() + ".wasm";
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std::error_code Error;
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llvm::raw_fd_ostream OutputFile(llvm::StringRef(OutputFileName), Error);
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llvm::raw_fd_ostream ObjectFileOutput(llvm::StringRef(ObjectFileName), Error);
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llvm::legacy::PassManager PM;
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if (TargetMachine->addPassesToEmitFile(PM, OutputFile, nullptr,
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if (TargetMachine->addPassesToEmitFile(PM, ObjectFileOutput, nullptr,
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llvm::CodeGenFileType::ObjectFile)) {
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return llvm::make_error<llvm::StringError>(
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"Wasm backend cannot produce object.", llvm::inconvertibleErrorCode());
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@ -69,27 +95,30 @@ llvm::Error WasmIncrementalExecutor::addModule(PartialTranslationUnit &PTU) {
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llvm::inconvertibleErrorCode());
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}
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OutputFile.close();
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ObjectFileOutput.close();
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std::vector<const char *> LinkerArgs = {"wasm-ld",
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"-pie",
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"-shared",
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"--import-memory",
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"--no-entry",
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"--export-all",
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"--experimental-pic",
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"--no-export-dynamic",
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"--stack-first",
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OutputFileName.c_str(),
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"--allow-undefined",
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ObjectFileName.c_str(),
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"-o",
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OutputFileName.c_str()};
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int Result =
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lld::wasm::link(LinkerArgs, llvm::outs(), llvm::errs(), false, false);
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if (!Result)
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BinaryFileName.c_str()};
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const lld::DriverDef WasmDriver = {lld::Flavor::Wasm, &lld::wasm::link};
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std::vector<lld::DriverDef> WasmDriverArgs;
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WasmDriverArgs.push_back(WasmDriver);
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lld::Result Result =
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lld::lldMain(LinkerArgs, llvm::outs(), llvm::errs(), WasmDriverArgs);
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if (Result.retCode)
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return llvm::make_error<llvm::StringError>(
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"Failed to link incremental module", llvm::inconvertibleErrorCode());
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void *LoadedLibModule =
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dlopen(OutputFileName.c_str(), RTLD_NOW | RTLD_GLOBAL);
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dlopen(BinaryFileName.c_str(), RTLD_NOW | RTLD_GLOBAL);
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if (LoadedLibModule == nullptr) {
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llvm::errs() << dlerror() << '\n';
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return llvm::make_error<llvm::StringError>(
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@ -109,6 +138,12 @@ llvm::Error WasmIncrementalExecutor::runCtors() const {
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return llvm::Error::success();
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}
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llvm::Error WasmIncrementalExecutor::cleanUp() {
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// Can't call cleanUp through IncrementalExecutor as it
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// tries to deinitialize JIT which hasn't been initialized
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return llvm::Error::success();
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}
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WasmIncrementalExecutor::~WasmIncrementalExecutor() = default;
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} // namespace clang
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} // namespace clang
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@ -28,6 +28,7 @@ class WasmIncrementalExecutor : public IncrementalExecutor {
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llvm::Error addModule(PartialTranslationUnit &PTU) override;
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llvm::Error removeModule(PartialTranslationUnit &PTU) override;
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llvm::Error runCtors() const override;
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llvm::Error cleanUp() override;
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~WasmIncrementalExecutor() override;
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};
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@ -27,7 +27,7 @@
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// _LIBCPP_VERSION represents the version of libc++, which matches the version of LLVM.
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// Given a LLVM release LLVM XX.YY.ZZ (e.g. LLVM 17.0.1 == 17.00.01), _LIBCPP_VERSION is
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// defined to XXYYZZ.
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# define _LIBCPP_VERSION 190104
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# define _LIBCPP_VERSION 190105
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# define _LIBCPP_CONCAT_IMPL(_X, _Y) _X##_Y
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# define _LIBCPP_CONCAT(_X, _Y) _LIBCPP_CONCAT_IMPL(_X, _Y)
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@ -329,7 +329,7 @@ void Hexagon::relocate(uint8_t *loc, const Relocation &rel,
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case R_HEX_B22_PCREL:
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case R_HEX_GD_PLT_B22_PCREL:
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case R_HEX_PLT_B22_PCREL:
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checkInt(loc, val, 22, rel);
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checkInt(loc, val, 24, rel);
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or32le(loc, applyMask(0x1ff3ffe, val >> 2));
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break;
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case R_HEX_B22_PCREL_X:
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@ -192,6 +192,11 @@ class MemorySSAUpdater {
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const BasicBlock *BB,
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MemorySSA::InsertionPlace Point);
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MemoryAccess *createMemoryAccessInBB(Instruction *I, MemoryAccess *Definition,
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const BasicBlock *BB,
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MemorySSA::InsertionPlace Point,
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bool CreationMustSucceed);
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/// Create a MemoryAccess in MemorySSA before an existing MemoryAccess.
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///
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/// See createMemoryAccessInBB() for usage details.
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@ -1404,8 +1404,17 @@ void MemorySSAUpdater::changeToUnreachable(const Instruction *I) {
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MemoryAccess *MemorySSAUpdater::createMemoryAccessInBB(
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Instruction *I, MemoryAccess *Definition, const BasicBlock *BB,
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MemorySSA::InsertionPlace Point) {
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MemoryUseOrDef *NewAccess = MSSA->createDefinedAccess(I, Definition);
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MSSA->insertIntoListsForBlock(NewAccess, BB, Point);
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return createMemoryAccessInBB(I, Definition, BB, Point,
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/*CreationMustSucceed=*/true);
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}
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MemoryAccess *MemorySSAUpdater::createMemoryAccessInBB(
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Instruction *I, MemoryAccess *Definition, const BasicBlock *BB,
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MemorySSA::InsertionPlace Point, bool CreationMustSucceed) {
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MemoryUseOrDef *NewAccess = MSSA->createDefinedAccess(
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I, Definition, /*Template=*/nullptr, CreationMustSucceed);
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if (NewAccess)
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MSSA->insertIntoListsForBlock(NewAccess, BB, Point);
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return NewAccess;
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}
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@ -6313,8 +6313,10 @@ APInt ScalarEvolution::getConstantMultipleImpl(const SCEV *S) {
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return getConstantMultiple(Z->getOperand()).zext(BitWidth);
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}
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case scSignExtend: {
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// Only multiples that are a power of 2 will hold after sext.
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const SCEVSignExtendExpr *E = cast<SCEVSignExtendExpr>(S);
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return getConstantMultiple(E->getOperand()).sext(BitWidth);
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uint32_t TZ = getMinTrailingZeros(E->getOperand());
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return GetShiftedByZeros(TZ);
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}
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case scMulExpr: {
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const SCEVMulExpr *M = cast<SCEVMulExpr>(S);
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@ -1474,7 +1474,7 @@ void MachineLICMBase::InitializeLoadsHoistableLoops() {
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if (!AllowedToHoistLoads[Loop])
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continue;
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for (auto &MI : *MBB) {
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if (!MI.mayStore() && !MI.isCall() &&
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if (!MI.isLoadFoldBarrier() && !MI.mayStore() && !MI.isCall() &&
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!(MI.mayLoad() && MI.hasOrderedMemoryRef()))
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continue;
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for (MachineLoop *L = Loop; L != nullptr; L = L->getParentLoop())
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@ -1394,6 +1394,18 @@ bool requiresGetVGCall(MachineFunction &MF) {
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!MF.getSubtarget<AArch64Subtarget>().hasSVE();
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}
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static bool requiresSaveVG(MachineFunction &MF) {
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AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>();
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// For Darwin platforms we don't save VG for non-SVE functions, even if SME
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// is enabled with streaming mode changes.
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if (!AFI->hasStreamingModeChanges())
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return false;
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auto &ST = MF.getSubtarget<AArch64Subtarget>();
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if (ST.isTargetDarwin())
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return ST.hasSVE();
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return true;
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}
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bool isVGInstruction(MachineBasicBlock::iterator MBBI) {
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unsigned Opc = MBBI->getOpcode();
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if (Opc == AArch64::CNTD_XPiI || Opc == AArch64::RDSVLI_XI ||
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@ -1430,8 +1442,7 @@ static MachineBasicBlock::iterator convertCalleeSaveRestoreToSPPrePostIncDec(
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// functions, we need to do this for both the streaming and non-streaming
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// vector length. Move past these instructions if necessary.
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MachineFunction &MF = *MBB.getParent();
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AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>();
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if (AFI->hasStreamingModeChanges())
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if (requiresSaveVG(MF))
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while (isVGInstruction(MBBI))
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++MBBI;
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@ -1936,12 +1947,9 @@ void AArch64FrameLowering::emitPrologue(MachineFunction &MF,
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// pointer bump above.
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while (MBBI != End && MBBI->getFlag(MachineInstr::FrameSetup) &&
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!IsSVECalleeSave(MBBI)) {
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// Move past instructions generated to calculate VG
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if (AFI->hasStreamingModeChanges())
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while (isVGInstruction(MBBI))
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++MBBI;
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if (CombineSPBump)
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if (CombineSPBump &&
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// Only fix-up frame-setup load/store instructions.
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(!requiresSaveVG(MF) || !isVGInstruction(MBBI)))
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fixupCalleeSaveRestoreStackOffset(*MBBI, AFI->getLocalStackSize(),
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NeedsWinCFI, &HasWinCFI);
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++MBBI;
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@ -2848,7 +2856,8 @@ static bool produceCompactUnwindFrame(MachineFunction &MF) {
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return Subtarget.isTargetMachO() &&
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!(Subtarget.getTargetLowering()->supportSwiftError() &&
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Attrs.hasAttrSomewhere(Attribute::SwiftError)) &&
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MF.getFunction().getCallingConv() != CallingConv::SwiftTail;
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MF.getFunction().getCallingConv() != CallingConv::SwiftTail &&
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!requiresSaveVG(MF);
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}
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static bool invalidateWindowsRegisterPairing(unsigned Reg1, unsigned Reg2,
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@ -3720,7 +3729,7 @@ void AArch64FrameLowering::determineCalleeSaves(MachineFunction &MF,
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// non-streaming VG value.
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const Function &F = MF.getFunction();
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SMEAttrs Attrs(F);
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if (AFI->hasStreamingModeChanges()) {
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if (requiresSaveVG(MF)) {
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if (Attrs.hasStreamingBody() && !Attrs.hasStreamingInterface())
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CSStackSize += 16;
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else
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@ -3873,7 +3882,7 @@ bool AArch64FrameLowering::assignCalleeSavedSpillSlots(
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}
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// Insert VG into the list of CSRs, immediately before LR if saved.
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if (AFI->hasStreamingModeChanges()) {
|
||||
if (requiresSaveVG(MF)) {
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std::vector<CalleeSavedInfo> VGSaves;
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SMEAttrs Attrs(MF.getFunction());
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|
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@ -4602,10 +4611,9 @@ MachineBasicBlock::iterator emitVGSaveRestore(MachineBasicBlock::iterator II,
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|
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void AArch64FrameLowering::processFunctionBeforeFrameIndicesReplaced(
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MachineFunction &MF, RegScavenger *RS = nullptr) const {
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AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>();
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for (auto &BB : MF)
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for (MachineBasicBlock::iterator II = BB.begin(); II != BB.end();) {
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if (AFI->hasStreamingModeChanges())
|
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if (requiresSaveVG(MF))
|
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II = emitVGSaveRestore(II, this);
|
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if (StackTaggingMergeSetTag)
|
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II = tryMergeAdjacentSTG(II, this, RS);
|
||||
|
@ -8732,10 +8732,11 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,
|
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|
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SDValue InGlue;
|
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if (RequiresSMChange) {
|
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|
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Chain = DAG.getNode(AArch64ISD::VG_SAVE, DL,
|
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DAG.getVTList(MVT::Other, MVT::Glue), Chain);
|
||||
InGlue = Chain.getValue(1);
|
||||
if (!Subtarget->isTargetDarwin() || Subtarget->hasSVE()) {
|
||||
Chain = DAG.getNode(AArch64ISD::VG_SAVE, DL,
|
||||
DAG.getVTList(MVT::Other, MVT::Glue), Chain);
|
||||
InGlue = Chain.getValue(1);
|
||||
}
|
||||
|
||||
SDValue NewChain = changeStreamingMode(
|
||||
DAG, DL, CalleeAttrs.hasStreamingInterface(), Chain, InGlue,
|
||||
@ -8914,11 +8915,13 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,
|
||||
Result = changeStreamingMode(
|
||||
DAG, DL, !CalleeAttrs.hasStreamingInterface(), Result, InGlue,
|
||||
getSMCondition(CallerAttrs, CalleeAttrs), PStateSM);
|
||||
InGlue = Result.getValue(1);
|
||||
|
||||
Result =
|
||||
DAG.getNode(AArch64ISD::VG_RESTORE, DL,
|
||||
DAG.getVTList(MVT::Other, MVT::Glue), {Result, InGlue});
|
||||
if (!Subtarget->isTargetDarwin() || Subtarget->hasSVE()) {
|
||||
InGlue = Result.getValue(1);
|
||||
Result =
|
||||
DAG.getNode(AArch64ISD::VG_RESTORE, DL,
|
||||
DAG.getVTList(MVT::Other, MVT::Glue), {Result, InGlue});
|
||||
}
|
||||
}
|
||||
|
||||
if (CallerAttrs.requiresEnablingZAAfterCall(CalleeAttrs))
|
||||
|
@ -721,7 +721,7 @@ bool LoongArchExpandPseudo::expandFunctionCALL(
|
||||
IsTailCall ? LoongArch::PseudoJIRL_TAIL : LoongArch::PseudoJIRL_CALL;
|
||||
Register AddrReg = IsTailCall ? LoongArch::R19 : LoongArch::R1;
|
||||
|
||||
bool UseGOT = Func.isGlobal() && !Func.getGlobal()->isDSOLocal();
|
||||
bool UseGOT = Func.getTargetFlags() == LoongArchII::MO_CALL_PLT;
|
||||
unsigned MO = UseGOT ? LoongArchII::MO_GOT_PC_HI : LoongArchII::MO_PCREL_LO;
|
||||
unsigned LAOpcode = UseGOT ? LoongArch::LDX_D : LoongArch::ADD_D;
|
||||
expandLargeAddressLoad(MBB, MBBI, NextMBBI, LAOpcode, MO, Func, AddrReg,
|
||||
|
@ -67,8 +67,7 @@ class VecCond<SDPatternOperator OpNode, ValueType TyNode,
|
||||
let usesCustomInserter = 1;
|
||||
}
|
||||
|
||||
def vsplat_imm_eq_1 : PatFrags<(ops), [(build_vector),
|
||||
(bitconvert (v4i32 (build_vector)))], [{
|
||||
def vsplat_imm_eq_1 : PatFrags<(ops), [(build_vector)], [{
|
||||
APInt Imm;
|
||||
EVT EltTy = N->getValueType(0).getVectorElementType();
|
||||
|
||||
@ -109,8 +108,7 @@ def vsplati32_imm_eq_31 : PatFrags<(ops), [(build_vector)], [{
|
||||
return selectVSplat(N, Imm, EltTy.getSizeInBits()) &&
|
||||
Imm.getBitWidth() == EltTy.getSizeInBits() && Imm == 31;
|
||||
}]>;
|
||||
def vsplati64_imm_eq_63 : PatFrags<(ops), [(build_vector),
|
||||
(bitconvert (v4i32 (build_vector)))], [{
|
||||
def vsplati64_imm_eq_63 : PatFrags<(ops), [(build_vector)], [{
|
||||
APInt Imm;
|
||||
EVT EltTy = N->getValueType(0).getVectorElementType();
|
||||
|
||||
|
@ -55,7 +55,7 @@ static MCInstrInfo *createLoongArchMCInstrInfo() {
|
||||
static MCSubtargetInfo *
|
||||
createLoongArchMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS) {
|
||||
if (CPU.empty() || CPU == "generic")
|
||||
CPU = TT.isArch64Bit() ? "la464" : "generic-la32";
|
||||
CPU = TT.isArch64Bit() ? "generic-la64" : "generic-la32";
|
||||
return createLoongArchMCSubtargetInfoImpl(TT, CPU, /*TuneCPU*/ CPU, FS);
|
||||
}
|
||||
|
||||
|
@ -220,6 +220,10 @@ bool MipsDAGToDAGISel::selectVSplatMaskR(SDValue N, SDValue &Imm) const {
|
||||
return false;
|
||||
}
|
||||
|
||||
bool MipsDAGToDAGISel::selectVSplatImmEq1(SDValue N) const {
|
||||
llvm_unreachable("Unimplemented function.");
|
||||
}
|
||||
|
||||
/// Convert vector addition with vector subtraction if that allows to encode
|
||||
/// constant as an immediate and thus avoid extra 'ldi' instruction.
|
||||
/// add X, <-1, -1...> --> sub X, <1, 1...>
|
||||
|
@ -120,6 +120,9 @@ class MipsDAGToDAGISel : public SelectionDAGISel {
|
||||
/// starting at bit zero.
|
||||
virtual bool selectVSplatMaskR(SDValue N, SDValue &Imm) const;
|
||||
|
||||
/// Select constant vector splats whose value is 1.
|
||||
virtual bool selectVSplatImmEq1(SDValue N) const;
|
||||
|
||||
/// Convert vector addition with vector subtraction if that allows to encode
|
||||
/// constant as an immediate and thus avoid extra 'ldi' instruction.
|
||||
/// add X, <-1, -1...> --> sub X, <1, 1...>
|
||||
|
@ -198,14 +198,8 @@ def vsplati32 : PatFrag<(ops node:$e0),
|
||||
(v4i32 (build_vector node:$e0, node:$e0,
|
||||
node:$e0, node:$e0))>;
|
||||
|
||||
def vsplati64_imm_eq_1 : PatLeaf<(bitconvert (v4i32 (build_vector))), [{
|
||||
APInt Imm;
|
||||
SDNode *BV = N->getOperand(0).getNode();
|
||||
EVT EltTy = N->getValueType(0).getVectorElementType();
|
||||
|
||||
return selectVSplat(BV, Imm, EltTy.getSizeInBits()) &&
|
||||
Imm.getBitWidth() == EltTy.getSizeInBits() && Imm == 1;
|
||||
}]>;
|
||||
// Any build_vector that is a constant splat with a value that equals 1
|
||||
def vsplat_imm_eq_1 : ComplexPattern<vAny, 0, "selectVSplatImmEq1">;
|
||||
|
||||
def vsplati64 : PatFrag<(ops node:$e0),
|
||||
(v2i64 (build_vector node:$e0, node:$e0))>;
|
||||
@ -217,7 +211,7 @@ def vsplati64_splat_d : PatFrag<(ops node:$e0),
|
||||
node:$e0,
|
||||
node:$e0,
|
||||
node:$e0)),
|
||||
vsplati64_imm_eq_1))))>;
|
||||
(vsplat_imm_eq_1)))))>;
|
||||
|
||||
def vsplatf32 : PatFrag<(ops node:$e0),
|
||||
(v4f32 (build_vector node:$e0, node:$e0,
|
||||
@ -352,46 +346,35 @@ def vsplat_maskr_bits_uimm6
|
||||
: SplatComplexPattern<vsplat_uimm6, vAny, 1, "selectVSplatMaskR",
|
||||
[build_vector, bitconvert]>;
|
||||
|
||||
// Any build_vector that is a constant splat with a value that equals 1
|
||||
// FIXME: These should be a ComplexPattern but we can't use them because the
|
||||
// ISel generator requires the uses to have a name, but providing a name
|
||||
// causes other errors ("used in pattern but not operand list")
|
||||
def vsplat_imm_eq_1 : PatLeaf<(build_vector), [{
|
||||
APInt Imm;
|
||||
EVT EltTy = N->getValueType(0).getVectorElementType();
|
||||
|
||||
return selectVSplat(N, Imm, EltTy.getSizeInBits()) &&
|
||||
Imm.getBitWidth() == EltTy.getSizeInBits() && Imm == 1;
|
||||
}]>;
|
||||
|
||||
def vbclr_b : PatFrag<(ops node:$ws, node:$wt),
|
||||
(and node:$ws, (vnot (shl vsplat_imm_eq_1, node:$wt)))>;
|
||||
(and node:$ws, (vnot (shl (vsplat_imm_eq_1), node:$wt)))>;
|
||||
def vbclr_h : PatFrag<(ops node:$ws, node:$wt),
|
||||
(and node:$ws, (vnot (shl vsplat_imm_eq_1, node:$wt)))>;
|
||||
(and node:$ws, (vnot (shl (vsplat_imm_eq_1), node:$wt)))>;
|
||||
def vbclr_w : PatFrag<(ops node:$ws, node:$wt),
|
||||
(and node:$ws, (vnot (shl vsplat_imm_eq_1, node:$wt)))>;
|
||||
(and node:$ws, (vnot (shl (vsplat_imm_eq_1), node:$wt)))>;
|
||||
def vbclr_d : PatFrag<(ops node:$ws, node:$wt),
|
||||
(and node:$ws, (vnot (shl (v2i64 vsplati64_imm_eq_1),
|
||||
(and node:$ws, (vnot (shl (v2i64 (vsplat_imm_eq_1)),
|
||||
node:$wt)))>;
|
||||
|
||||
def vbneg_b : PatFrag<(ops node:$ws, node:$wt),
|
||||
(xor node:$ws, (shl vsplat_imm_eq_1, node:$wt))>;
|
||||
(xor node:$ws, (shl (vsplat_imm_eq_1), node:$wt))>;
|
||||
def vbneg_h : PatFrag<(ops node:$ws, node:$wt),
|
||||
(xor node:$ws, (shl vsplat_imm_eq_1, node:$wt))>;
|
||||
(xor node:$ws, (shl (vsplat_imm_eq_1), node:$wt))>;
|
||||
def vbneg_w : PatFrag<(ops node:$ws, node:$wt),
|
||||
(xor node:$ws, (shl vsplat_imm_eq_1, node:$wt))>;
|
||||
(xor node:$ws, (shl (vsplat_imm_eq_1), node:$wt))>;
|
||||
def vbneg_d : PatFrag<(ops node:$ws, node:$wt),
|
||||
(xor node:$ws, (shl (v2i64 vsplati64_imm_eq_1),
|
||||
(xor node:$ws, (shl (v2i64 (vsplat_imm_eq_1)),
|
||||
node:$wt))>;
|
||||
|
||||
def vbset_b : PatFrag<(ops node:$ws, node:$wt),
|
||||
(or node:$ws, (shl vsplat_imm_eq_1, node:$wt))>;
|
||||
(or node:$ws, (shl (vsplat_imm_eq_1), node:$wt))>;
|
||||
def vbset_h : PatFrag<(ops node:$ws, node:$wt),
|
||||
(or node:$ws, (shl vsplat_imm_eq_1, node:$wt))>;
|
||||
(or node:$ws, (shl (vsplat_imm_eq_1), node:$wt))>;
|
||||
def vbset_w : PatFrag<(ops node:$ws, node:$wt),
|
||||
(or node:$ws, (shl vsplat_imm_eq_1, node:$wt))>;
|
||||
(or node:$ws, (shl (vsplat_imm_eq_1), node:$wt))>;
|
||||
def vbset_d : PatFrag<(ops node:$ws, node:$wt),
|
||||
(or node:$ws, (shl (v2i64 vsplati64_imm_eq_1),
|
||||
(or node:$ws, (shl (v2i64 (vsplat_imm_eq_1)),
|
||||
node:$wt))>;
|
||||
|
||||
def muladd : PatFrag<(ops node:$wd, node:$ws, node:$wt),
|
||||
@ -3842,7 +3825,7 @@ class MSAShiftPat<SDNode Node, ValueType VT, MSAInst Insn, dag Vec> :
|
||||
(VT (Insn VT:$ws, VT:$wt))>;
|
||||
|
||||
class MSABitPat<SDNode Node, ValueType VT, MSAInst Insn, PatFrag Frag> :
|
||||
MSAPat<(VT (Node VT:$ws, (shl vsplat_imm_eq_1, (Frag VT:$wt)))),
|
||||
MSAPat<(VT (Node VT:$ws, (shl (vsplat_imm_eq_1), (Frag VT:$wt)))),
|
||||
(VT (Insn VT:$ws, VT:$wt))>;
|
||||
|
||||
multiclass MSAShiftPats<SDNode Node, string Insn> {
|
||||
@ -3861,7 +3844,7 @@ multiclass MSABitPats<SDNode Node, string Insn> {
|
||||
def : MSABitPat<Node, v16i8, !cast<MSAInst>(Insn#_B), vsplati8imm7>;
|
||||
def : MSABitPat<Node, v8i16, !cast<MSAInst>(Insn#_H), vsplati16imm15>;
|
||||
def : MSABitPat<Node, v4i32, !cast<MSAInst>(Insn#_W), vsplati32imm31>;
|
||||
def : MSAPat<(Node v2i64:$ws, (shl (v2i64 vsplati64_imm_eq_1),
|
||||
def : MSAPat<(Node v2i64:$ws, (shl (v2i64 (vsplat_imm_eq_1)),
|
||||
(vsplati64imm63 v2i64:$wt))),
|
||||
(v2i64 (!cast<MSAInst>(Insn#_D) v2i64:$ws, v2i64:$wt))>;
|
||||
}
|
||||
@ -3872,16 +3855,16 @@ defm : MSAShiftPats<sra, "SRA">;
|
||||
defm : MSABitPats<xor, "BNEG">;
|
||||
defm : MSABitPats<or, "BSET">;
|
||||
|
||||
def : MSAPat<(and v16i8:$ws, (vnot (shl vsplat_imm_eq_1,
|
||||
def : MSAPat<(and v16i8:$ws, (vnot (shl (vsplat_imm_eq_1),
|
||||
(vsplati8imm7 v16i8:$wt)))),
|
||||
(v16i8 (BCLR_B v16i8:$ws, v16i8:$wt))>;
|
||||
def : MSAPat<(and v8i16:$ws, (vnot (shl vsplat_imm_eq_1,
|
||||
def : MSAPat<(and v8i16:$ws, (vnot (shl (vsplat_imm_eq_1),
|
||||
(vsplati16imm15 v8i16:$wt)))),
|
||||
(v8i16 (BCLR_H v8i16:$ws, v8i16:$wt))>;
|
||||
def : MSAPat<(and v4i32:$ws, (vnot (shl vsplat_imm_eq_1,
|
||||
def : MSAPat<(and v4i32:$ws, (vnot (shl (vsplat_imm_eq_1),
|
||||
(vsplati32imm31 v4i32:$wt)))),
|
||||
(v4i32 (BCLR_W v4i32:$ws, v4i32:$wt))>;
|
||||
def : MSAPat<(and v2i64:$ws, (vnot (shl (v2i64 vsplati64_imm_eq_1),
|
||||
def : MSAPat<(and v2i64:$ws, (vnot (shl (v2i64 (vsplat_imm_eq_1)),
|
||||
(vsplati64imm63 v2i64:$wt)))),
|
||||
(v2i64 (BCLR_D v2i64:$ws, v2i64:$wt))>;
|
||||
|
||||
|
@ -730,6 +730,18 @@ bool MipsSEDAGToDAGISel::selectVSplatUimmInvPow2(SDValue N,
|
||||
return false;
|
||||
}
|
||||
|
||||
// Select const vector splat of 1.
|
||||
bool MipsSEDAGToDAGISel::selectVSplatImmEq1(SDValue N) const {
|
||||
APInt ImmValue;
|
||||
EVT EltTy = N->getValueType(0).getVectorElementType();
|
||||
|
||||
if (N->getOpcode() == ISD::BITCAST)
|
||||
N = N->getOperand(0);
|
||||
|
||||
return selectVSplat(N.getNode(), ImmValue, EltTy.getSizeInBits()) &&
|
||||
ImmValue.getBitWidth() == EltTy.getSizeInBits() && ImmValue == 1;
|
||||
}
|
||||
|
||||
bool MipsSEDAGToDAGISel::trySelect(SDNode *Node) {
|
||||
unsigned Opcode = Node->getOpcode();
|
||||
SDLoc DL(Node);
|
||||
|
@ -124,6 +124,9 @@ class MipsSEDAGToDAGISel : public MipsDAGToDAGISel {
|
||||
/// starting at bit zero.
|
||||
bool selectVSplatMaskR(SDValue N, SDValue &Imm) const override;
|
||||
|
||||
/// Select constant vector splats whose value is 1.
|
||||
bool selectVSplatImmEq1(SDValue N) const override;
|
||||
|
||||
bool trySelect(SDNode *Node) override;
|
||||
|
||||
// Emits proper ABI for _mcount profiling calls.
|
||||
|
@ -229,6 +229,10 @@ static void ComputePTXValueVTs(const TargetLowering &TLI, const DataLayout &DL,
|
||||
// v*i8 are formally lowered as v4i8
|
||||
EltVT = MVT::v4i8;
|
||||
NumElts = (NumElts + 3) / 4;
|
||||
} else if (EltVT.getSimpleVT() == MVT::i8 && NumElts == 2) {
|
||||
// v2i8 is promoted to v2i16
|
||||
NumElts = 1;
|
||||
EltVT = MVT::v2i16;
|
||||
}
|
||||
for (unsigned j = 0; j != NumElts; ++j) {
|
||||
ValueVTs.push_back(EltVT);
|
||||
|
@ -506,8 +506,10 @@ static Instruction *foldCttzCtlz(IntrinsicInst &II, InstCombinerImpl &IC) {
|
||||
|
||||
// If ctlz/cttz is only used as a shift amount, set is_zero_poison to true.
|
||||
if (II.hasOneUse() && match(Op1, m_Zero()) &&
|
||||
match(II.user_back(), m_Shift(m_Value(), m_Specific(&II))))
|
||||
match(II.user_back(), m_Shift(m_Value(), m_Specific(&II)))) {
|
||||
II.dropUBImplyingAttrsAndMetadata();
|
||||
return IC.replaceOperand(II, 1, IC.Builder.getTrue());
|
||||
}
|
||||
|
||||
Constant *C;
|
||||
|
||||
|
@ -1004,7 +1004,7 @@ Value *InstCombinerImpl::SimplifyDemandedUseBits(Instruction *I,
|
||||
uint64_t MaskedGEPIndex = HighBitsGEPIndex | MaskedLowBitsGEPIndex;
|
||||
|
||||
if (MaskedGEPIndex != GEPIndex) {
|
||||
auto *GEP = cast<GetElementPtrInst>(II->getArgOperand(0));
|
||||
auto *GEP = cast<GEPOperator>(II->getArgOperand(0));
|
||||
Builder.SetInsertPoint(I);
|
||||
Type *GEPIndexType =
|
||||
DL.getIndexType(GEP->getPointerOperand()->getType());
|
||||
|
@ -1033,9 +1033,9 @@ void State::addInfoForInductions(BasicBlock &BB) {
|
||||
DTN, CmpInst::ICMP_SLT, PN, B,
|
||||
ConditionTy(CmpInst::ICMP_SLE, StartValue, B)));
|
||||
|
||||
// Try to add condition from header to the exit blocks. When exiting either
|
||||
// with EQ or NE in the header, we know that the induction value must be u<=
|
||||
// B, as other exits may only exit earlier.
|
||||
// Try to add condition from header to the dedicated exit blocks. When exiting
|
||||
// either with EQ or NE in the header, we know that the induction value must
|
||||
// be u<= B, as other exits may only exit earlier.
|
||||
assert(!StepOffset.isNegative() && "induction must be increasing");
|
||||
assert((Pred == CmpInst::ICMP_EQ || Pred == CmpInst::ICMP_NE) &&
|
||||
"unsupported predicate");
|
||||
@ -1043,8 +1043,11 @@ void State::addInfoForInductions(BasicBlock &BB) {
|
||||
SmallVector<BasicBlock *> ExitBBs;
|
||||
L->getExitBlocks(ExitBBs);
|
||||
for (BasicBlock *EB : ExitBBs) {
|
||||
WorkList.emplace_back(FactOrCheck::getConditionFact(
|
||||
DT.getNode(EB), CmpInst::ICMP_ULE, A, B, Precond));
|
||||
// Bail out on non-dedicated exits.
|
||||
if (DT.dominates(&BB, EB)) {
|
||||
WorkList.emplace_back(FactOrCheck::getConditionFact(
|
||||
DT.getNode(EB), CmpInst::ICMP_ULE, A, B, Precond));
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -1464,8 +1464,11 @@ static Instruction *cloneInstructionInExitBlock(
|
||||
|
||||
if (MSSAU.getMemorySSA()->getMemoryAccess(&I)) {
|
||||
// Create a new MemoryAccess and let MemorySSA set its defining access.
|
||||
// After running some passes, MemorySSA might be outdated, and the
|
||||
// instruction `I` may have become a non-memory touching instruction.
|
||||
MemoryAccess *NewMemAcc = MSSAU.createMemoryAccessInBB(
|
||||
New, nullptr, New->getParent(), MemorySSA::Beginning);
|
||||
New, nullptr, New->getParent(), MemorySSA::Beginning,
|
||||
/*CreationMustSucceed=*/false);
|
||||
if (NewMemAcc) {
|
||||
if (auto *MemDef = dyn_cast<MemoryDef>(NewMemAcc))
|
||||
MSSAU.insertDef(MemDef, /*RenameUses=*/true);
|
||||
|
@ -1028,7 +1028,13 @@ CanRedirectPredsOfEmptyBBToSucc(BasicBlock *BB, BasicBlock *Succ,
|
||||
if (!BB->hasNPredecessorsOrMore(2))
|
||||
return false;
|
||||
|
||||
// Get single common predecessors of both BB and Succ
|
||||
if (any_of(BBPreds, [](const BasicBlock *Pred) {
|
||||
return isa<IndirectBrInst>(Pred->getTerminator());
|
||||
}))
|
||||
return false;
|
||||
|
||||
// Get the single common predecessor of both BB and Succ. Return false
|
||||
// when there are more than one common predecessors.
|
||||
for (BasicBlock *SuccPred : SuccPreds) {
|
||||
if (BBPreds.count(SuccPred)) {
|
||||
if (CommonPred)
|
||||
@ -1133,7 +1139,7 @@ bool llvm::TryToSimplifyUncondBranchFromEmptyBlock(BasicBlock *BB,
|
||||
|
||||
bool BBKillable = CanPropagatePredecessorsForPHIs(BB, Succ, BBPreds);
|
||||
|
||||
// Even if we can not fold bB into Succ, we may be able to redirect the
|
||||
// Even if we can not fold BB into Succ, we may be able to redirect the
|
||||
// predecessors of BB to Succ.
|
||||
bool BBPhisMergeable =
|
||||
BBKillable ||
|
||||
|
@ -15440,9 +15440,25 @@ bool BoUpSLP::collectValuesToDemote(
|
||||
MaskedValueIsZero(I->getOperand(1), Mask, SimplifyQuery(*DL)));
|
||||
});
|
||||
};
|
||||
auto AbsChecker = [&](unsigned BitWidth, unsigned OrigBitWidth) {
|
||||
assert(BitWidth <= OrigBitWidth && "Unexpected bitwidths!");
|
||||
return all_of(E.Scalars, [&](Value *V) {
|
||||
auto *I = cast<Instruction>(V);
|
||||
unsigned SignBits = OrigBitWidth - BitWidth;
|
||||
APInt Mask = APInt::getBitsSetFrom(OrigBitWidth, BitWidth - 1);
|
||||
unsigned Op0SignBits =
|
||||
ComputeNumSignBits(I->getOperand(0), *DL, 0, AC, nullptr, DT);
|
||||
return SignBits <= Op0SignBits &&
|
||||
((SignBits != Op0SignBits &&
|
||||
!isKnownNonNegative(I->getOperand(0), SimplifyQuery(*DL))) ||
|
||||
MaskedValueIsZero(I->getOperand(0), Mask, SimplifyQuery(*DL)));
|
||||
});
|
||||
};
|
||||
if (ID != Intrinsic::abs) {
|
||||
Operands.push_back(getOperandEntry(&E, 1));
|
||||
CallChecker = CompChecker;
|
||||
} else {
|
||||
CallChecker = AbsChecker;
|
||||
}
|
||||
InstructionCost BestCost =
|
||||
std::numeric_limits<InstructionCost::CostType>::max();
|
||||
|
@ -3042,6 +3042,14 @@ static bool SimplifyTree(TreePatternNodePtr &N) {
|
||||
!N->getExtType(0).empty() &&
|
||||
N->getExtType(0) == N->getChild(0).getExtType(0) &&
|
||||
N->getName().empty()) {
|
||||
if (!N->getPredicateCalls().empty()) {
|
||||
std::string Str;
|
||||
raw_string_ostream OS(Str);
|
||||
OS << *N
|
||||
<< "\n trivial bitconvert node should not have predicate calls\n";
|
||||
PrintFatalError(Str);
|
||||
return false;
|
||||
}
|
||||
N = N->getChildShared(0);
|
||||
SimplifyTree(N);
|
||||
return true;
|
||||
|
@ -1,8 +1,8 @@
|
||||
#define LLVM_REVISION "llvmorg-19.1.4-0-gaadaa00de76e"
|
||||
#define LLVM_REVISION "llvmorg-19.1.5-0-gab4b5a2db582"
|
||||
#define LLVM_REPOSITORY "https://github.com/llvm/llvm-project.git"
|
||||
|
||||
#define CLANG_REVISION "llvmorg-19.1.4-0-gaadaa00de76e"
|
||||
#define CLANG_REVISION "llvmorg-19.1.5-0-gab4b5a2db582"
|
||||
#define CLANG_REPOSITORY "https://github.com/llvm/llvm-project.git"
|
||||
|
||||
#define LLDB_REVISION "llvmorg-19.1.4-0-gaadaa00de76e"
|
||||
#define LLDB_REVISION "llvmorg-19.1.5-0-gab4b5a2db582"
|
||||
#define LLDB_REPOSITORY "https://github.com/llvm/llvm-project.git"
|
||||
|
@ -1,8 +1,8 @@
|
||||
#define CLANG_VERSION 19.1.4
|
||||
#define CLANG_VERSION_STRING "19.1.4"
|
||||
#define CLANG_VERSION 19.1.5
|
||||
#define CLANG_VERSION_STRING "19.1.5"
|
||||
#define CLANG_VERSION_MAJOR 19
|
||||
#define CLANG_VERSION_MAJOR_STRING "19"
|
||||
#define CLANG_VERSION_MINOR 1
|
||||
#define CLANG_VERSION_PATCHLEVEL 4
|
||||
#define CLANG_VERSION_PATCHLEVEL 5
|
||||
|
||||
#define CLANG_VENDOR "FreeBSD "
|
||||
|
@ -1,4 +1,4 @@
|
||||
// Local identifier in __FreeBSD_version style
|
||||
#define LLD_FREEBSD_VERSION 1500001
|
||||
|
||||
#define LLD_VERSION_STRING "19.1.4 (FreeBSD llvmorg-19.1.4-0-gaadaa00de76e-" __XSTRING(LLD_FREEBSD_VERSION) ")"
|
||||
#define LLD_VERSION_STRING "19.1.5 (FreeBSD llvmorg-19.1.5-0-gab4b5a2db582-" __XSTRING(LLD_FREEBSD_VERSION) ")"
|
||||
|
@ -1,6 +1,6 @@
|
||||
#define LLDB_VERSION 19.1.4
|
||||
#define LLDB_VERSION_STRING "19.1.4"
|
||||
#define LLDB_VERSION 19.1.5
|
||||
#define LLDB_VERSION_STRING "19.1.5"
|
||||
#define LLDB_VERSION_MAJOR 19
|
||||
#define LLDB_VERSION_MINOR 1
|
||||
#define LLDB_VERSION_PATCH 4
|
||||
#define LLDB_VERSION_PATCH 5
|
||||
/* #undef LLDB_FULL_VERSION_STRING */
|
||||
|
@ -338,10 +338,10 @@
|
||||
#define PACKAGE_NAME "LLVM"
|
||||
|
||||
/* Define to the full name and version of this package. */
|
||||
#define PACKAGE_STRING "LLVM 19.1.4"
|
||||
#define PACKAGE_STRING "LLVM 19.1.5"
|
||||
|
||||
/* Define to the version of this package. */
|
||||
#define PACKAGE_VERSION "19.1.4"
|
||||
#define PACKAGE_VERSION "19.1.5"
|
||||
|
||||
/* Define to the vendor of this package. */
|
||||
/* #undef PACKAGE_VENDOR */
|
||||
|
@ -176,10 +176,10 @@
|
||||
#define LLVM_VERSION_MINOR 1
|
||||
|
||||
/* Patch version of the LLVM API */
|
||||
#define LLVM_VERSION_PATCH 4
|
||||
#define LLVM_VERSION_PATCH 5
|
||||
|
||||
/* LLVM version string */
|
||||
#define LLVM_VERSION_STRING "19.1.4"
|
||||
#define LLVM_VERSION_STRING "19.1.5"
|
||||
|
||||
/* Whether LLVM records statistics for use with GetStatistics(),
|
||||
* PrintStatistics() or PrintStatisticsJSON()
|
||||
|
@ -1,2 +1,2 @@
|
||||
#define LLVM_REVISION "llvmorg-19.1.4-0-gaadaa00de76e"
|
||||
#define LLVM_REVISION "llvmorg-19.1.5-0-gab4b5a2db582"
|
||||
#define LLVM_REPOSITORY "https://github.com/llvm/llvm-project.git"
|
||||
|
Loading…
Reference in New Issue
Block a user