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Now that we can detect the Cortex-A8 properly, fix the event list

according to the Cortex-A8 TRM r3p2 section 3.2.49.
The A8 list differs from the "ARM-v7 common" list, given the A8
was an earlier model.

There is still more work to be done for other Cortex-Ax version as
andrew points out, but I am just trying to fix A8 for now for teaching.

MFC after:		2 weeks
Sponsored by:		DARPA/AFRL
Obtained from:		Cambridge/L41
Reviewed by:		andrew
Differential Revision:	https://reviews.freebsd.org/D3876
This commit is contained in:
Bjoern A. Zeeb 2015-10-14 17:20:19 +00:00
parent 48d1ff3a2d
commit 71f7442233
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=289320

View File

@ -5027,7 +5027,7 @@ __PMC_EV_ALIAS("IMPC_C0H_TRK_REQUEST.ALL", UCP_EVENT_84H_01H)
#define PMC_EV_ARMV7_FIRST PMC_EV_ARMV7_EVENT_00H
#define PMC_EV_ARMV7_LAST PMC_EV_ARMV7_EVENT_FFH
#define __PMC_EV_ALIAS_ARMV7_COMMON() \
#define __PMC_EV_ALIAS_ARMV7_COMMON_A8() \
__PMC_EV_ALIAS("PMNC_SW_INCR", ARMV7_EVENT_00H) \
__PMC_EV_ALIAS("L1_ICACHE_REFILL", ARMV7_EVENT_01H) \
__PMC_EV_ALIAS("ITLB_REFILL", ARMV7_EVENT_02H) \
@ -5046,7 +5046,10 @@ __PMC_EV_ALIAS("IMPC_C0H_TRK_REQUEST.ALL", UCP_EVENT_84H_01H)
__PMC_EV_ALIAS("MEM_UNALIGNED_ACCESS", ARMV7_EVENT_0FH) \
__PMC_EV_ALIAS("PC_BRANCH_MIS_PRED", ARMV7_EVENT_10H) \
__PMC_EV_ALIAS("CLOCK_CYCLES", ARMV7_EVENT_11H) \
__PMC_EV_ALIAS("PC_BRANCH_PRED", ARMV7_EVENT_12H) \
__PMC_EV_ALIAS("PC_BRANCH_PRED", ARMV7_EVENT_12H)
#define __PMC_EV_ALIAS_ARMV7_COMMON() \
__PMC_EV_ALIAS_ARMV7_COMMON_A8() \
__PMC_EV_ALIAS("MEM_ACCESS", ARMV7_EVENT_13H) \
__PMC_EV_ALIAS("L1_ICACHE_ACCESS", ARMV7_EVENT_14H) \
__PMC_EV_ALIAS("L1_DCACHE_WB", ARMV7_EVENT_15H) \
@ -5060,8 +5063,40 @@ __PMC_EV_ALIAS("IMPC_C0H_TRK_REQUEST.ALL", UCP_EVENT_84H_01H)
__PMC_EV_ALIAS("BUS_CYCLES", ARMV7_EVENT_1DH) \
__PMC_EV_ALIAS("CPU_CYCLES", ARMV7_EVENT_FFH)
#define __PMC_EV_ALIAS_ARMV7_CORTEX_A8() \
__PMC_EV_ALIAS_ARMV7_COMMON()
#define __PMC_EV_ALIAS_ARMV7_CORTEX_A8() \
__PMC_EV_ALIAS_ARMV7_COMMON_A8() \
__PMC_EV_ALIAS("WRITE_BUF_FULL", ARMV7_EVENT_40H) \
__PMC_EV_ALIAS("L2_STORE_MERGED", ARMV7_EVENT_41H) \
__PMC_EV_ALIAS("L2_STORE_BUFFERABLE", ARMV7_EVENT_42H) \
__PMC_EV_ALIAS("L2_ACCESS", ARMV7_EVENT_43H) \
__PMC_EV_ALIAS("L2_CACHE_MISS", ARMV7_EVENT_44H) \
__PMC_EV_ALIAS("AXI_READ", ARMV7_EVENT_45H) \
__PMC_EV_ALIAS("AXI_WRITE", ARMV7_EVENT_46H) \
__PMC_EV_ALIAS("MEM_REPLAY_EVT", ARMV7_EVENT_47H) \
__PMC_EV_ALIAS("MEM_UNALIGNED_ACCESS_REPLAY", ARMV7_EVENT_48H) \
__PMC_EV_ALIAS("L1_DCACHE_HASH_MISS", ARMV7_EVENT_49H) \
__PMC_EV_ALIAS("L1_ICACHE_HASH_MISS", ARMV7_EVENT_4AH) \
__PMC_EV_ALIAS("L1_CACHE_PAGECOL_ALIAS", ARMV7_EVENT_4BH) \
__PMC_EV_ALIAS("L1_DCACHE_NEON_ACCESS", ARMV7_EVENT_4CH) \
__PMC_EV_ALIAS("L1_DCACHE_NEON_CACHEABLE", ARMV7_EVENT_4DH) \
__PMC_EV_ALIAS("L2_CACHE_NEON_MEM_ACCESS", ARMV7_EVENT_4EH) \
__PMC_EV_ALIAS("L2_CACHE_NEON_HIT", ARMV7_EVENT_4FH) \
__PMC_EV_ALIAS("L1_CACHE_ACCESS_NOCP15", ARMV7_EVENT_50H) \
__PMC_EV_ALIAS("RET_STACK_MISPREDICT", ARMV7_EVENT_51H) \
__PMC_EV_ALIAS("BRANCH_DIR_MISPREDICT", ARMV7_EVENT_52H) \
__PMC_EV_ALIAS("PRED_BRANCH_PRED_TAKEN", ARMV7_EVENT_53H) \
__PMC_EV_ALIAS("PRED_BRANCH_EXEC_TAKEN", ARMV7_EVENT_54H) \
__PMC_EV_ALIAS("OPS_ISSUED", ARMV7_EVENT_55H) \
__PMC_EV_ALIAS("CYCLES_NO_INSTRUCTION", ARMV7_EVENT_56H) \
__PMC_EV_ALIAS("INSTRUCTIONS_ISSUED_CYCLE", ARMV7_EVENT_57H) \
__PMC_EV_ALIAS("CYCLES_STALLED_NEON_MRC", ARMV7_EVENT_58H) \
__PMC_EV_ALIAS("CYCLES_STALLED_NEON_FULLQ", ARMV7_EVENT_59H) \
__PMC_EV_ALIAS("CYCLES_NONIDLE_NEON_INT", ARMV7_EVENT_5AH) \
__PMC_EV_ALIAS("PMUEXTIN0_EVT", ARMV7_EVENT_70H) \
__PMC_EV_ALIAS("PMUEXTIN1_EVT", ARMV7_EVENT_71H) \
__PMC_EV_ALIAS("PMUEXTIN_EVT", ARMV7_EVENT_72H)
#define PMC_EV_ARMV7_CORTEX_A8_FIRST PMC_EV_ARMV7_PMNC_SW_INCR
#define PMC_EV_ARMV7_CORTEX_A8_LAST PMC_EV_ARMV7_PMUEXTIN_EVT
#define __PMC_EV_ALIAS_ARMV7_CORTEX_A9() \
__PMC_EV_ALIAS_ARMV7_COMMON() \