mirror/freebsd
1
0
Fork 0
mirror of https://git.FreeBSD.org/src.git synced 2025-01-16 15:11:52 +00:00
Code Issues Releases Activity

Pull in r316035 from upstream llvm trunk (by Tim Northover):

Browse Source 
AArch64: account for possible frame index operand in compares.

  If the address of a local is used in a comparison, AArch64 can fold
  the address-calculation into the comparison via "adds".
  Unfortunately, a couple of places (both hit in this one test) are not
  ready to deal with that yet and just assume the first source operand
  is a register.

This should fix an assertion failure while building the test suite of
www/firefox for AArch64.

PR:		223048
MFC after:	3 days
This commit is contained in:
Dimitry Andric 2017-10-21 19:14:45 +00:00
parent fc203cd43e
commit 738eacb46b
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=324826
2 changed files with 9 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
contrib/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
View File

@ -940,6 +940,12 @@ bool AArch64InstrInfo::areMemAccessesTriviallyDisjoint(
bool AArch64InstrInfo::analyzeCompare(const MachineInstr &MI, unsigned &SrcReg, bool AArch64InstrInfo::analyzeCompare(const MachineInstr &MI, unsigned &SrcReg,
unsigned &SrcReg2, int &CmpMask, unsigned &SrcReg2, int &CmpMask,
int &CmpValue) const { int &CmpValue) const {
// The first operand can be a frame index where we'd normally expect a
// register.
assert(MI.getNumOperands() >= 2 && "All AArch64 cmps should have 2 operands");
if (!MI.getOperand(1).isReg())
return false;
switch (MI.getOpcode()) { switch (MI.getOpcode()) {
default: default:
break; break;

3
contrib/llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp
View File

@ -167,6 +167,9 @@ AArch64RedundantCopyElimination::knownRegValInBlock(
// CMP is an alias for SUBS with a dead destination register. // CMP is an alias for SUBS with a dead destination register.
case AArch64::SUBSWri: case AArch64::SUBSWri:
case AArch64::SUBSXri: { case AArch64::SUBSXri: {
// Sometimes the first operand is a FrameIndex. Bail if tht happens.
if (!PredI.getOperand(1).isReg())
return None;
MCPhysReg SrcReg = PredI.getOperand(1).getReg(); MCPhysReg SrcReg = PredI.getOperand(1).getReg();
// Must not be a symbolic immediate. // Must not be a symbolic immediate.