mirror of
https://git.FreeBSD.org/src.git
synced 2024-12-18 10:35:55 +00:00
Clean up error recovery code:
aic7xxx.c: In target mode, reset the TQINPOS on every restart of the sequencer. In the past we did this only during a bus reset, but there are other reasons the sequencer might be reset. In ahc_clear_critical_section(), disable pausing chip interrupts while we step the sequencer out of a critical section. This avoids the possibility of getting a pausing interrupt (unexpected bus free, bus reset, etc.) that would prevent the sequencer from stepping. Send the correct async notifications in the case of a BDR or bus reset. In ahc_loadseq(), correct the calculation of our critical sections. In some cases, the sections would be larger than needed. aic7xxx.h: Remove an unused SCB flag. aic7xxx.seq: MK_MESSAGE is cleared by the kernel, there is no need to waste a sequencer instruction clearing it. aic7xxx_freebsd.c: Go through the host message loop instead of issuing a single byte message directly in the ahc_timeout() case where we are currently on the bus to the device. The effect is the same, but this way we get a nice printf saying that an expected BDR was delivered instead of an unexpected bus free. If we are requeuing an SCB for an error recovery action, be sure to set the DISCONNECTED flag in the in-core version of the SCB. This ensures that, in the SCB-paging case, the sequencer will still recognize the reselection as valid even if the version of the SCB with this flag set was never previously paged out to system memory. In the non-paging case, set the MK_MESSAGE flag in SCB_CONTROL directly. aic7xxx_pci.c: Enable the Memeory Write and Invalidate bug workaround for all aic7880 chips with revs < 1. This bug is rarely triggered in FreeBSD as most transfers end on cache-aligned boundaries, but a recheck of my references indicates that these chips are affected.
This commit is contained in:
Justin T. Gibbs
parent
03de26e0d0
commit
73f1c25915
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=66845
@ -229,6 +229,15 @@ restart_sequencer(struct ahc_softc *ahc)
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ahc_outb(ahc, SCSISIGO, 0); /* De-assert BSY */
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ahc_outb(ahc, MSG_OUT, MSG_NOOP); /* No message to send */
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ahc_outb(ahc, SXFRCTL1, ahc_inb(ahc, SXFRCTL1) & ~BITBUCKET);
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/*
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* Ensure that the sequencer's idea of TQINPOS
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* matches our own. The sequencer increments TQINPOS
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* only after it sees a DMA complete and a reset could
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* occur before the increment leaving the kernel to believe
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* the command arrived but the sequencer to not.
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*/
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ahc_outb(ahc, TQINPOS, ahc->tqinfifonext);
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/* Always allow reselection */
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ahc_outb(ahc, SCSISEQ,
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ahc_inb(ahc, SCSISEQ_TEMPLATE) & (ENSELI|ENRSELI|ENAUTOATNP));
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@ -1045,11 +1054,15 @@ void
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ahc_clear_critical_section(struct ahc_softc *ahc)
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{
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int stepping;
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u_int simode0;
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u_int simode1;
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if (ahc->num_critical_sections == 0)
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return;
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stepping = FALSE;
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simode0 = 0;
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simode1 = 0;
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for (;;) {
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struct cs *cs;
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u_int seqaddr;
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@ -1068,7 +1081,19 @@ ahc_clear_critical_section(struct ahc_softc *ahc)
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if (i == ahc->num_critical_sections)
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break;
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if (!stepping) {
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if (stepping == FALSE) {
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/*
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* Disable all interrupt sources so that the
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* sequencer will not be stuck by a pausing
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* interrupt condition while we attempt to
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* leave a critical section.
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*/
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simode0 = ahc_inb(ahc, SIMODE0);
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ahc_outb(ahc, SIMODE0, 0);
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simode1 = ahc_inb(ahc, SIMODE1);
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ahc_outb(ahc, SIMODE1, 0);
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ahc_outb(ahc, CLRINT, CLRSCSIINT);
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ahc_outb(ahc, SEQCTL, ahc_inb(ahc, SEQCTL) | STEP);
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stepping = TRUE;
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}
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@ -1077,8 +1102,11 @@ ahc_clear_critical_section(struct ahc_softc *ahc)
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ahc_delay(200);
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} while (!sequencer_paused(ahc));
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}
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if (stepping)
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if (stepping) {
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ahc_outb(ahc, SIMODE0, simode0);
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ahc_outb(ahc, SIMODE1, simode1);
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ahc_outb(ahc, SEQCTL, ahc_inb(ahc, SEQCTL) & ~STEP);
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}
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}
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/*
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@ -2938,7 +2966,7 @@ ahc_handle_devreset(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
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AHC_TRANS_CUR, /*paused*/TRUE);
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ahc_send_async(ahc, devinfo->channel, devinfo->target,
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CAM_LUN_WILDCARD, AC_TRANSFER_NEG);
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CAM_LUN_WILDCARD, AC_SENT_BDR);
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if (message != NULL
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&& (verbose_level <= bootverbose))
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@ -4818,31 +4846,6 @@ ahc_reset_channel(struct ahc_softc *ahc, char channel, int initiate_reset)
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if (initiate_reset)
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ahc_reset_current_bus(ahc);
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ahc_clear_intstat(ahc);
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/*
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* Since we are going to restart the sequencer, avoid
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* a race in the sequencer that could cause corruption
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* of our Q pointers by starting over from index 1.
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*/
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*((uint32_t *)(&ahc->qoutfifo[ahc->qoutfifonext & ~0x3]))
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= 0xFFFFFFFF;
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ahc->qoutfifonext = 0;
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if ((ahc->features & AHC_QUEUE_REGS) != 0)
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ahc_outb(ahc, SDSCB_QOFF, 0);
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else
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ahc_outb(ahc, QOUTPOS, 0);
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if ((ahc->flags & AHC_TARGETMODE) != 0) {
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ahc->tqinfifonext = 1;
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ahc_outb(ahc, KERNEL_TQINPOS, ahc->tqinfifonext - 1);
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ahc_outb(ahc, TQINPOS, ahc->tqinfifonext);
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if ((ahc->features & AHC_HS_MAILBOX) != 0) {
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u_int hs_mailbox;
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hs_mailbox = ahc_inb(ahc, HS_MAILBOX);
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hs_mailbox &= ~HOST_TQINPOS;
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ahc_outb(ahc, HS_MAILBOX, hs_mailbox);
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}
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}
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restart_needed = TRUE;
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}
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@ -4883,7 +4886,7 @@ ahc_reset_channel(struct ahc_softc *ahc, char channel, int initiate_reset)
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#endif
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/* Notify the XPT that a bus reset occurred */
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ahc_send_async(ahc, devinfo.channel, CAM_TARGET_WILDCARD,
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CAM_LUN_WILDCARD, AC_TRANSFER_NEG);
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CAM_LUN_WILDCARD, AC_BUS_RESET);
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/*
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* Revert to async/narrow transfers until we renegotiate.
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@ -5122,8 +5125,10 @@ static void
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ahc_loadseq(struct ahc_softc *ahc)
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{
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struct cs cs_table[num_critical_sections];
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u_int begin_set[num_critical_sections];
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u_int end_set[num_critical_sections];
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struct patch *cur_patch;
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u_int cs_table_size;
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u_int cs_count;
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u_int cur_cs;
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u_int i;
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int downloaded;
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@ -5135,8 +5140,10 @@ ahc_loadseq(struct ahc_softc *ahc)
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* Start out with 0 critical sections
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* that apply to this firmware load.
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*/
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cs_table_size = 0;
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cs_count = 0;
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cur_cs = 0;
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memset(begin_set, 0, sizeof(begin_set));
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memset(end_set, 0, sizeof(end_set));
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/* Setup downloadable constant table */
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download_consts[QOUTFIFO_OFFSET] = 0;
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@ -5172,32 +5179,34 @@ ahc_loadseq(struct ahc_softc *ahc)
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* that might apply to this instruction.
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*/
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for (; cur_cs < num_critical_sections; cur_cs++) {
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if (critical_sections[cur_cs].end >= i) {
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if (critical_sections[cur_cs].begin == i) {
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cs_table[cs_table_size].begin =
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downloaded;
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if (critical_sections[cur_cs].end <= i) {
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if (begin_set[cs_count] == TRUE
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&& end_set[cs_count] == FALSE) {
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cs_table[cs_count].end = downloaded;
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end_set[cs_count] = TRUE;
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cs_count++;
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}
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if (critical_sections[cur_cs].end == i) {
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cs_table[cs_table_size].end =
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downloaded;
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cs_table_size++;
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}
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break;
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continue;
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}
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if (critical_sections[cur_cs].begin <= i
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&& begin_set[cs_count] == FALSE) {
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cs_table[cs_count].begin = downloaded;
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begin_set[cs_count] = TRUE;
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}
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break;
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}
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ahc_download_instr(ahc, i, download_consts);
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downloaded++;
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}
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ahc->num_critical_sections = cs_table_size;
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if (cs_table_size != 0) {
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ahc->num_critical_sections = cs_count;
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if (cs_count != 0) {
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cs_table_size *= sizeof(struct cs);
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ahc->critical_sections =
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malloc(cs_table_size, M_DEVBUF, M_NOWAIT);
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cs_count *= sizeof(struct cs);
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ahc->critical_sections = malloc(cs_count, M_DEVBUF, M_NOWAIT);
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if (ahc->critical_sections == NULL)
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panic("ahc_loadseq: Could not malloc");
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memcpy(ahc->critical_sections, cs_table, cs_table_size);
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memcpy(ahc->critical_sections, cs_table, cs_count);
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}
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ahc_outb(ahc, SEQCTL, PERRORDIS|FAILDIS|FASTMODE);
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restart_sequencer(ahc);
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@ -475,7 +475,6 @@ typedef enum {
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SCB_RECOVERY_SCB = 0x0040,
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SCB_NEGOTIATE = 0x0080,
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SCB_ABORT = 0x1000,
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SCB_QUEUED_MSG = 0x2000,
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SCB_ACTIVE = 0x4000,
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SCB_TARGET_IMMEDIATE = 0x8000
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} scb_flag;
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@ -1624,7 +1624,6 @@ setup_SCB_tagged:
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call set_transfer_settings;
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/* See if the host wants to send a message upon reconnection */
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test SCB_CONTROL, MK_MESSAGE jz mesgin_done;
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and SCB_CONTROL, ~MK_MESSAGE;
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mvi HOST_MSG call mk_mesg;
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jmp mesgin_done;
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@ -1542,7 +1542,7 @@ ahc_timeout(void *arg)
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}
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ahc_set_recoveryscb(ahc, active_scb);
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ahc_outb(ahc, MSG_OUT, MSG_BUS_DEV_RESET);
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ahc_outb(ahc, MSG_OUT, HOST_MSG);
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ahc_outb(ahc, SCSISIGO, last_phase|ATNO);
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ahc_print_path(ahc, active_scb);
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printf("BDR message in message buffer\n");
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@ -1580,13 +1580,6 @@ ahc_timeout(void *arg)
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struct scb *prev_scb;
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ahc_set_recoveryscb(ahc, scb);
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/*
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* Simply set the MK_MESSAGE control bit.
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*/
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scb->hscb->control |= MK_MESSAGE;
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scb->flags |= SCB_QUEUED_MSG
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| SCB_DEVICE_RESET;
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/*
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* Actually re-queue this SCB in an attempt
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* to select the device before it reconnects.
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@ -1594,6 +1587,19 @@ ahc_timeout(void *arg)
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* we will now issue a target reset to the
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* timed-out device.
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*
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* Set the MK_MESSAGE control bit indicating
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* that we desire to send a message. We
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* also set the disconnected flag since
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* in the paging case there is no guarantee
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* that our SCB control byte matches the
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* version on the card. We don't want the
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* sequencer to abort the command thinking
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* an unsolicited reselection occurred.
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*/
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scb->hscb->control |= MK_MESSAGE|DISCONNECTED;
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scb->flags |= SCB_DEVICE_RESET;
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/*
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* Remove any cached copy of this SCB in the
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* disconnected list in preparation for the
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* queuing of our abort SCB. We use the
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@ -1604,7 +1610,21 @@ ahc_timeout(void *arg)
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lun, scb->hscb->tag,
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/*stop_on_first*/TRUE,
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/*remove*/TRUE,
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/*save_state*/TRUE);
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/*save_state*/FALSE);
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/*
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* In the non-paging case, the sequencer will
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* never re-reference the in-core SCB.
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* To make sure we are notified during
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* reslection, set the MK_MESSAGE flag in
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* the card's copy of the SCB.
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*/
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if ((ahc->flags & AHC_PAGESCBS) != 0) {
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ahc_outb(ahc, SCBPTR, scb->hscb->tag);
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ahc_outb(ahc, SCB_CONTROL,
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ahc_inb(ahc, SCB_CONTROL)
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| MK_MESSAGE);
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}
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/*
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* Clear out any entries in the QINFIFO first
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@ -1630,6 +1650,7 @@ ahc_timeout(void *arg)
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prev_tag);
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}
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ahc_qinfifo_requeue(ahc, prev_scb, scb);
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ahc_outb(ahc, SCBPTR, active_scb_index);
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scb->io_ctx->ccb_h.timeout_ch =
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timeout(ahc_timeout, (caddr_t)scb, 2 * hz);
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unpause_sequencer(ahc);
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@ -1542,7 +1542,7 @@ ahc_timeout(void *arg)
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}
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ahc_set_recoveryscb(ahc, active_scb);
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ahc_outb(ahc, MSG_OUT, MSG_BUS_DEV_RESET);
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ahc_outb(ahc, MSG_OUT, HOST_MSG);
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ahc_outb(ahc, SCSISIGO, last_phase|ATNO);
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ahc_print_path(ahc, active_scb);
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printf("BDR message in message buffer\n");
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@ -1580,13 +1580,6 @@ ahc_timeout(void *arg)
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struct scb *prev_scb;
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ahc_set_recoveryscb(ahc, scb);
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/*
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* Simply set the MK_MESSAGE control bit.
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*/
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scb->hscb->control |= MK_MESSAGE;
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scb->flags |= SCB_QUEUED_MSG
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| SCB_DEVICE_RESET;
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/*
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* Actually re-queue this SCB in an attempt
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* to select the device before it reconnects.
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@ -1594,6 +1587,19 @@ ahc_timeout(void *arg)
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* we will now issue a target reset to the
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* timed-out device.
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*
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* Set the MK_MESSAGE control bit indicating
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* that we desire to send a message. We
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* also set the disconnected flag since
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* in the paging case there is no guarantee
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* that our SCB control byte matches the
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* version on the card. We don't want the
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* sequencer to abort the command thinking
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* an unsolicited reselection occurred.
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*/
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scb->hscb->control |= MK_MESSAGE|DISCONNECTED;
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scb->flags |= SCB_DEVICE_RESET;
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/*
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* Remove any cached copy of this SCB in the
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* disconnected list in preparation for the
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* queuing of our abort SCB. We use the
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@ -1604,7 +1610,21 @@ ahc_timeout(void *arg)
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lun, scb->hscb->tag,
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/*stop_on_first*/TRUE,
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/*remove*/TRUE,
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/*save_state*/TRUE);
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/*save_state*/FALSE);
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/*
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* In the non-paging case, the sequencer will
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* never re-reference the in-core SCB.
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* To make sure we are notified during
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* reslection, set the MK_MESSAGE flag in
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* the card's copy of the SCB.
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*/
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if ((ahc->flags & AHC_PAGESCBS) != 0) {
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ahc_outb(ahc, SCBPTR, scb->hscb->tag);
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ahc_outb(ahc, SCB_CONTROL,
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ahc_inb(ahc, SCB_CONTROL)
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| MK_MESSAGE);
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}
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/*
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* Clear out any entries in the QINFIFO first
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@ -1630,6 +1650,7 @@ ahc_timeout(void *arg)
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prev_tag);
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}
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ahc_qinfifo_requeue(ahc, prev_scb, scb);
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ahc_outb(ahc, SCBPTR, active_scb_index);
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scb->io_ctx->ccb_h.timeout_ch =
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timeout(ahc_timeout, (caddr_t)scb, 2 * hz);
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unpause_sequencer(ahc);
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@ -1711,7 +1711,7 @@ ahc_aic7880_setup(ahc_dev_softc_t pci, struct ahc_probe_config *probe_config)
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if (rev >= 1) {
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probe_config->bugs |= AHC_PCI_2_1_RETRY_BUG;
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} else {
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probe_config->bugs |= AHC_CACHETHEN_BUG;
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probe_config->bugs |= AHC_CACHETHEN_BUG|AHC_PCI_MWI_BUG;
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}
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return (0);
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}
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